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   1 /*
   2  * 8253/8254 interval timer emulation
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  * Copyright (c) 2006 Intel Corporation
   6  * Copyright (c) 2007 Keir Fraser, XenSource Inc
   7  * Copyright (c) 2008 Intel Corporation
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a copy
  10  * of this software and associated documentation files (the "Software"), to deal
  11  * in the Software without restriction, including without limitation the rights
  12  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  13  * copies of the Software, and to permit persons to whom the Software is
  14  * furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included in
  17  * all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  25  * THE SOFTWARE.
  26  *
  27  * Authors:
  28  *   Sheng Yang <sheng.yang@intel.com>
  29  *   Based on QEMU and Xen.
  30  */
  31
  32 #include <linux/kvm_host.h>
  33
  34 #include "irq.h"
  35 #include "i8254.h"
  36
  37 #ifndef CONFIG_X86_64
  38 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
  39 #else
  40 #define mod_64(x, y) ((x) % (y))
  41 #endif
  42
  43 #define RW_STATE_LSB 1
  44 #define RW_STATE_MSB 2
  45 #define RW_STATE_WORD0 3
  46 #define RW_STATE_WORD1 4
  47
  48 /* Compute with 96 bit intermediate result: (a*b)/c */
  49 static u64 muldiv64(u64 a, u32 b, u32 c)
  50 {
  51         union {
  52                 u64 ll;
  53                 struct {
  54                         u32 low, high;
  55                 } l;
  56         } u, res;
  57         u64 rl, rh;
  58
  59         u.ll = a;
  60         rl = (u64)u.l.low * (u64)b;
  61         rh = (u64)u.l.high * (u64)b;
  62         rh += (rl >> 32);
  63         res.l.high = div64_u64(rh, c);
  64         res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
  65         return res.ll;
  66 }
  67
  68 static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
  69 {
  70         struct kvm_kpit_channel_state *c =
  71                 &kvm->arch.vpit->pit_state.channels[channel];
  72
  73         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  74
  75         switch (c->mode) {
  76         default:
  77         case 0:
  78         case 4:
  79                 /* XXX: just disable/enable counting */
  80                 break;
  81         case 1:
  82         case 2:
  83         case 3:
  84         case 5:
  85                 /* Restart counting on rising edge. */
  86                 if (c->gate < val)
  87                         c->count_load_time = ktime_get();
  88                 break;
  89         }
  90
  91         c->gate = val;
  92 }
  93
  94 static int pit_get_gate(struct kvm *kvm, int channel)
  95 {
  96         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
  97
  98         return kvm->arch.vpit->pit_state.channels[channel].gate;
  99 }
 100
 101 static int pit_get_count(struct kvm *kvm, int channel)
 102 {
 103         struct kvm_kpit_channel_state *c =
 104                 &kvm->arch.vpit->pit_state.channels[channel];
 105         s64 d, t;
 106         int counter;
 107
 108         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
 109
 110         t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
 111         d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
 112
 113         switch (c->mode) {
 114         case 0:
 115         case 1:
 116         case 4:
 117         case 5:
 118                 counter = (c->count - d) & 0xffff;
 119                 break;
 120         case 3:
 121                 /* XXX: may be incorrect for odd counts */
 122                 counter = c->count - (mod_64((2 * d), c->count));
 123                 break;
 124         default:
 125                 counter = c->count - mod_64(d, c->count);
 126                 break;
 127         }
 128         return counter;
 129 }
 130
 131 static int pit_get_out(struct kvm *kvm, int channel)
 132 {
 133         struct kvm_kpit_channel_state *c =
 134                 &kvm->arch.vpit->pit_state.channels[channel];
 135         s64 d, t;
 136         int out;
 137
 138         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
 139
 140         t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
 141         d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
 142
 143         switch (c->mode) {
 144         default:
 145         case 0:
 146                 out = (d >= c->count);
 147                 break;
 148         case 1:
 149                 out = (d < c->count);
 150                 break;
 151         case 2:
 152                 out = ((mod_64(d, c->count) == 0) && (d != 0));
 153                 break;
 154         case 3:
 155                 out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
 156                 break;
 157         case 4:
 158         case 5:
 159                 out = (d == c->count);
 160                 break;
 161         }
 162
 163         return out;
 164 }
 165
 166 static void pit_latch_count(struct kvm *kvm, int channel)
 167 {
 168         struct kvm_kpit_channel_state *c =
 169                 &kvm->arch.vpit->pit_state.channels[channel];
 170
 171         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
 172
 173         if (!c->count_latched) {
 174                 c->latched_count = pit_get_count(kvm, channel);
 175                 c->count_latched = c->rw_mode;
 176         }
 177 }
 178
 179 static void pit_latch_status(struct kvm *kvm, int channel)
 180 {
 181         struct kvm_kpit_channel_state *c =
 182                 &kvm->arch.vpit->pit_state.channels[channel];
 183
 184         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
 185
 186         if (!c->status_latched) {
 187                 /* TODO: Return NULL COUNT (bit 6). */
 188                 c->status = ((pit_get_out(kvm, channel) << 7) |
 189                                 (c->rw_mode << 4) |
 190                                 (c->mode << 1) |
 191                                 c->bcd);
 192                 c->status_latched = 1;
 193         }
 194 }
 195
 196 static int __pit_timer_fn(struct kvm_kpit_state *ps)
 197 {
 198         struct kvm_vcpu *vcpu0 = ps->pit->kvm->vcpus[0];
 199         struct kvm_kpit_timer *pt = &ps->pit_timer;
 200
 201         if (!atomic_inc_and_test(&pt->pending))
 202                 set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests);
 203
 204         if (!pt->reinject)
 205                 atomic_set(&pt->pending, 1);
 206
 207         if (vcpu0 && waitqueue_active(&vcpu0->wq))
 208                 wake_up_interruptible(&vcpu0->wq);
 209
 210         hrtimer_add_expires_ns(&pt->timer, pt->period);
 211         if (pt->period)
 212                 ps->channels[0].count_load_time = ktime_get();
 213
 214         return (pt->period == 0 ? 0 : 1);
 215 }
 216
 217 int pit_has_pending_timer(struct kvm_vcpu *vcpu)
 218 {
 219         struct kvm_pit *pit = vcpu->kvm->arch.vpit;
 220
 221         if (pit && vcpu->vcpu_id == 0 && pit->pit_state.irq_ack)
 222                 return atomic_read(&pit->pit_state.pit_timer.pending);
 223         return 0;
 224 }
 225
 226 static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
 227 {
 228         struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
 229                                                  irq_ack_notifier);
 230         spin_lock(&ps->inject_lock);
 231         if (atomic_dec_return(&ps->pit_timer.pending) < 0)
 232                 atomic_inc(&ps->pit_timer.pending);
 233         ps->irq_ack = 1;
 234         spin_unlock(&ps->inject_lock);
 235 }
 236
 237 static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
 238 {
 239         struct kvm_kpit_state *ps;
 240         int restart_timer = 0;
 241
 242         ps = container_of(data, struct kvm_kpit_state, pit_timer.timer);
 243
 244         restart_timer = __pit_timer_fn(ps);
 245
 246         if (restart_timer)
 247                 return HRTIMER_RESTART;
 248         else
 249                 return HRTIMER_NORESTART;
 250 }
 251
 252 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
 253 {
 254         struct kvm_pit *pit = vcpu->kvm->arch.vpit;
 255         struct hrtimer *timer;
 256
 257         if (vcpu->vcpu_id != 0 || !pit)
 258                 return;
 259
 260         timer = &pit->pit_state.pit_timer.timer;
 261         if (hrtimer_cancel(timer))
 262                 hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
 263 }
 264
 265 static void destroy_pit_timer(struct kvm_kpit_timer *pt)
 266 {
 267         pr_debug("pit: execute del timer!\n");
 268         hrtimer_cancel(&pt->timer);
 269 }
 270
 271 static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
 272 {
 273         struct kvm_kpit_timer *pt = &ps->pit_timer;
 274         s64 interval;
 275
 276         interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
 277
 278         pr_debug("pit: create pit timer, interval is %llu nsec\n", interval);
 279
 280         /* TODO The new value only affected after the retriggered */
 281         hrtimer_cancel(&pt->timer);
 282         pt->period = (is_period == 0) ? 0 : interval;
 283         pt->timer.function = pit_timer_fn;
 284         atomic_set(&pt->pending, 0);
 285         ps->irq_ack = 1;
 286
 287         hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval),
 288                       HRTIMER_MODE_ABS);
 289 }
 290
 291 static void pit_load_count(struct kvm *kvm, int channel, u32 val)
 292 {
 293         struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
 294
 295         WARN_ON(!mutex_is_locked(&ps->lock));
 296
 297         pr_debug("pit: load_count val is %d, channel is %d\n", val, channel);
 298
 299         /*
 300          * Though spec said the state of 8254 is undefined after power-up,
 301          * seems some tricky OS like Windows XP depends on IRQ0 interrupt
 302          * when booting up.
 303          * So here setting initialize rate for it, and not a specific number
 304          */
 305         if (val == 0)
 306                 val = 0x10000;
 307
 308         ps->channels[channel].count_load_time = ktime_get();
 309         ps->channels[channel].count = val;
 310
 311         if (channel != 0)
 312                 return;
 313
 314         /* Two types of timer
 315          * mode 1 is one shot, mode 2 is period, otherwise del timer */
 316         switch (ps->channels[0].mode) {
 317         case 1:
 318         /* FIXME: enhance mode 4 precision */
 319         case 4:
 320                 create_pit_timer(ps, val, 0);
 321                 break;
 322         case 2:
 323         case 3:
 324                 create_pit_timer(ps, val, 1);
 325                 break;
 326         default:
 327                 destroy_pit_timer(&ps->pit_timer);
 328         }
 329 }
 330
 331 void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val)
 332 {
 333         mutex_lock(&kvm->arch.vpit->pit_state.lock);
 334         pit_load_count(kvm, channel, val);
 335         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
 336 }
 337
 338 static void pit_ioport_write(struct kvm_io_device *this,
 339                              gpa_t addr, int len, const void *data)
 340 {
 341         struct kvm_pit *pit = (struct kvm_pit *)this->private;
 342         struct kvm_kpit_state *pit_state = &pit->pit_state;
 343         struct kvm *kvm = pit->kvm;
 344         int channel, access;
 345         struct kvm_kpit_channel_state *s;
 346         u32 val = *(u32 *) data;
 347
 348         val  &= 0xff;
 349         addr &= KVM_PIT_CHANNEL_MASK;
 350
 351         mutex_lock(&pit_state->lock);
 352
 353         if (val != 0)
 354                 pr_debug("pit: write addr is 0x%x, len is %d, val is 0x%x\n",
 355                           (unsigned int)addr, len, val);
 356
 357         if (addr == 3) {
 358                 channel = val >> 6;
 359                 if (channel == 3) {
 360                         /* Read-Back Command. */
 361                         for (channel = 0; channel < 3; channel++) {
 362                                 s = &pit_state->channels[channel];
 363                                 if (val & (2 << channel)) {
 364                                         if (!(val & 0x20))
 365                                                 pit_latch_count(kvm, channel);
 366                                         if (!(val & 0x10))
 367                                                 pit_latch_status(kvm, channel);
 368                                 }
 369                         }
 370                 } else {
 371                         /* Select Counter <channel>. */
 372                         s = &pit_state->channels[channel];
 373                         access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
 374                         if (access == 0) {
 375                                 pit_latch_count(kvm, channel);
 376                         } else {
 377                                 s->rw_mode = access;
 378                                 s->read_state = access;
 379                                 s->write_state = access;
 380                                 s->mode = (val >> 1) & 7;
 381                                 if (s->mode > 5)
 382                                         s->mode -= 4;
 383                                 s->bcd = val & 1;
 384                         }
 385                 }
 386         } else {
 387                 /* Write Count. */
 388                 s = &pit_state->channels[addr];
 389                 switch (s->write_state) {
 390                 default:
 391                 case RW_STATE_LSB:
 392                         pit_load_count(kvm, addr, val);
 393                         break;
 394                 case RW_STATE_MSB:
 395                         pit_load_count(kvm, addr, val << 8);
 396                         break;
 397                 case RW_STATE_WORD0:
 398                         s->write_latch = val;
 399                         s->write_state = RW_STATE_WORD1;
 400                         break;
 401                 case RW_STATE_WORD1:
 402                         pit_load_count(kvm, addr, s->write_latch | (val << 8));
 403                         s->write_state = RW_STATE_WORD0;
 404                         break;
 405                 }
 406         }
 407
 408         mutex_unlock(&pit_state->lock);
 409 }
 410
 411 static void pit_ioport_read(struct kvm_io_device *this,
 412                             gpa_t addr, int len, void *data)
 413 {
 414         struct kvm_pit *pit = (struct kvm_pit *)this->private;
 415         struct kvm_kpit_state *pit_state = &pit->pit_state;
 416         struct kvm *kvm = pit->kvm;
 417         int ret, count;
 418         struct kvm_kpit_channel_state *s;
 419
 420         addr &= KVM_PIT_CHANNEL_MASK;
 421         s = &pit_state->channels[addr];
 422
 423         mutex_lock(&pit_state->lock);
 424
 425         if (s->status_latched) {
 426                 s->status_latched = 0;
 427                 ret = s->status;
 428         } else if (s->count_latched) {
 429                 switch (s->count_latched) {
 430                 default:
 431                 case RW_STATE_LSB:
 432                         ret = s->latched_count & 0xff;
 433                         s->count_latched = 0;
 434                         break;
 435                 case RW_STATE_MSB:
 436                         ret = s->latched_count >> 8;
 437                         s->count_latched = 0;
 438                         break;
 439                 case RW_STATE_WORD0:
 440                         ret = s->latched_count & 0xff;
 441                         s->count_latched = RW_STATE_MSB;
 442                         break;
 443                 }
 444         } else {
 445                 switch (s->read_state) {
 446                 default:
 447                 case RW_STATE_LSB:
 448                         count = pit_get_count(kvm, addr);
 449                         ret = count & 0xff;
 450                         break;
 451                 case RW_STATE_MSB:
 452                         count = pit_get_count(kvm, addr);
 453                         ret = (count >> 8) & 0xff;
 454                         break;
 455                 case RW_STATE_WORD0:
 456                         count = pit_get_count(kvm, addr);
 457                         ret = count & 0xff;
 458                         s->read_state = RW_STATE_WORD1;
 459                         break;
 460                 case RW_STATE_WORD1:
 461                         count = pit_get_count(kvm, addr);
 462                         ret = (count >> 8) & 0xff;
 463                         s->read_state = RW_STATE_WORD0;
 464                         break;
 465                 }
 466         }
 467
 468         if (len > sizeof(ret))
 469                 len = sizeof(ret);
 470         memcpy(data, (char *)&ret, len);
 471
 472         mutex_unlock(&pit_state->lock);
 473 }
 474
 475 static int pit_in_range(struct kvm_io_device *this, gpa_t addr,
 476                         int len, int is_write)
 477 {
 478         return ((addr >= KVM_PIT_BASE_ADDRESS) &&
 479                 (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
 480 }
 481
 482 static void speaker_ioport_write(struct kvm_io_device *this,
 483                                  gpa_t addr, int len, const void *data)
 484 {
 485         struct kvm_pit *pit = (struct kvm_pit *)this->private;
 486         struct kvm_kpit_state *pit_state = &pit->pit_state;
 487         struct kvm *kvm = pit->kvm;
 488         u32 val = *(u32 *) data;
 489
 490         mutex_lock(&pit_state->lock);
 491         pit_state->speaker_data_on = (val >> 1) & 1;
 492         pit_set_gate(kvm, 2, val & 1);
 493         mutex_unlock(&pit_state->lock);
 494 }
 495
 496 static void speaker_ioport_read(struct kvm_io_device *this,
 497                                 gpa_t addr, int len, void *data)
 498 {
 499         struct kvm_pit *pit = (struct kvm_pit *)this->private;
 500         struct kvm_kpit_state *pit_state = &pit->pit_state;
 501         struct kvm *kvm = pit->kvm;
 502         unsigned int refresh_clock;
 503         int ret;
 504
 505         /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
 506         refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
 507
 508         mutex_lock(&pit_state->lock);
 509         ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
 510                 (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
 511         if (len > sizeof(ret))
 512                 len = sizeof(ret);
 513         memcpy(data, (char *)&ret, len);
 514         mutex_unlock(&pit_state->lock);
 515 }
 516
 517 static int speaker_in_range(struct kvm_io_device *this, gpa_t addr,
 518                             int len, int is_write)
 519 {
 520         return (addr == KVM_SPEAKER_BASE_ADDRESS);
 521 }
 522
 523 void kvm_pit_reset(struct kvm_pit *pit)
 524 {
 525         int i;
 526         struct kvm_kpit_channel_state *c;
 527
 528         mutex_lock(&pit->pit_state.lock);
 529         for (i = 0; i < 3; i++) {
 530                 c = &pit->pit_state.channels[i];
 531                 c->mode = 0xff;
 532                 c->gate = (i != 2);
 533                 pit_load_count(pit->kvm, i, 0);
 534         }
 535         mutex_unlock(&pit->pit_state.lock);
 536
 537         atomic_set(&pit->pit_state.pit_timer.pending, 0);
 538         pit->pit_state.irq_ack = 1;
 539 }
 540
 541 static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask)
 542 {
 543         struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier);
 544
 545         if (!mask) {
 546                 atomic_set(&pit->pit_state.pit_timer.pending, 0);
 547                 pit->pit_state.irq_ack = 1;
 548         }
 549 }
 550
 551 struct kvm_pit *kvm_create_pit(struct kvm *kvm)
 552 {
 553         struct kvm_pit *pit;
 554         struct kvm_kpit_state *pit_state;
 555
 556         pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
 557         if (!pit)
 558                 return NULL;
 559
 560         pit->irq_source_id = kvm_request_irq_source_id(kvm);
 561         if (pit->irq_source_id < 0) {
 562                 kfree(pit);
 563                 return NULL;
 564         }
 565
 566         mutex_init(&pit->pit_state.lock);
 567         mutex_lock(&pit->pit_state.lock);
 568         spin_lock_init(&pit->pit_state.inject_lock);
 569
 570         /* Initialize PIO device */
 571         pit->dev.read = pit_ioport_read;
 572         pit->dev.write = pit_ioport_write;
 573         pit->dev.in_range = pit_in_range;
 574         pit->dev.private = pit;
 575         kvm_io_bus_register_dev(&kvm->pio_bus, &pit->dev);
 576
 577         pit->speaker_dev.read = speaker_ioport_read;
 578         pit->speaker_dev.write = speaker_ioport_write;
 579         pit->speaker_dev.in_range = speaker_in_range;
 580         pit->speaker_dev.private = pit;
 581         kvm_io_bus_register_dev(&kvm->pio_bus, &pit->speaker_dev);
 582
 583         kvm->arch.vpit = pit;
 584         pit->kvm = kvm;
 585
 586         pit_state = &pit->pit_state;
 587         pit_state->pit = pit;
 588         hrtimer_init(&pit_state->pit_timer.timer,
 589                      CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 590         pit_state->irq_ack_notifier.gsi = 0;
 591         pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
 592         kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
 593         pit_state->pit_timer.reinject = true;
 594         mutex_unlock(&pit->pit_state.lock);
 595
 596         kvm_pit_reset(pit);
 597
 598         pit->mask_notifier.func = pit_mask_notifer;
 599         kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
 600
 601         return pit;
 602 }
 603
 604 void kvm_free_pit(struct kvm *kvm)
 605 {
 606         struct hrtimer *timer;
 607
 608         if (kvm->arch.vpit) {
 609                 kvm_unregister_irq_mask_notifier(kvm, 0,
 610                                                &kvm->arch.vpit->mask_notifier);
 611                 mutex_lock(&kvm->arch.vpit->pit_state.lock);
 612                 timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
 613                 hrtimer_cancel(timer);
 614                 kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id);
 615                 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
 616                 kfree(kvm->arch.vpit);
 617         }
 618 }
 619
 620 static void __inject_pit_timer_intr(struct kvm *kvm)
 621 {
 622         struct kvm_vcpu *vcpu;
 623         int i;
 624
 625         mutex_lock(&kvm->lock);
 626         kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1);
 627         kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0);
 628         mutex_unlock(&kvm->lock);
 629
 630         /*
 631          * Provides NMI watchdog support via Virtual Wire mode.
 632          * The route is: PIT -> PIC -> LVT0 in NMI mode.
 633          *
 634          * Note: Our Virtual Wire implementation is simplified, only
 635          * propagating PIT interrupts to all VCPUs when they have set
 636          * LVT0 to NMI delivery. Other PIC interrupts are just sent to
 637          * VCPU0, and only if its LVT0 is in EXTINT mode.
 638          */
 639         if (kvm->arch.vapics_in_nmi_mode > 0)
 640                 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
 641                         vcpu = kvm->vcpus[i];
 642                         if (vcpu)
 643                                 kvm_apic_nmi_wd_deliver(vcpu);
 644                 }
 645 }
 646
 647 void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu)
 648 {
 649         struct kvm_pit *pit = vcpu->kvm->arch.vpit;
 650         struct kvm *kvm = vcpu->kvm;
 651         struct kvm_kpit_state *ps;
 652
 653         if (vcpu && pit) {
 654                 int inject = 0;
 655                 ps = &pit->pit_state;
 656
 657                 /* Try to inject pending interrupts when
 658                  * last one has been acked.
 659                  */
 660                 spin_lock(&ps->inject_lock);
 661                 if (atomic_read(&ps->pit_timer.pending) && ps->irq_ack) {
 662                         ps->irq_ack = 0;
 663                         inject = 1;
 664                 }
 665                 spin_unlock(&ps->inject_lock);
 666                 if (inject)
 667                         __inject_pit_timer_intr(kvm);
 668         }
 669 }