2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
16 * Copyright (C) 2007 Alan Stern
17 * Copyright (C) 2009 IBM Corporation
18 * Copyright (C) 2009 Frederic Weisbecker <fweisbec@gmail.com>
20 * Authors: Alan Stern <stern@rowland.harvard.edu>
21 * K.Prasad <prasad@linux.vnet.ibm.com>
22 * Frederic Weisbecker <fweisbec@gmail.com>
26 * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
27 * using the CPU's debug registers.
30 #include <linux/perf_event.h>
31 #include <linux/hw_breakpoint.h>
32 #include <linux/irqflags.h>
33 #include <linux/notifier.h>
34 #include <linux/kallsyms.h>
35 #include <linux/kprobes.h>
36 #include <linux/percpu.h>
37 #include <linux/kdebug.h>
38 #include <linux/kernel.h>
39 #include <linux/module.h>
40 #include <linux/sched.h>
41 #include <linux/init.h>
42 #include <linux/smp.h>
44 #include <asm/hw_breakpoint.h>
45 #include <asm/processor.h>
46 #include <asm/debugreg.h>
48 /* Per cpu debug control register value */
49 DEFINE_PER_CPU(unsigned long, cpu_dr7);
50 EXPORT_PER_CPU_SYMBOL(cpu_dr7);
52 /* Per cpu debug address registers values */
53 static DEFINE_PER_CPU(unsigned long, cpu_debugreg[HBP_NUM]);
56 * Stores the breakpoints currently in use on each breakpoint address
57 * register for each cpus
59 static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
62 static inline unsigned long
63 __encode_dr7(int drnum, unsigned int len, unsigned int type)
65 unsigned long bp_info;
67 bp_info = (len | type) & 0xf;
68 bp_info <<= (DR_CONTROL_SHIFT + drnum * DR_CONTROL_SIZE);
69 bp_info |= (DR_GLOBAL_ENABLE << (drnum * DR_ENABLE_SIZE));
75 * Encode the length, type, Exact, and Enable bits for a particular breakpoint
76 * as stored in debug register 7.
78 unsigned long encode_dr7(int drnum, unsigned int len, unsigned int type)
80 return __encode_dr7(drnum, len, type) | DR_GLOBAL_SLOWDOWN;
84 * Decode the length and type bits for a particular breakpoint as
85 * stored in debug register 7. Return the "enabled" status.
87 int decode_dr7(unsigned long dr7, int bpnum, unsigned *len, unsigned *type)
89 int bp_info = dr7 >> (DR_CONTROL_SHIFT + bpnum * DR_CONTROL_SIZE);
91 *len = (bp_info & 0xc) | 0x40;
92 *type = (bp_info & 0x3) | 0x80;
94 return (dr7 >> (bpnum * DR_ENABLE_SIZE)) & 0x3;
98 * Install a perf counter breakpoint.
100 * We seek a free debug address register and use it for this
101 * breakpoint. Eventually we enable it in the debug control register.
103 * Atomic: we hold the counter->ctx->lock and we only handle variables
104 * and registers local to this cpu.
106 int arch_install_hw_breakpoint(struct perf_event *bp)
108 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
112 for (i = 0; i < HBP_NUM; i++) {
113 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
121 if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
124 set_debugreg(info->address, i);
125 __get_cpu_var(cpu_debugreg[i]) = info->address;
127 dr7 = &__get_cpu_var(cpu_dr7);
128 *dr7 |= encode_dr7(i, info->len, info->type);
130 set_debugreg(*dr7, 7);
136 * Uninstall the breakpoint contained in the given counter.
138 * First we search the debug address register it uses and then we disable
141 * Atomic: we hold the counter->ctx->lock and we only handle variables
142 * and registers local to this cpu.
144 void arch_uninstall_hw_breakpoint(struct perf_event *bp)
146 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
150 for (i = 0; i < HBP_NUM; i++) {
151 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
159 if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
162 dr7 = &__get_cpu_var(cpu_dr7);
163 *dr7 &= ~__encode_dr7(i, info->len, info->type);
165 set_debugreg(*dr7, 7);
168 static int get_hbp_len(u8 hbp_len)
170 unsigned int len_in_bytes = 0;
173 case X86_BREAKPOINT_LEN_1:
176 case X86_BREAKPOINT_LEN_2:
179 case X86_BREAKPOINT_LEN_4:
183 case X86_BREAKPOINT_LEN_8:
192 * Check for virtual address in user space.
194 int arch_check_va_in_userspace(unsigned long va, u8 hbp_len)
198 len = get_hbp_len(hbp_len);
200 return (va <= TASK_SIZE - len);
204 * Check for virtual address in kernel space.
206 static int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len)
210 len = get_hbp_len(hbp_len);
212 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
215 int arch_bp_generic_fields(int x86_len, int x86_type,
216 int *gen_len, int *gen_type)
220 case X86_BREAKPOINT_LEN_1:
221 *gen_len = HW_BREAKPOINT_LEN_1;
223 case X86_BREAKPOINT_LEN_2:
224 *gen_len = HW_BREAKPOINT_LEN_2;
226 case X86_BREAKPOINT_LEN_4:
227 *gen_len = HW_BREAKPOINT_LEN_4;
230 case X86_BREAKPOINT_LEN_8:
231 *gen_len = HW_BREAKPOINT_LEN_8;
240 case X86_BREAKPOINT_EXECUTE:
241 *gen_type = HW_BREAKPOINT_X;
243 case X86_BREAKPOINT_WRITE:
244 *gen_type = HW_BREAKPOINT_W;
246 case X86_BREAKPOINT_RW:
247 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
257 static int arch_build_bp_info(struct perf_event *bp)
259 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
261 info->address = bp->attr.bp_addr;
264 switch (bp->attr.bp_len) {
265 case HW_BREAKPOINT_LEN_1:
266 info->len = X86_BREAKPOINT_LEN_1;
268 case HW_BREAKPOINT_LEN_2:
269 info->len = X86_BREAKPOINT_LEN_2;
271 case HW_BREAKPOINT_LEN_4:
272 info->len = X86_BREAKPOINT_LEN_4;
275 case HW_BREAKPOINT_LEN_8:
276 info->len = X86_BREAKPOINT_LEN_8;
284 switch (bp->attr.bp_type) {
285 case HW_BREAKPOINT_W:
286 info->type = X86_BREAKPOINT_WRITE;
288 case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
289 info->type = X86_BREAKPOINT_RW;
291 case HW_BREAKPOINT_X:
292 info->type = X86_BREAKPOINT_EXECUTE;
301 * Validate the arch-specific HW Breakpoint register settings
303 int arch_validate_hwbkpt_settings(struct perf_event *bp,
304 struct task_struct *tsk)
306 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
311 ret = arch_build_bp_info(bp);
317 if (info->type == X86_BREAKPOINT_EXECUTE)
319 * Ptrace-refactoring code
320 * For now, we'll allow instruction breakpoint only for user-space
323 if ((!arch_check_va_in_userspace(info->address, info->len)) &&
324 info->len != X86_BREAKPOINT_EXECUTE)
328 case X86_BREAKPOINT_LEN_1:
331 case X86_BREAKPOINT_LEN_2:
334 case X86_BREAKPOINT_LEN_4:
338 case X86_BREAKPOINT_LEN_8:
347 * For kernel-addresses, either the address or symbol name can be
351 info->address = (unsigned long)
352 kallsyms_lookup_name(info->name);
354 * Check that the low-order bits of the address are appropriate
355 * for the alignment implied by len.
357 if (info->address & align)
360 /* Check that the virtual address is in the proper range */
362 if (!arch_check_va_in_userspace(info->address, info->len))
365 if (!arch_check_va_in_kernelspace(info->address, info->len))
373 * Dump the debug register contents to the user.
374 * We can't dump our per cpu values because it
375 * may contain cpu wide breakpoint, something that
376 * doesn't belong to the current task.
378 * TODO: include non-ptrace user breakpoints (perf)
380 void aout_dump_debugregs(struct user *dump)
384 struct perf_event *bp;
385 struct arch_hw_breakpoint *info;
386 struct thread_struct *thread = ¤t->thread;
388 for (i = 0; i < HBP_NUM; i++) {
389 bp = thread->ptrace_bps[i];
391 if (bp && !bp->attr.disabled) {
392 dump->u_debugreg[i] = bp->attr.bp_addr;
393 info = counter_arch_bp(bp);
394 dr7 |= encode_dr7(i, info->len, info->type);
396 dump->u_debugreg[i] = 0;
400 dump->u_debugreg[4] = 0;
401 dump->u_debugreg[5] = 0;
402 dump->u_debugreg[6] = current->thread.debugreg6;
404 dump->u_debugreg[7] = dr7;
406 EXPORT_SYMBOL_GPL(aout_dump_debugregs);
409 * Release the user breakpoints used by ptrace
411 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
414 struct thread_struct *t = &tsk->thread;
416 for (i = 0; i < HBP_NUM; i++) {
417 unregister_hw_breakpoint(t->ptrace_bps[i]);
418 t->ptrace_bps[i] = NULL;
422 void hw_breakpoint_restore(void)
424 set_debugreg(__get_cpu_var(cpu_debugreg[0]), 0);
425 set_debugreg(__get_cpu_var(cpu_debugreg[1]), 1);
426 set_debugreg(__get_cpu_var(cpu_debugreg[2]), 2);
427 set_debugreg(__get_cpu_var(cpu_debugreg[3]), 3);
428 set_debugreg(current->thread.debugreg6, 6);
429 set_debugreg(__get_cpu_var(cpu_dr7), 7);
431 EXPORT_SYMBOL_GPL(hw_breakpoint_restore);
434 * Handle debug exception notifications.
436 * Return value is either NOTIFY_STOP or NOTIFY_DONE as explained below.
438 * NOTIFY_DONE returned if one of the following conditions is true.
439 * i) When the causative address is from user-space and the exception
440 * is a valid one, i.e. not triggered as a result of lazy debug register
442 * ii) When there are more bits than trap<n> set in DR6 register (such
443 * as BD, BS or BT) indicating that more than one debug condition is
444 * met and requires some more action in do_debug().
446 * NOTIFY_STOP returned for all other cases
449 static int __kprobes hw_breakpoint_handler(struct die_args *args)
451 int i, cpu, rc = NOTIFY_STOP;
452 struct perf_event *bp;
453 unsigned long dr7, dr6;
454 unsigned long *dr6_p;
456 /* The DR6 value is pointed by args->err */
457 dr6_p = (unsigned long *)ERR_PTR(args->err);
460 /* Do an early return if no trap bits are set in DR6 */
461 if ((dr6 & DR_TRAP_BITS) == 0)
464 get_debugreg(dr7, 7);
465 /* Disable breakpoints during exception handling */
466 set_debugreg(0UL, 7);
468 * Assert that local interrupts are disabled
469 * Reset the DRn bits in the virtualized register value.
470 * The ptrace trigger routine will add in whatever is needed.
472 current->thread.debugreg6 &= ~DR_TRAP_BITS;
475 /* Handle all the breakpoints that were triggered */
476 for (i = 0; i < HBP_NUM; ++i) {
477 if (likely(!(dr6 & (DR_TRAP0 << i))))
481 * The counter may be concurrently released but that can only
482 * occur from a call_rcu() path. We can then safely fetch
483 * the breakpoint, use its callback, touch its counter
484 * while we are in an rcu_read_lock() path.
488 bp = per_cpu(bp_per_reg[i], cpu);
490 * Reset the 'i'th TRAP bit in dr6 to denote completion of
493 (*dr6_p) &= ~(DR_TRAP0 << i);
495 * bp can be NULL due to lazy debug register switching
496 * or due to concurrent perf counter removing.
503 perf_bp_event(bp, args->regs);
508 * Further processing in do_debug() is needed for a) user-space
509 * breakpoints (to generate signals) and b) when the system has
510 * taken exception due to multiple causes
512 if ((current->thread.debugreg6 & DR_TRAP_BITS) ||
513 (dr6 & (~DR_TRAP_BITS)))
516 set_debugreg(dr7, 7);
523 * Handle debug exception notifications.
525 int __kprobes hw_breakpoint_exceptions_notify(
526 struct notifier_block *unused, unsigned long val, void *data)
528 if (val != DIE_DEBUG)
531 return hw_breakpoint_handler(data);
534 void hw_breakpoint_pmu_read(struct perf_event *bp)
539 void hw_breakpoint_pmu_unthrottle(struct perf_event *bp)