SAFE public projects git trees. - safe/jmp/linux-2.6/blob - arch/x86/kernel/hpet.c

   1 #include <linux/clocksource.h>
   2 #include <linux/clockchips.h>
   3 #include <linux/interrupt.h>
   4 #include <linux/sysdev.h>
   5 #include <linux/delay.h>
   6 #include <linux/errno.h>
   7 #include <linux/hpet.h>
   8 #include <linux/init.h>
   9 #include <linux/cpu.h>
  10 #include <linux/pm.h>
  11 #include <linux/io.h>
  12
  13 #include <asm/fixmap.h>
  14 #include <asm/i8253.h>
  15 #include <asm/hpet.h>
  16
  17 #define HPET_MASK                       CLOCKSOURCE_MASK(32)
  18 #define HPET_SHIFT                      22
  19
  20 /* FSEC = 10^-15
  21    NSEC = 10^-9 */
  22 #define FSEC_PER_NSEC                   1000000L
  23
  24 #define HPET_DEV_USED_BIT               2
  25 #define HPET_DEV_USED                   (1 << HPET_DEV_USED_BIT)
  26 #define HPET_DEV_VALID                  0x8
  27 #define HPET_DEV_FSB_CAP                0x1000
  28 #define HPET_DEV_PERI_CAP               0x2000
  29
  30 #define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
  31
  32 /*
  33  * HPET address is set in acpi/boot.c, when an ACPI entry exists
  34  */
  35 unsigned long                           hpet_address;
  36 #ifdef CONFIG_PCI_MSI
  37 static unsigned long                    hpet_num_timers;
  38 #endif
  39 static void __iomem                     *hpet_virt_address;
  40
  41 struct hpet_dev {
  42         struct clock_event_device       evt;
  43         unsigned int                    num;
  44         int                             cpu;
  45         unsigned int                    irq;
  46         unsigned int                    flags;
  47         char                            name[10];
  48 };
  49
  50 unsigned long hpet_readl(unsigned long a)
  51 {
  52         return readl(hpet_virt_address + a);
  53 }
  54
  55 static inline void hpet_writel(unsigned long d, unsigned long a)
  56 {
  57         writel(d, hpet_virt_address + a);
  58 }
  59
  60 #ifdef CONFIG_X86_64
  61 #include <asm/pgtable.h>
  62 #endif
  63
  64 static inline void hpet_set_mapping(void)
  65 {
  66         hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
  67 #ifdef CONFIG_X86_64
  68         __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
  69 #endif
  70 }
  71
  72 static inline void hpet_clear_mapping(void)
  73 {
  74         iounmap(hpet_virt_address);
  75         hpet_virt_address = NULL;
  76 }
  77
  78 /*
  79  * HPET command line enable / disable
  80  */
  81 static int boot_hpet_disable;
  82 int hpet_force_user;
  83 static int hpet_verbose;
  84
  85 static int __init hpet_setup(char *str)
  86 {
  87         if (str) {
  88                 if (!strncmp("disable", str, 7))
  89                         boot_hpet_disable = 1;
  90                 if (!strncmp("force", str, 5))
  91                         hpet_force_user = 1;
  92                 if (!strncmp("verbose", str, 7))
  93                         hpet_verbose = 1;
  94         }
  95         return 1;
  96 }
  97 __setup("hpet=", hpet_setup);
  98
  99 static int __init disable_hpet(char *str)
 100 {
 101         boot_hpet_disable = 1;
 102         return 1;
 103 }
 104 __setup("nohpet", disable_hpet);
 105
 106 static inline int is_hpet_capable(void)
 107 {
 108         return !boot_hpet_disable && hpet_address;
 109 }
 110
 111 /*
 112  * HPET timer interrupt enable / disable
 113  */
 114 static int hpet_legacy_int_enabled;
 115
 116 /**
 117  * is_hpet_enabled - check whether the hpet timer interrupt is enabled
 118  */
 119 int is_hpet_enabled(void)
 120 {
 121         return is_hpet_capable() && hpet_legacy_int_enabled;
 122 }
 123 EXPORT_SYMBOL_GPL(is_hpet_enabled);
 124
 125 static void _hpet_print_config(const char *function, int line)
 126 {
 127         u32 i, timers, l, h;
 128         printk(KERN_INFO "hpet: %s(%d):\n", function, line);
 129         l = hpet_readl(HPET_ID);
 130         h = hpet_readl(HPET_PERIOD);
 131         timers = ((l & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
 132         printk(KERN_INFO "hpet: ID: 0x%x, PERIOD: 0x%x\n", l, h);
 133         l = hpet_readl(HPET_CFG);
 134         h = hpet_readl(HPET_STATUS);
 135         printk(KERN_INFO "hpet: CFG: 0x%x, STATUS: 0x%x\n", l, h);
 136         l = hpet_readl(HPET_COUNTER);
 137         h = hpet_readl(HPET_COUNTER+4);
 138         printk(KERN_INFO "hpet: COUNTER_l: 0x%x, COUNTER_h: 0x%x\n", l, h);
 139
 140         for (i = 0; i < timers; i++) {
 141                 l = hpet_readl(HPET_Tn_CFG(i));
 142                 h = hpet_readl(HPET_Tn_CFG(i)+4);
 143                 printk(KERN_INFO "hpet: T%d: CFG_l: 0x%x, CFG_h: 0x%x\n",
 144                        i, l, h);
 145                 l = hpet_readl(HPET_Tn_CMP(i));
 146                 h = hpet_readl(HPET_Tn_CMP(i)+4);
 147                 printk(KERN_INFO "hpet: T%d: CMP_l: 0x%x, CMP_h: 0x%x\n",
 148                        i, l, h);
 149                 l = hpet_readl(HPET_Tn_ROUTE(i));
 150                 h = hpet_readl(HPET_Tn_ROUTE(i)+4);
 151                 printk(KERN_INFO "hpet: T%d ROUTE_l: 0x%x, ROUTE_h: 0x%x\n",
 152                        i, l, h);
 153         }
 154 }
 155
 156 #define hpet_print_config()                                     \
 157 do {                                                            \
 158         if (hpet_verbose)                                       \
 159                 _hpet_print_config(__FUNCTION__, __LINE__);     \
 160 } while (0)
 161
 162 /*
 163  * When the hpet driver (/dev/hpet) is enabled, we need to reserve
 164  * timer 0 and timer 1 in case of RTC emulation.
 165  */
 166 #ifdef CONFIG_HPET
 167
 168 static void hpet_reserve_msi_timers(struct hpet_data *hd);
 169
 170 static void hpet_reserve_platform_timers(unsigned long id)
 171 {
 172         struct hpet __iomem *hpet = hpet_virt_address;
 173         struct hpet_timer __iomem *timer = &hpet->hpet_timers[2];
 174         unsigned int nrtimers, i;
 175         struct hpet_data hd;
 176
 177         nrtimers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
 178
 179         memset(&hd, 0, sizeof(hd));
 180         hd.hd_phys_address      = hpet_address;
 181         hd.hd_address           = hpet;
 182         hd.hd_nirqs             = nrtimers;
 183         hpet_reserve_timer(&hd, 0);
 184
 185 #ifdef CONFIG_HPET_EMULATE_RTC
 186         hpet_reserve_timer(&hd, 1);
 187 #endif
 188
 189         /*
 190          * NOTE that hd_irq[] reflects IOAPIC input pins (LEGACY_8254
 191          * is wrong for i8259!) not the output IRQ.  Many BIOS writers
 192          * don't bother configuring *any* comparator interrupts.
 193          */
 194         hd.hd_irq[0] = HPET_LEGACY_8254;
 195         hd.hd_irq[1] = HPET_LEGACY_RTC;
 196
 197         for (i = 2; i < nrtimers; timer++, i++) {
 198                 hd.hd_irq[i] = (readl(&timer->hpet_config) &
 199                         Tn_INT_ROUTE_CNF_MASK) >> Tn_INT_ROUTE_CNF_SHIFT;
 200         }
 201
 202         hpet_reserve_msi_timers(&hd);
 203
 204         hpet_alloc(&hd);
 205
 206 }
 207 #else
 208 static void hpet_reserve_platform_timers(unsigned long id) { }
 209 #endif
 210
 211 /*
 212  * Common hpet info
 213  */
 214 static unsigned long hpet_period;
 215
 216 static void hpet_legacy_set_mode(enum clock_event_mode mode,
 217                           struct clock_event_device *evt);
 218 static int hpet_legacy_next_event(unsigned long delta,
 219                            struct clock_event_device *evt);
 220
 221 /*
 222  * The hpet clock event device
 223  */
 224 static struct clock_event_device hpet_clockevent = {
 225         .name           = "hpet",
 226         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 227         .set_mode       = hpet_legacy_set_mode,
 228         .set_next_event = hpet_legacy_next_event,
 229         .shift          = 32,
 230         .irq            = 0,
 231         .rating         = 50,
 232 };
 233
 234 static void hpet_stop_counter(void)
 235 {
 236         unsigned long cfg = hpet_readl(HPET_CFG);
 237         cfg &= ~HPET_CFG_ENABLE;
 238         hpet_writel(cfg, HPET_CFG);
 239 }
 240
 241 static void hpet_reset_counter(void)
 242 {
 243         hpet_writel(0, HPET_COUNTER);
 244         hpet_writel(0, HPET_COUNTER + 4);
 245 }
 246
 247 static void hpet_start_counter(void)
 248 {
 249         unsigned long cfg = hpet_readl(HPET_CFG);
 250         cfg |= HPET_CFG_ENABLE;
 251         hpet_writel(cfg, HPET_CFG);
 252 }
 253
 254 static void hpet_restart_counter(void)
 255 {
 256         hpet_stop_counter();
 257         hpet_reset_counter();
 258         hpet_start_counter();
 259 }
 260
 261 static void hpet_resume_device(void)
 262 {
 263         force_hpet_resume();
 264 }
 265
 266 static void hpet_resume_counter(void)
 267 {
 268         hpet_resume_device();
 269         hpet_restart_counter();
 270 }
 271
 272 static void hpet_enable_legacy_int(void)
 273 {
 274         unsigned long cfg = hpet_readl(HPET_CFG);
 275
 276         cfg |= HPET_CFG_LEGACY;
 277         hpet_writel(cfg, HPET_CFG);
 278         hpet_legacy_int_enabled = 1;
 279 }
 280
 281 static void hpet_legacy_clockevent_register(void)
 282 {
 283         /* Start HPET legacy interrupts */
 284         hpet_enable_legacy_int();
 285
 286         /*
 287          * The mult factor is defined as (include/linux/clockchips.h)
 288          *  mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h)
 289          * hpet_period is in units of femtoseconds (per cycle), so
 290          *  mult/2^shift = cyc/ns = 10^6/hpet_period
 291          *  mult = (10^6 * 2^shift)/hpet_period
 292          *  mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period
 293          */
 294         hpet_clockevent.mult = div_sc((unsigned long) FSEC_PER_NSEC,
 295                                       hpet_period, hpet_clockevent.shift);
 296         /* Calculate the min / max delta */
 297         hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
 298                                                            &hpet_clockevent);
 299         /* 5 usec minimum reprogramming delta. */
 300         hpet_clockevent.min_delta_ns = 5000;
 301
 302         /*
 303          * Start hpet with the boot cpu mask and make it
 304          * global after the IO_APIC has been initialized.
 305          */
 306         hpet_clockevent.cpumask = cpumask_of(smp_processor_id());
 307         clockevents_register_device(&hpet_clockevent);
 308         global_clock_event = &hpet_clockevent;
 309         printk(KERN_DEBUG "hpet clockevent registered\n");
 310 }
 311
 312 static int hpet_setup_msi_irq(unsigned int irq);
 313
 314 static void hpet_set_mode(enum clock_event_mode mode,
 315                           struct clock_event_device *evt, int timer)
 316 {
 317         unsigned long cfg, cmp, now;
 318         uint64_t delta;
 319
 320         switch (mode) {
 321         case CLOCK_EVT_MODE_PERIODIC:
 322                 hpet_stop_counter();
 323                 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult;
 324                 delta >>= evt->shift;
 325                 now = hpet_readl(HPET_COUNTER);
 326                 cmp = now + (unsigned long) delta;
 327                 cfg = hpet_readl(HPET_Tn_CFG(timer));
 328                 /* Make sure we use edge triggered interrupts */
 329                 cfg &= ~HPET_TN_LEVEL;
 330                 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
 331                        HPET_TN_SETVAL | HPET_TN_32BIT;
 332                 hpet_writel(cfg, HPET_Tn_CFG(timer));
 333                 hpet_writel(cmp, HPET_Tn_CMP(timer));
 334                 udelay(1);
 335                 /*
 336                  * HPET on AMD 81xx needs a second write (with HPET_TN_SETVAL
 337                  * cleared) to T0_CMP to set the period. The HPET_TN_SETVAL
 338                  * bit is automatically cleared after the first write.
 339                  * (See AMD-8111 HyperTransport I/O Hub Data Sheet,
 340                  * Publication # 24674)
 341                  */
 342                 hpet_writel((unsigned long) delta, HPET_Tn_CMP(timer));
 343                 hpet_start_counter();
 344                 hpet_print_config();
 345                 break;
 346
 347         case CLOCK_EVT_MODE_ONESHOT:
 348                 cfg = hpet_readl(HPET_Tn_CFG(timer));
 349                 cfg &= ~HPET_TN_PERIODIC;
 350                 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
 351                 hpet_writel(cfg, HPET_Tn_CFG(timer));
 352                 break;
 353
 354         case CLOCK_EVT_MODE_UNUSED:
 355         case CLOCK_EVT_MODE_SHUTDOWN:
 356                 cfg = hpet_readl(HPET_Tn_CFG(timer));
 357                 cfg &= ~HPET_TN_ENABLE;
 358                 hpet_writel(cfg, HPET_Tn_CFG(timer));
 359                 break;
 360
 361         case CLOCK_EVT_MODE_RESUME:
 362                 if (timer == 0) {
 363                         hpet_enable_legacy_int();
 364                 } else {
 365                         struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
 366                         hpet_setup_msi_irq(hdev->irq);
 367                         disable_irq(hdev->irq);
 368                         irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
 369                         enable_irq(hdev->irq);
 370                 }
 371                 hpet_print_config();
 372                 break;
 373         }
 374 }
 375
 376 static int hpet_next_event(unsigned long delta,
 377                            struct clock_event_device *evt, int timer)
 378 {
 379         u32 cnt;
 380
 381         cnt = hpet_readl(HPET_COUNTER);
 382         cnt += (u32) delta;
 383         hpet_writel(cnt, HPET_Tn_CMP(timer));
 384
 385         /*
 386          * We need to read back the CMP register to make sure that
 387          * what we wrote hit the chip before we compare it to the
 388          * counter.
 389          */
 390         WARN_ON_ONCE((u32)hpet_readl(HPET_Tn_CMP(timer)) != cnt);
 391
 392         return (s32)((u32)hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
 393 }
 394
 395 static void hpet_legacy_set_mode(enum clock_event_mode mode,
 396                         struct clock_event_device *evt)
 397 {
 398         hpet_set_mode(mode, evt, 0);
 399 }
 400
 401 static int hpet_legacy_next_event(unsigned long delta,
 402                         struct clock_event_device *evt)
 403 {
 404         return hpet_next_event(delta, evt, 0);
 405 }
 406
 407 /*
 408  * HPET MSI Support
 409  */
 410 #ifdef CONFIG_PCI_MSI
 411
 412 static DEFINE_PER_CPU(struct hpet_dev *, cpu_hpet_dev);
 413 static struct hpet_dev  *hpet_devs;
 414
 415 void hpet_msi_unmask(unsigned int irq)
 416 {
 417         struct hpet_dev *hdev = get_irq_data(irq);
 418         unsigned long cfg;
 419
 420         /* unmask it */
 421         cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
 422         cfg |= HPET_TN_FSB;
 423         hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
 424 }
 425
 426 void hpet_msi_mask(unsigned int irq)
 427 {
 428         unsigned long cfg;
 429         struct hpet_dev *hdev = get_irq_data(irq);
 430
 431         /* mask it */
 432         cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
 433         cfg &= ~HPET_TN_FSB;
 434         hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
 435 }
 436
 437 void hpet_msi_write(unsigned int irq, struct msi_msg *msg)
 438 {
 439         struct hpet_dev *hdev = get_irq_data(irq);
 440
 441         hpet_writel(msg->data, HPET_Tn_ROUTE(hdev->num));
 442         hpet_writel(msg->address_lo, HPET_Tn_ROUTE(hdev->num) + 4);
 443 }
 444
 445 void hpet_msi_read(unsigned int irq, struct msi_msg *msg)
 446 {
 447         struct hpet_dev *hdev = get_irq_data(irq);
 448
 449         msg->data = hpet_readl(HPET_Tn_ROUTE(hdev->num));
 450         msg->address_lo = hpet_readl(HPET_Tn_ROUTE(hdev->num) + 4);
 451         msg->address_hi = 0;
 452 }
 453
 454 static void hpet_msi_set_mode(enum clock_event_mode mode,
 455                                 struct clock_event_device *evt)
 456 {
 457         struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
 458         hpet_set_mode(mode, evt, hdev->num);
 459 }
 460
 461 static int hpet_msi_next_event(unsigned long delta,
 462                                 struct clock_event_device *evt)
 463 {
 464         struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
 465         return hpet_next_event(delta, evt, hdev->num);
 466 }
 467
 468 static int hpet_setup_msi_irq(unsigned int irq)
 469 {
 470         if (arch_setup_hpet_msi(irq)) {
 471                 destroy_irq(irq);
 472                 return -EINVAL;
 473         }
 474         return 0;
 475 }
 476
 477 static int hpet_assign_irq(struct hpet_dev *dev)
 478 {
 479         unsigned int irq;
 480
 481         irq = create_irq();
 482         if (!irq)
 483                 return -EINVAL;
 484
 485         set_irq_data(irq, dev);
 486
 487         if (hpet_setup_msi_irq(irq))
 488                 return -EINVAL;
 489
 490         dev->irq = irq;
 491         return 0;
 492 }
 493
 494 static irqreturn_t hpet_interrupt_handler(int irq, void *data)
 495 {
 496         struct hpet_dev *dev = (struct hpet_dev *)data;
 497         struct clock_event_device *hevt = &dev->evt;
 498
 499         if (!hevt->event_handler) {
 500                 printk(KERN_INFO "Spurious HPET timer interrupt on HPET timer %d\n",
 501                                 dev->num);
 502                 return IRQ_HANDLED;
 503         }
 504
 505         hevt->event_handler(hevt);
 506         return IRQ_HANDLED;
 507 }
 508
 509 static int hpet_setup_irq(struct hpet_dev *dev)
 510 {
 511
 512         if (request_irq(dev->irq, hpet_interrupt_handler,
 513                         IRQF_TIMER | IRQF_DISABLED | IRQF_NOBALANCING,
 514                         dev->name, dev))
 515                 return -1;
 516
 517         disable_irq(dev->irq);
 518         irq_set_affinity(dev->irq, cpumask_of(dev->cpu));
 519         enable_irq(dev->irq);
 520
 521         printk(KERN_DEBUG "hpet: %s irq %d for MSI\n",
 522                          dev->name, dev->irq);
 523
 524         return 0;
 525 }
 526
 527 /* This should be called in specific @cpu */
 528 static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu)
 529 {
 530         struct clock_event_device *evt = &hdev->evt;
 531         uint64_t hpet_freq;
 532
 533         WARN_ON(cpu != smp_processor_id());
 534         if (!(hdev->flags & HPET_DEV_VALID))
 535                 return;
 536
 537         if (hpet_setup_msi_irq(hdev->irq))
 538                 return;
 539
 540         hdev->cpu = cpu;
 541         per_cpu(cpu_hpet_dev, cpu) = hdev;
 542         evt->name = hdev->name;
 543         hpet_setup_irq(hdev);
 544         evt->irq = hdev->irq;
 545
 546         evt->rating = 110;
 547         evt->features = CLOCK_EVT_FEAT_ONESHOT;
 548         if (hdev->flags & HPET_DEV_PERI_CAP)
 549                 evt->features |= CLOCK_EVT_FEAT_PERIODIC;
 550
 551         evt->set_mode = hpet_msi_set_mode;
 552         evt->set_next_event = hpet_msi_next_event;
 553         evt->shift = 32;
 554
 555         /*
 556          * The period is a femto seconds value. We need to calculate the
 557          * scaled math multiplication factor for nanosecond to hpet tick
 558          * conversion.
 559          */
 560         hpet_freq = 1000000000000000ULL;
 561         do_div(hpet_freq, hpet_period);
 562         evt->mult = div_sc((unsigned long) hpet_freq,
 563                                       NSEC_PER_SEC, evt->shift);
 564         /* Calculate the max delta */
 565         evt->max_delta_ns = clockevent_delta2ns(0x7FFFFFFF, evt);
 566         /* 5 usec minimum reprogramming delta. */
 567         evt->min_delta_ns = 5000;
 568
 569         evt->cpumask = cpumask_of(hdev->cpu);
 570         clockevents_register_device(evt);
 571 }
 572
 573 #ifdef CONFIG_HPET
 574 /* Reserve at least one timer for userspace (/dev/hpet) */
 575 #define RESERVE_TIMERS 1
 576 #else
 577 #define RESERVE_TIMERS 0
 578 #endif
 579
 580 static void hpet_msi_capability_lookup(unsigned int start_timer)
 581 {
 582         unsigned int id;
 583         unsigned int num_timers;
 584         unsigned int num_timers_used = 0;
 585         int i;
 586
 587         if (boot_cpu_has(X86_FEATURE_ARAT))
 588                 return;
 589         id = hpet_readl(HPET_ID);
 590
 591         num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
 592         num_timers++; /* Value read out starts from 0 */
 593         hpet_print_config();
 594
 595         hpet_devs = kzalloc(sizeof(struct hpet_dev) * num_timers, GFP_KERNEL);
 596         if (!hpet_devs)
 597                 return;
 598
 599         hpet_num_timers = num_timers;
 600
 601         for (i = start_timer; i < num_timers - RESERVE_TIMERS; i++) {
 602                 struct hpet_dev *hdev = &hpet_devs[num_timers_used];
 603                 unsigned long cfg = hpet_readl(HPET_Tn_CFG(i));
 604
 605                 /* Only consider HPET timer with MSI support */
 606                 if (!(cfg & HPET_TN_FSB_CAP))
 607                         continue;
 608
 609                 hdev->flags = 0;
 610                 if (cfg & HPET_TN_PERIODIC_CAP)
 611                         hdev->flags |= HPET_DEV_PERI_CAP;
 612                 hdev->num = i;
 613
 614                 sprintf(hdev->name, "hpet%d", i);
 615                 if (hpet_assign_irq(hdev))
 616                         continue;
 617
 618                 hdev->flags |= HPET_DEV_FSB_CAP;
 619                 hdev->flags |= HPET_DEV_VALID;
 620                 num_timers_used++;
 621                 if (num_timers_used == num_possible_cpus())
 622                         break;
 623         }
 624
 625         printk(KERN_INFO "HPET: %d timers in total, %d timers will be used for per-cpu timer\n",
 626                 num_timers, num_timers_used);
 627 }
 628
 629 #ifdef CONFIG_HPET
 630 static void hpet_reserve_msi_timers(struct hpet_data *hd)
 631 {
 632         int i;
 633
 634         if (!hpet_devs)
 635                 return;
 636
 637         for (i = 0; i < hpet_num_timers; i++) {
 638                 struct hpet_dev *hdev = &hpet_devs[i];
 639
 640                 if (!(hdev->flags & HPET_DEV_VALID))
 641                         continue;
 642
 643                 hd->hd_irq[hdev->num] = hdev->irq;
 644                 hpet_reserve_timer(hd, hdev->num);
 645         }
 646 }
 647 #endif
 648
 649 static struct hpet_dev *hpet_get_unused_timer(void)
 650 {
 651         int i;
 652
 653         if (!hpet_devs)
 654                 return NULL;
 655
 656         for (i = 0; i < hpet_num_timers; i++) {
 657                 struct hpet_dev *hdev = &hpet_devs[i];
 658
 659                 if (!(hdev->flags & HPET_DEV_VALID))
 660                         continue;
 661                 if (test_and_set_bit(HPET_DEV_USED_BIT,
 662                         (unsigned long *)&hdev->flags))
 663                         continue;
 664                 return hdev;
 665         }
 666         return NULL;
 667 }
 668
 669 struct hpet_work_struct {
 670         struct delayed_work work;
 671         struct completion complete;
 672 };
 673
 674 static void hpet_work(struct work_struct *w)
 675 {
 676         struct hpet_dev *hdev;
 677         int cpu = smp_processor_id();
 678         struct hpet_work_struct *hpet_work;
 679
 680         hpet_work = container_of(w, struct hpet_work_struct, work.work);
 681
 682         hdev = hpet_get_unused_timer();
 683         if (hdev)
 684                 init_one_hpet_msi_clockevent(hdev, cpu);
 685
 686         complete(&hpet_work->complete);
 687 }
 688
 689 static int hpet_cpuhp_notify(struct notifier_block *n,
 690                 unsigned long action, void *hcpu)
 691 {
 692         unsigned long cpu = (unsigned long)hcpu;
 693         struct hpet_work_struct work;
 694         struct hpet_dev *hdev = per_cpu(cpu_hpet_dev, cpu);
 695
 696         switch (action & 0xf) {
 697         case CPU_ONLINE:
 698                 INIT_DELAYED_WORK_ON_STACK(&work.work, hpet_work);
 699                 init_completion(&work.complete);
 700                 /* FIXME: add schedule_work_on() */
 701                 schedule_delayed_work_on(cpu, &work.work, 0);
 702                 wait_for_completion(&work.complete);
 703                 destroy_timer_on_stack(&work.work.timer);
 704                 break;
 705         case CPU_DEAD:
 706                 if (hdev) {
 707                         free_irq(hdev->irq, hdev);
 708                         hdev->flags &= ~HPET_DEV_USED;
 709                         per_cpu(cpu_hpet_dev, cpu) = NULL;
 710                 }
 711                 break;
 712         }
 713         return NOTIFY_OK;
 714 }
 715 #else
 716
 717 static int hpet_setup_msi_irq(unsigned int irq)
 718 {
 719         return 0;
 720 }
 721 static void hpet_msi_capability_lookup(unsigned int start_timer)
 722 {
 723         return;
 724 }
 725
 726 #ifdef CONFIG_HPET
 727 static void hpet_reserve_msi_timers(struct hpet_data *hd)
 728 {
 729         return;
 730 }
 731 #endif
 732
 733 static int hpet_cpuhp_notify(struct notifier_block *n,
 734                 unsigned long action, void *hcpu)
 735 {
 736         return NOTIFY_OK;
 737 }
 738
 739 #endif
 740
 741 /*
 742  * Clock source related code
 743  */
 744 static cycle_t read_hpet(struct clocksource *cs)
 745 {
 746         return (cycle_t)hpet_readl(HPET_COUNTER);
 747 }
 748
 749 #ifdef CONFIG_X86_64
 750 static cycle_t __vsyscall_fn vread_hpet(void)
 751 {
 752         return readl((const void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
 753 }
 754 #endif
 755
 756 static struct clocksource clocksource_hpet = {
 757         .name           = "hpet",
 758         .rating         = 250,
 759         .read           = read_hpet,
 760         .mask           = HPET_MASK,
 761         .shift          = HPET_SHIFT,
 762         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 763         .resume         = hpet_resume_counter,
 764 #ifdef CONFIG_X86_64
 765         .vread          = vread_hpet,
 766 #endif
 767 };
 768
 769 static int hpet_clocksource_register(void)
 770 {
 771         u64 start, now;
 772         cycle_t t1;
 773
 774         /* Start the counter */
 775         hpet_restart_counter();
 776
 777         /* Verify whether hpet counter works */
 778         t1 = hpet_readl(HPET_COUNTER);
 779         rdtscll(start);
 780
 781         /*
 782          * We don't know the TSC frequency yet, but waiting for
 783          * 200000 TSC cycles is safe:
 784          * 4 GHz == 50us
 785          * 1 GHz == 200us
 786          */
 787         do {
 788                 rep_nop();
 789                 rdtscll(now);
 790         } while ((now - start) < 200000UL);
 791
 792         if (t1 == hpet_readl(HPET_COUNTER)) {
 793                 printk(KERN_WARNING
 794                        "HPET counter not counting. HPET disabled\n");
 795                 return -ENODEV;
 796         }
 797
 798         /*
 799          * The definition of mult is (include/linux/clocksource.h)
 800          * mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc
 801          * so we first need to convert hpet_period to ns/cyc units:
 802          *  mult/2^shift = ns/cyc = hpet_period/10^6
 803          *  mult = (hpet_period * 2^shift)/10^6
 804          *  mult = (hpet_period << shift)/FSEC_PER_NSEC
 805          */
 806         clocksource_hpet.mult = div_sc(hpet_period, FSEC_PER_NSEC, HPET_SHIFT);
 807
 808         clocksource_register(&clocksource_hpet);
 809
 810         return 0;
 811 }
 812
 813 /**
 814  * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
 815  */
 816 int __init hpet_enable(void)
 817 {
 818         unsigned long id;
 819         int i;
 820
 821         if (!is_hpet_capable())
 822                 return 0;
 823
 824         hpet_set_mapping();
 825
 826         /*
 827          * Read the period and check for a sane value:
 828          */
 829         hpet_period = hpet_readl(HPET_PERIOD);
 830
 831         /*
 832          * AMD SB700 based systems with spread spectrum enabled use a
 833          * SMM based HPET emulation to provide proper frequency
 834          * setting. The SMM code is initialized with the first HPET
 835          * register access and takes some time to complete. During
 836          * this time the config register reads 0xffffffff. We check
 837          * for max. 1000 loops whether the config register reads a non
 838          * 0xffffffff value to make sure that HPET is up and running
 839          * before we go further. A counting loop is safe, as the HPET
 840          * access takes thousands of CPU cycles. On non SB700 based
 841          * machines this check is only done once and has no side
 842          * effects.
 843          */
 844         for (i = 0; hpet_readl(HPET_CFG) == 0xFFFFFFFF; i++) {
 845                 if (i == 1000) {
 846                         printk(KERN_WARNING
 847                                "HPET config register value = 0xFFFFFFFF. "
 848                                "Disabling HPET\n");
 849                         goto out_nohpet;
 850                 }
 851         }
 852
 853         if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
 854                 goto out_nohpet;
 855
 856         /*
 857          * Read the HPET ID register to retrieve the IRQ routing
 858          * information and the number of channels
 859          */
 860         id = hpet_readl(HPET_ID);
 861         hpet_print_config();
 862
 863 #ifdef CONFIG_HPET_EMULATE_RTC
 864         /*
 865          * The legacy routing mode needs at least two channels, tick timer
 866          * and the rtc emulation channel.
 867          */
 868         if (!(id & HPET_ID_NUMBER))
 869                 goto out_nohpet;
 870 #endif
 871
 872         if (hpet_clocksource_register())
 873                 goto out_nohpet;
 874
 875         if (id & HPET_ID_LEGSUP) {
 876                 hpet_legacy_clockevent_register();
 877                 return 1;
 878         }
 879         return 0;
 880
 881 out_nohpet:
 882         hpet_clear_mapping();
 883         hpet_address = 0;
 884         return 0;
 885 }
 886
 887 /*
 888  * Needs to be late, as the reserve_timer code calls kalloc !
 889  *
 890  * Not a problem on i386 as hpet_enable is called from late_time_init,
 891  * but on x86_64 it is necessary !
 892  */
 893 static __init int hpet_late_init(void)
 894 {
 895         int cpu;
 896
 897         if (boot_hpet_disable)
 898                 return -ENODEV;
 899
 900         if (!hpet_address) {
 901                 if (!force_hpet_address)
 902                         return -ENODEV;
 903
 904                 hpet_address = force_hpet_address;
 905                 hpet_enable();
 906         }
 907
 908         if (!hpet_virt_address)
 909                 return -ENODEV;
 910
 911         if (hpet_readl(HPET_ID) & HPET_ID_LEGSUP)
 912                 hpet_msi_capability_lookup(2);
 913         else
 914                 hpet_msi_capability_lookup(0);
 915
 916         hpet_reserve_platform_timers(hpet_readl(HPET_ID));
 917         hpet_print_config();
 918
 919         if (boot_cpu_has(X86_FEATURE_ARAT))
 920                 return 0;
 921
 922         for_each_online_cpu(cpu) {
 923                 hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu);
 924         }
 925
 926         /* This notifier should be called after workqueue is ready */
 927         hotcpu_notifier(hpet_cpuhp_notify, -20);
 928
 929         return 0;
 930 }
 931 fs_initcall(hpet_late_init);
 932
 933 void hpet_disable(void)
 934 {
 935         if (is_hpet_capable()) {
 936                 unsigned long cfg = hpet_readl(HPET_CFG);
 937
 938                 if (hpet_legacy_int_enabled) {
 939                         cfg &= ~HPET_CFG_LEGACY;
 940                         hpet_legacy_int_enabled = 0;
 941                 }
 942                 cfg &= ~HPET_CFG_ENABLE;
 943                 hpet_writel(cfg, HPET_CFG);
 944         }
 945 }
 946
 947 #ifdef CONFIG_HPET_EMULATE_RTC
 948
 949 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
 950  * is enabled, we support RTC interrupt functionality in software.
 951  * RTC has 3 kinds of interrupts:
 952  * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
 953  *    is updated
 954  * 2) Alarm Interrupt - generate an interrupt at a specific time of day
 955  * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
 956  *    2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
 957  * (1) and (2) above are implemented using polling at a frequency of
 958  * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
 959  * overhead. (DEFAULT_RTC_INT_FREQ)
 960  * For (3), we use interrupts at 64Hz or user specified periodic
 961  * frequency, whichever is higher.
 962  */
 963 #include <linux/mc146818rtc.h>
 964 #include <linux/rtc.h>
 965 #include <asm/rtc.h>
 966
 967 #define DEFAULT_RTC_INT_FREQ    64
 968 #define DEFAULT_RTC_SHIFT       6
 969 #define RTC_NUM_INTS            1
 970
 971 static unsigned long hpet_rtc_flags;
 972 static int hpet_prev_update_sec;
 973 static struct rtc_time hpet_alarm_time;
 974 static unsigned long hpet_pie_count;
 975 static u32 hpet_t1_cmp;
 976 static unsigned long hpet_default_delta;
 977 static unsigned long hpet_pie_delta;
 978 static unsigned long hpet_pie_limit;
 979
 980 static rtc_irq_handler irq_handler;
 981
 982 /*
 983  * Check that the hpet counter c1 is ahead of the c2
 984  */
 985 static inline int hpet_cnt_ahead(u32 c1, u32 c2)
 986 {
 987         return (s32)(c2 - c1) < 0;
 988 }
 989
 990 /*
 991  * Registers a IRQ handler.
 992  */
 993 int hpet_register_irq_handler(rtc_irq_handler handler)
 994 {
 995         if (!is_hpet_enabled())
 996                 return -ENODEV;
 997         if (irq_handler)
 998                 return -EBUSY;
 999
1000         irq_handler = handler;
1001
1002         return 0;
1003 }
1004 EXPORT_SYMBOL_GPL(hpet_register_irq_handler);
1005
1006 /*
1007  * Deregisters the IRQ handler registered with hpet_register_irq_handler()
1008  * and does cleanup.
1009  */
1010 void hpet_unregister_irq_handler(rtc_irq_handler handler)
1011 {
1012         if (!is_hpet_enabled())
1013                 return;
1014
1015         irq_handler = NULL;
1016         hpet_rtc_flags = 0;
1017 }
1018 EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler);
1019
1020 /*
1021  * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
1022  * is not supported by all HPET implementations for timer 1.
1023  *
1024  * hpet_rtc_timer_init() is called when the rtc is initialized.
1025  */
1026 int hpet_rtc_timer_init(void)
1027 {
1028         unsigned long cfg, cnt, delta, flags;
1029
1030         if (!is_hpet_enabled())
1031                 return 0;
1032
1033         if (!hpet_default_delta) {
1034                 uint64_t clc;
1035
1036                 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1037                 clc >>= hpet_clockevent.shift + DEFAULT_RTC_SHIFT;
1038                 hpet_default_delta = (unsigned long) clc;
1039         }
1040
1041         if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1042                 delta = hpet_default_delta;
1043         else
1044                 delta = hpet_pie_delta;
1045
1046         local_irq_save(flags);
1047
1048         cnt = delta + hpet_readl(HPET_COUNTER);
1049         hpet_writel(cnt, HPET_T1_CMP);
1050         hpet_t1_cmp = cnt;
1051
1052         cfg = hpet_readl(HPET_T1_CFG);
1053         cfg &= ~HPET_TN_PERIODIC;
1054         cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1055         hpet_writel(cfg, HPET_T1_CFG);
1056
1057         local_irq_restore(flags);
1058
1059         return 1;
1060 }
1061 EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
1062
1063 /*
1064  * The functions below are called from rtc driver.
1065  * Return 0 if HPET is not being used.
1066  * Otherwise do the necessary changes and return 1.
1067  */
1068 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1069 {
1070         if (!is_hpet_enabled())
1071                 return 0;
1072
1073         hpet_rtc_flags &= ~bit_mask;
1074         return 1;
1075 }
1076 EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
1077
1078 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1079 {
1080         unsigned long oldbits = hpet_rtc_flags;
1081
1082         if (!is_hpet_enabled())
1083                 return 0;
1084
1085         hpet_rtc_flags |= bit_mask;
1086
1087         if ((bit_mask & RTC_UIE) && !(oldbits & RTC_UIE))
1088                 hpet_prev_update_sec = -1;
1089
1090         if (!oldbits)
1091                 hpet_rtc_timer_init();
1092
1093         return 1;
1094 }
1095 EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit);
1096
1097 int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
1098                         unsigned char sec)
1099 {
1100         if (!is_hpet_enabled())
1101                 return 0;
1102
1103         hpet_alarm_time.tm_hour = hrs;
1104         hpet_alarm_time.tm_min = min;
1105         hpet_alarm_time.tm_sec = sec;
1106
1107         return 1;
1108 }
1109 EXPORT_SYMBOL_GPL(hpet_set_alarm_time);
1110
1111 int hpet_set_periodic_freq(unsigned long freq)
1112 {
1113         uint64_t clc;
1114
1115         if (!is_hpet_enabled())
1116                 return 0;
1117
1118         if (freq <= DEFAULT_RTC_INT_FREQ)
1119                 hpet_pie_limit = DEFAULT_RTC_INT_FREQ / freq;
1120         else {
1121                 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1122                 do_div(clc, freq);
1123                 clc >>= hpet_clockevent.shift;
1124                 hpet_pie_delta = (unsigned long) clc;
1125         }
1126         return 1;
1127 }
1128 EXPORT_SYMBOL_GPL(hpet_set_periodic_freq);
1129
1130 int hpet_rtc_dropped_irq(void)
1131 {
1132         return is_hpet_enabled();
1133 }
1134 EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
1135
1136 static void hpet_rtc_timer_reinit(void)
1137 {
1138         unsigned long cfg, delta;
1139         int lost_ints = -1;
1140
1141         if (unlikely(!hpet_rtc_flags)) {
1142                 cfg = hpet_readl(HPET_T1_CFG);
1143                 cfg &= ~HPET_TN_ENABLE;
1144                 hpet_writel(cfg, HPET_T1_CFG);
1145                 return;
1146         }
1147
1148         if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1149                 delta = hpet_default_delta;
1150         else
1151                 delta = hpet_pie_delta;
1152
1153         /*
1154          * Increment the comparator value until we are ahead of the
1155          * current count.
1156          */
1157         do {
1158                 hpet_t1_cmp += delta;
1159                 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
1160                 lost_ints++;
1161         } while (!hpet_cnt_ahead(hpet_t1_cmp, hpet_readl(HPET_COUNTER)));
1162
1163         if (lost_ints) {
1164                 if (hpet_rtc_flags & RTC_PIE)
1165                         hpet_pie_count += lost_ints;
1166                 if (printk_ratelimit())
1167                         printk(KERN_WARNING "hpet1: lost %d rtc interrupts\n",
1168                                 lost_ints);
1169         }
1170 }
1171
1172 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
1173 {
1174         struct rtc_time curr_time;
1175         unsigned long rtc_int_flag = 0;
1176
1177         hpet_rtc_timer_reinit();
1178         memset(&curr_time, 0, sizeof(struct rtc_time));
1179
1180         if (hpet_rtc_flags & (RTC_UIE | RTC_AIE))
1181                 get_rtc_time(&curr_time);
1182
1183         if (hpet_rtc_flags & RTC_UIE &&
1184             curr_time.tm_sec != hpet_prev_update_sec) {
1185                 if (hpet_prev_update_sec >= 0)
1186                         rtc_int_flag = RTC_UF;
1187                 hpet_prev_update_sec = curr_time.tm_sec;
1188         }
1189
1190         if (hpet_rtc_flags & RTC_PIE &&
1191             ++hpet_pie_count >= hpet_pie_limit) {
1192                 rtc_int_flag |= RTC_PF;
1193                 hpet_pie_count = 0;
1194         }
1195
1196         if (hpet_rtc_flags & RTC_AIE &&
1197             (curr_time.tm_sec == hpet_alarm_time.tm_sec) &&
1198             (curr_time.tm_min == hpet_alarm_time.tm_min) &&
1199             (curr_time.tm_hour == hpet_alarm_time.tm_hour))
1200                         rtc_int_flag |= RTC_AF;
1201
1202         if (rtc_int_flag) {
1203                 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1204                 if (irq_handler)
1205                         irq_handler(rtc_int_flag, dev_id);
1206         }
1207         return IRQ_HANDLED;
1208 }
1209 EXPORT_SYMBOL_GPL(hpet_rtc_interrupt);
1210 #endif