2 * AMD Geode definitions
3 * Copyright (C) 2006, Advanced Micro Devices, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of version 2 of the GNU General Public License
7 * as published by the Free Software Foundation.
10 #ifndef _ASM_X86_GEODE_H
11 #define _ASM_X86_GEODE_H
13 #include <asm/processor.h>
15 #include <linux/cs5535.h>
17 /* Generic southbridge functions */
19 #define GEODE_DEV_PMS 0
20 #define GEODE_DEV_ACPI 1
21 #define GEODE_DEV_GPIO 2
22 #define GEODE_DEV_MFGPT 3
24 extern int geode_get_dev_base(unsigned int dev);
27 #define geode_pms_base() geode_get_dev_base(GEODE_DEV_PMS)
28 #define geode_acpi_base() geode_get_dev_base(GEODE_DEV_ACPI)
29 #define geode_gpio_base() geode_get_dev_base(GEODE_DEV_GPIO)
30 #define geode_mfgpt_base() geode_get_dev_base(GEODE_DEV_MFGPT)
34 #define MSR_GLIU_P2D_RO0 0x10000029
36 #define MSR_LX_GLD_MSR_CONFIG 0x48002001
37 #define MSR_LX_MSR_PADSEL 0x48002011 /* NOT 0x48000011; the data
38 * sheet has the wrong value */
39 #define MSR_GLCP_SYS_RSTPLL 0x4C000014
40 #define MSR_GLCP_DOTPLL 0x4C000015
42 #define MSR_LBAR_SMB 0x5140000B
43 #define MSR_LBAR_GPIO 0x5140000C
44 #define MSR_LBAR_MFGPT 0x5140000D
45 #define MSR_LBAR_ACPI 0x5140000E
46 #define MSR_LBAR_PMS 0x5140000F
48 #define MSR_LX_SPARE_MSR 0x80000011 /* DC-specific */
50 #define MSR_GX_GLD_MSR_CONFIG 0xC0002001
51 #define MSR_GX_MSR_PADSEL 0xC0002011
55 #define LBAR_GPIO_SIZE 0xFF
56 #define LBAR_MFGPT_SIZE 0x40
57 #define LBAR_ACPI_SIZE 0x40
58 #define LBAR_PMS_SIZE 0x80
60 /* ACPI registers (PMS block) */
63 * PM1_EN is only valid when VSA is enabled for 16 bit reads.
64 * When VSA is not enabled, *always* read both PM1_STS and PM1_EN
65 * with a 32 bit read at offset 0x0
73 #define PM_GPE0_STS 0x18
74 #define PM_GPE0_EN 0x1C
76 /* PMC registers (PMS block) */
81 #define PM_OUT_SLPCTL 0x0C
86 #define PM_IN_SLPCTL 0x20
98 static inline u32 geode_gpio(unsigned int nr)
104 extern void geode_gpio_set(u32, unsigned int);
105 extern void geode_gpio_clear(u32, unsigned int);
106 extern int geode_gpio_isset(u32, unsigned int);
107 extern void geode_gpio_setup_event(unsigned int, int, int);
108 extern void geode_gpio_set_irq(unsigned int, unsigned int);
110 static inline void geode_gpio_event_irq(unsigned int gpio, int pair)
112 geode_gpio_setup_event(gpio, pair, 0);
115 static inline void geode_gpio_event_pme(unsigned int gpio, int pair)
117 geode_gpio_setup_event(gpio, pair, 1);
120 /* Specific geode tests */
122 static inline int is_geode_gx(void)
124 return ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC) &&
125 (boot_cpu_data.x86 == 5) &&
126 (boot_cpu_data.x86_model == 5));
129 static inline int is_geode_lx(void)
131 return ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
132 (boot_cpu_data.x86 == 5) &&
133 (boot_cpu_data.x86_model == 10));
136 static inline int is_geode(void)
138 return (is_geode_gx() || is_geode_lx());
141 static inline void geode_mfgpt_write(int timer, u16 reg, u16 value)
143 u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
144 outw(value, base + reg + (timer * 8));
147 static inline u16 geode_mfgpt_read(int timer, u16 reg)
149 u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
150 return inw(base + reg + (timer * 8));
153 extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable);
154 extern int geode_mfgpt_set_irq(int timer, int cmp, int *irq, int enable);
155 extern int geode_mfgpt_alloc_timer(int timer, int domain);
157 #define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1)
158 #define geode_mfgpt_release_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 0)
160 #ifdef CONFIG_GEODE_MFGPT_TIMER
161 extern int __init mfgpt_timer_setup(void);
163 static inline int mfgpt_timer_setup(void) { return 0; }
166 #endif /* _ASM_X86_GEODE_H */