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   1 /*
   2  * Renesas Technology Corp. R0P7785LC0011RL Support.
   3  *
   4  * Copyright (C) 2008  Yoshihiro Shimoda
   5  * Copyright (C) 2009  Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/sm501.h>
  14 #include <linux/sm501-regs.h>
  15 #include <linux/fb.h>
  16 #include <linux/mtd/physmap.h>
  17 #include <linux/delay.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/i2c.h>
  20 #include <linux/i2c-pca-platform.h>
  21 #include <linux/i2c-algo-pca.h>
  22 #include <linux/usb/r8a66597.h>
  23 #include <linux/irq.h>
  24 #include <linux/clk.h>
  25 #include <linux/errno.h>
  26 #include <mach/sh7785lcr.h>
  27 #include <cpu/sh7785.h>
  28 #include <asm/heartbeat.h>
  29 #include <asm/clock.h>
  30
  31 /*
  32  * NOTE: This board has 2 physical memory maps.
  33  *       Please look at include/asm-sh/sh7785lcr.h or hardware manual.
  34  */
  35 static struct resource heartbeat_resource = {
  36         .start  = PLD_LEDCR,
  37         .end    = PLD_LEDCR,
  38         .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  39 };
  40
  41 static struct platform_device heartbeat_device = {
  42         .name           = "heartbeat",
  43         .id             = -1,
  44         .num_resources  = 1,
  45         .resource       = &heartbeat_resource,
  46 };
  47
  48 static struct mtd_partition nor_flash_partitions[] = {
  49         {
  50                 .name           = "loader",
  51                 .offset         = 0x00000000,
  52                 .size           = 512 * 1024,
  53         },
  54         {
  55                 .name           = "bootenv",
  56                 .offset         = MTDPART_OFS_APPEND,
  57                 .size           = 512 * 1024,
  58         },
  59         {
  60                 .name           = "kernel",
  61                 .offset         = MTDPART_OFS_APPEND,
  62                 .size           = 4 * 1024 * 1024,
  63         },
  64         {
  65                 .name           = "data",
  66                 .offset         = MTDPART_OFS_APPEND,
  67                 .size           = MTDPART_SIZ_FULL,
  68         },
  69 };
  70
  71 static struct physmap_flash_data nor_flash_data = {
  72         .width          = 4,
  73         .parts          = nor_flash_partitions,
  74         .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
  75 };
  76
  77 static struct resource nor_flash_resources[] = {
  78         [0]     = {
  79                 .start  = NOR_FLASH_ADDR,
  80                 .end    = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
  81                 .flags  = IORESOURCE_MEM,
  82         }
  83 };
  84
  85 static struct platform_device nor_flash_device = {
  86         .name           = "physmap-flash",
  87         .dev            = {
  88                 .platform_data  = &nor_flash_data,
  89         },
  90         .num_resources  = ARRAY_SIZE(nor_flash_resources),
  91         .resource       = nor_flash_resources,
  92 };
  93
  94 static struct r8a66597_platdata r8a66597_data = {
  95         .xtal = R8A66597_PLATDATA_XTAL_12MHZ,
  96         .vif = 1,
  97 };
  98
  99 static struct resource r8a66597_usb_host_resources[] = {
 100         [0] = {
 101                 .start  = R8A66597_ADDR,
 102                 .end    = R8A66597_ADDR + R8A66597_SIZE - 1,
 103                 .flags  = IORESOURCE_MEM,
 104         },
 105         [1] = {
 106                 .start  = 2,
 107                 .end    = 2,
 108                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 109         },
 110 };
 111
 112 static struct platform_device r8a66597_usb_host_device = {
 113         .name           = "r8a66597_hcd",
 114         .id             = -1,
 115         .dev = {
 116                 .dma_mask               = NULL,
 117                 .coherent_dma_mask      = 0xffffffff,
 118                 .platform_data          = &r8a66597_data,
 119         },
 120         .num_resources  = ARRAY_SIZE(r8a66597_usb_host_resources),
 121         .resource       = r8a66597_usb_host_resources,
 122 };
 123
 124 static struct resource sm501_resources[] = {
 125         [0]     = {
 126                 .start  = SM107_MEM_ADDR,
 127                 .end    = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
 128                 .flags  = IORESOURCE_MEM,
 129         },
 130         [1]     = {
 131                 .start  = SM107_REG_ADDR,
 132                 .end    = SM107_REG_ADDR + SM107_REG_SIZE - 1,
 133                 .flags  = IORESOURCE_MEM,
 134         },
 135         [2]     = {
 136                 .start  = 10,
 137                 .flags  = IORESOURCE_IRQ,
 138         },
 139 };
 140
 141 static struct fb_videomode sm501_default_mode_crt = {
 142         .pixclock       = 35714,        /* 28MHz */
 143         .xres           = 640,
 144         .yres           = 480,
 145         .left_margin    = 105,
 146         .right_margin   = 16,
 147         .upper_margin   = 33,
 148         .lower_margin   = 10,
 149         .hsync_len      = 39,
 150         .vsync_len      = 2,
 151         .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 152 };
 153
 154 static struct fb_videomode sm501_default_mode_pnl = {
 155         .pixclock       = 40000,        /* 25MHz */
 156         .xres           = 640,
 157         .yres           = 480,
 158         .left_margin    = 2,
 159         .right_margin   = 16,
 160         .upper_margin   = 33,
 161         .lower_margin   = 10,
 162         .hsync_len      = 39,
 163         .vsync_len      = 2,
 164         .sync           = 0,
 165 };
 166
 167 static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
 168         .def_bpp        = 16,
 169         .def_mode       = &sm501_default_mode_pnl,
 170         .flags          = SM501FB_FLAG_USE_INIT_MODE |
 171                           SM501FB_FLAG_USE_HWCURSOR |
 172                           SM501FB_FLAG_USE_HWACCEL |
 173                           SM501FB_FLAG_DISABLE_AT_EXIT |
 174                           SM501FB_FLAG_PANEL_NO_VBIASEN,
 175 };
 176
 177 static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
 178         .def_bpp        = 16,
 179         .def_mode       = &sm501_default_mode_crt,
 180         .flags          = SM501FB_FLAG_USE_INIT_MODE |
 181                           SM501FB_FLAG_USE_HWCURSOR |
 182                           SM501FB_FLAG_USE_HWACCEL |
 183                           SM501FB_FLAG_DISABLE_AT_EXIT,
 184 };
 185
 186 static struct sm501_platdata_fb sm501_fb_pdata = {
 187         .fb_route       = SM501_FB_OWN,
 188         .fb_crt         = &sm501_pdata_fbsub_crt,
 189         .fb_pnl         = &sm501_pdata_fbsub_pnl,
 190 };
 191
 192 static struct sm501_initdata sm501_initdata = {
 193         .gpio_high      = {
 194                 .set    = 0x00001fe0,
 195                 .mask   = 0x0,
 196         },
 197         .devices        = 0,
 198         .mclk           = 84 * 1000000,
 199         .m1xclk         = 112 * 1000000,
 200 };
 201
 202 static struct sm501_platdata sm501_platform_data = {
 203         .init           = &sm501_initdata,
 204         .fb             = &sm501_fb_pdata,
 205 };
 206
 207 static struct platform_device sm501_device = {
 208         .name           = "sm501",
 209         .id             = -1,
 210         .dev            = {
 211                 .platform_data  = &sm501_platform_data,
 212         },
 213         .num_resources  = ARRAY_SIZE(sm501_resources),
 214         .resource       = sm501_resources,
 215 };
 216
 217 static struct resource i2c_proto_resources[] = {
 218         [0] = {
 219                 .start  = PCA9564_PROTO_32BIT_ADDR,
 220                 .end    = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1,
 221                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
 222         },
 223         [1] = {
 224                 .start  = 12,
 225                 .end    = 12,
 226                 .flags  = IORESOURCE_IRQ,
 227         },
 228 };
 229
 230 static struct resource i2c_resources[] = {
 231         [0] = {
 232                 .start  = PCA9564_ADDR,
 233                 .end    = PCA9564_ADDR + PCA9564_SIZE - 1,
 234                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
 235         },
 236         [1] = {
 237                 .start  = 12,
 238                 .end    = 12,
 239                 .flags  = IORESOURCE_IRQ,
 240         },
 241 };
 242
 243 static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
 244         .gpio                   = 0,
 245         .i2c_clock_speed        = I2C_PCA_CON_330kHz,
 246         .timeout                = HZ,
 247 };
 248
 249 static struct platform_device i2c_device = {
 250         .name           = "i2c-pca-platform",
 251         .id             = -1,
 252         .dev            = {
 253                 .platform_data  = &i2c_platform_data,
 254         },
 255         .num_resources  = ARRAY_SIZE(i2c_resources),
 256         .resource       = i2c_resources,
 257 };
 258
 259 static struct platform_device *sh7785lcr_devices[] __initdata = {
 260         &heartbeat_device,
 261         &nor_flash_device,
 262         &r8a66597_usb_host_device,
 263         &sm501_device,
 264         &i2c_device,
 265 };
 266
 267 static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
 268         {
 269                 I2C_BOARD_INFO("r2025sd", 0x32),
 270         },
 271 };
 272
 273 static int __init sh7785lcr_devices_setup(void)
 274 {
 275         i2c_register_board_info(0, sh7785lcr_i2c_devices,
 276                                 ARRAY_SIZE(sh7785lcr_i2c_devices));
 277
 278         if (mach_is_sh7785lcr_pt()) {
 279                 i2c_device.resource = i2c_proto_resources;
 280                 i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources);
 281         }
 282
 283         return platform_add_devices(sh7785lcr_devices,
 284                                     ARRAY_SIZE(sh7785lcr_devices));
 285 }
 286 __initcall(sh7785lcr_devices_setup);
 287
 288 /* Initialize IRQ setting */
 289 void __init init_sh7785lcr_IRQ(void)
 290 {
 291         plat_irq_setup_pins(IRQ_MODE_IRQ7654);
 292         plat_irq_setup_pins(IRQ_MODE_IRQ3210);
 293 }
 294
 295 static int sh7785lcr_clk_init(void)
 296 {
 297         struct clk *clk;
 298         int ret;
 299
 300         clk = clk_get(NULL, "extal");
 301         if (!clk || IS_ERR(clk))
 302                 return PTR_ERR(clk);
 303         ret = clk_set_rate(clk, 33333333);
 304         clk_put(clk);
 305
 306         return ret;
 307 }
 308
 309 static void sh7785lcr_power_off(void)
 310 {
 311         unsigned char *p;
 312
 313         p = ioremap(PLD_POFCR, PLD_POFCR + 1);
 314         if (!p) {
 315                 printk(KERN_ERR "%s: ioremap error.\n", __func__);
 316                 return;
 317         }
 318         *p = 0x01;
 319         iounmap(p);
 320         set_bl_bit();
 321         while (1)
 322                 cpu_relax();
 323 }
 324
 325 /* Initialize the board */
 326 static void __init sh7785lcr_setup(char **cmdline_p)
 327 {
 328         void __iomem *sm501_reg;
 329
 330         printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
 331
 332         pm_power_off = sh7785lcr_power_off;
 333
 334         /* sm501 DRAM configuration */
 335         sm501_reg = ioremap_fixed(SM107_REG_ADDR, SM501_DRAM_CONTROL,
 336                                   PAGE_KERNEL);
 337         if (!sm501_reg) {
 338                 printk(KERN_ERR "%s: ioremap error.\n", __func__);
 339                 return;
 340         }
 341
 342         writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
 343         iounmap_fixed(sm501_reg);
 344 }
 345
 346 /* Return the board specific boot mode pin configuration */
 347 static int sh7785lcr_mode_pins(void)
 348 {
 349         int value = 0;
 350
 351         /* These are the factory default settings of S1 and S2.
 352          * If you change these dip switches then you will need to
 353          * adjust the values below as well.
 354          */
 355         value |= MODE_PIN4; /* Clock Mode 16 */
 356         value |= MODE_PIN5; /* 32-bit Area0 bus width */
 357         value |= MODE_PIN6; /* 32-bit Area0 bus width */
 358         value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */
 359         value |= MODE_PIN8; /* Little Endian */
 360         value |= MODE_PIN9; /* Master Mode */
 361         value |= MODE_PIN14; /* No PLL step-up */
 362
 363         return value;
 364 }
 365
 366 /*
 367  * The Machine Vector
 368  */
 369 static struct sh_machine_vector mv_sh7785lcr __initmv = {
 370         .mv_name                = "SH7785LCR",
 371         .mv_setup               = sh7785lcr_setup,
 372         .mv_clk_init            = sh7785lcr_clk_init,
 373         .mv_init_irq            = init_sh7785lcr_IRQ,
 374         .mv_mode_pins           = sh7785lcr_mode_pins,
 375 };
 376