SAFE public projects git trees. - safe/jmp/linux-2.6/blob - arch/powerpc/platforms/pasemi/setup.c

   1 /*
   2  * Copyright (C) 2006-2007 PA Semi, Inc
   3  *
   4  * Authors: Kip Walker, PA Semi
   5  *          Olof Johansson, PA Semi
   6  *
   7  * Maintained by: Olof Johansson <olof@lixom.net>
   8  *
   9  * Based on arch/powerpc/platforms/maple/setup.c
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  23  */
  24
  25 #include <linux/errno.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/console.h>
  29 #include <linux/pci.h>
  30 #include <linux/of_platform.h>
  31
  32 #include <asm/prom.h>
  33 #include <asm/system.h>
  34 #include <asm/iommu.h>
  35 #include <asm/machdep.h>
  36 #include <asm/mpic.h>
  37 #include <asm/smp.h>
  38 #include <asm/time.h>
  39
  40 #include <pcmcia/ss.h>
  41 #include <pcmcia/cistpl.h>
  42 #include <pcmcia/ds.h>
  43
  44 #include "pasemi.h"
  45
  46 #if !defined(CONFIG_SMP)
  47 static void smp_send_stop(void) {}
  48 #endif
  49
  50 /* SDC reset register, must be pre-mapped at reset time */
  51 static void __iomem *reset_reg;
  52
  53 /* Various error status registers, must be pre-mapped at MCE time */
  54
  55 #define MAX_MCE_REGS    32
  56 struct mce_regs {
  57         char *name;
  58         void __iomem *addr;
  59 };
  60
  61 static struct mce_regs mce_regs[MAX_MCE_REGS];
  62 static int num_mce_regs;
  63
  64
  65 static void pas_restart(char *cmd)
  66 {
  67         /* Need to put others cpu in hold loop so they're not sleeping */
  68         smp_send_stop();
  69         udelay(10000);
  70         printk("Restarting...\n");
  71         while (1)
  72                 out_le32(reset_reg, 0x6000000);
  73 }
  74
  75 #ifdef CONFIG_SMP
  76 static DEFINE_SPINLOCK(timebase_lock);
  77 static unsigned long timebase;
  78
  79 static void __devinit pas_give_timebase(void)
  80 {
  81         spin_lock(&timebase_lock);
  82         mtspr(SPRN_TBCTL, TBCTL_FREEZE);
  83         isync();
  84         timebase = get_tb();
  85         spin_unlock(&timebase_lock);
  86
  87         while (timebase)
  88                 barrier();
  89         mtspr(SPRN_TBCTL, TBCTL_RESTART);
  90 }
  91
  92 static void __devinit pas_take_timebase(void)
  93 {
  94         while (!timebase)
  95                 smp_rmb();
  96
  97         spin_lock(&timebase_lock);
  98         set_tb(timebase >> 32, timebase & 0xffffffff);
  99         timebase = 0;
 100         spin_unlock(&timebase_lock);
 101 }
 102
 103 struct smp_ops_t pas_smp_ops = {
 104         .probe          = smp_mpic_probe,
 105         .message_pass   = smp_mpic_message_pass,
 106         .kick_cpu       = smp_generic_kick_cpu,
 107         .setup_cpu      = smp_mpic_setup_cpu,
 108         .give_timebase  = pas_give_timebase,
 109         .take_timebase  = pas_take_timebase,
 110 };
 111 #endif /* CONFIG_SMP */
 112
 113 void __init pas_setup_arch(void)
 114 {
 115 #ifdef CONFIG_SMP
 116         /* Setup SMP callback */
 117         smp_ops = &pas_smp_ops;
 118 #endif
 119         /* Lookup PCI hosts */
 120         pas_pci_init();
 121
 122 #ifdef CONFIG_DUMMY_CONSOLE
 123         conswitchp = &dummy_con;
 124 #endif
 125
 126         /* Remap SDC register for doing reset */
 127         /* XXXOJN This should maybe come out of the device tree */
 128         reset_reg = ioremap(0xfc101100, 4);
 129 }
 130
 131 static int __init pas_setup_mce_regs(void)
 132 {
 133         struct pci_dev *dev;
 134         int reg;
 135
 136         if (!machine_is(pasemi))
 137                 return -ENODEV;
 138
 139         /* Remap various SoC status registers for use by the MCE handler */
 140
 141         reg = 0;
 142
 143         dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa00a, NULL);
 144         while (dev && reg < MAX_MCE_REGS) {
 145                 mce_regs[reg].name = kasprintf(GFP_KERNEL,
 146                                                 "mc%d_mcdebug_errsta", reg);
 147                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x730);
 148                 dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa00a, dev);
 149                 reg++;
 150         }
 151
 152         dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
 153         if (dev && reg+4 < MAX_MCE_REGS) {
 154                 mce_regs[reg].name = "iobdbg_IntStatus1";
 155                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x438);
 156                 reg++;
 157                 mce_regs[reg].name = "iobdbg_IOCTbusIntDbgReg";
 158                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x454);
 159                 reg++;
 160                 mce_regs[reg].name = "iobiom_IntStatus";
 161                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0xc10);
 162                 reg++;
 163                 mce_regs[reg].name = "iobiom_IntDbgReg";
 164                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0xc1c);
 165                 reg++;
 166         }
 167
 168         dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa009, NULL);
 169         if (dev && reg+2 < MAX_MCE_REGS) {
 170                 mce_regs[reg].name = "l2csts_IntStatus";
 171                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x200);
 172                 reg++;
 173                 mce_regs[reg].name = "l2csts_Cnt";
 174                 mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x214);
 175                 reg++;
 176         }
 177
 178         num_mce_regs = reg;
 179
 180         return 0;
 181 }
 182 device_initcall(pas_setup_mce_regs);
 183
 184 static __init void pas_init_IRQ(void)
 185 {
 186         struct device_node *np;
 187         struct device_node *root, *mpic_node;
 188         unsigned long openpic_addr;
 189         const unsigned int *opprop;
 190         int naddr, opplen;
 191         struct mpic *mpic;
 192
 193         mpic_node = NULL;
 194
 195         for_each_node_by_type(np, "interrupt-controller")
 196                 if (of_device_is_compatible(np, "open-pic")) {
 197                         mpic_node = np;
 198                         break;
 199                 }
 200         if (!mpic_node)
 201                 for_each_node_by_type(np, "open-pic") {
 202                         mpic_node = np;
 203                         break;
 204                 }
 205         if (!mpic_node) {
 206                 printk(KERN_ERR
 207                         "Failed to locate the MPIC interrupt controller\n");
 208                 return;
 209         }
 210
 211         /* Find address list in /platform-open-pic */
 212         root = of_find_node_by_path("/");
 213         naddr = of_n_addr_cells(root);
 214         opprop = of_get_property(root, "platform-open-pic", &opplen);
 215         if (!opprop) {
 216                 printk(KERN_ERR "No platform-open-pic property.\n");
 217                 of_node_put(root);
 218                 return;
 219         }
 220         openpic_addr = of_read_number(opprop, naddr);
 221         printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
 222
 223         mpic = mpic_alloc(mpic_node, openpic_addr,
 224                           MPIC_PRIMARY|MPIC_LARGE_VECTORS,
 225                           0, 0, " PAS-OPIC  ");
 226         BUG_ON(!mpic);
 227
 228         mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
 229         mpic_init(mpic);
 230         of_node_put(mpic_node);
 231         of_node_put(root);
 232 }
 233
 234 static void __init pas_progress(char *s, unsigned short hex)
 235 {
 236         printk("[%04x] : %s\n", hex, s ? s : "");
 237 }
 238
 239
 240 static int pas_machine_check_handler(struct pt_regs *regs)
 241 {
 242         int cpu = smp_processor_id();
 243         unsigned long srr0, srr1, dsisr;
 244         int dump_slb = 0;
 245         int i;
 246
 247         srr0 = regs->nip;
 248         srr1 = regs->msr;
 249         dsisr = mfspr(SPRN_DSISR);
 250         printk(KERN_ERR "Machine Check on CPU %d\n", cpu);
 251         printk(KERN_ERR "SRR0  0x%016lx SRR1 0x%016lx\n", srr0, srr1);
 252         printk(KERN_ERR "DSISR 0x%016lx DAR  0x%016lx\n", dsisr, regs->dar);
 253         printk(KERN_ERR "BER   0x%016lx MER  0x%016lx\n", mfspr(SPRN_PA6T_BER),
 254                 mfspr(SPRN_PA6T_MER));
 255         printk(KERN_ERR "IER   0x%016lx DER  0x%016lx\n", mfspr(SPRN_PA6T_IER),
 256                 mfspr(SPRN_PA6T_DER));
 257         printk(KERN_ERR "Cause:\n");
 258
 259         if (srr1 & 0x200000)
 260                 printk(KERN_ERR "Signalled by SDC\n");
 261
 262         if (srr1 & 0x100000) {
 263                 printk(KERN_ERR "Load/Store detected error:\n");
 264                 if (dsisr & 0x8000)
 265                         printk(KERN_ERR "D-cache ECC double-bit error or bus error\n");
 266                 if (dsisr & 0x4000)
 267                         printk(KERN_ERR "LSU snoop response error\n");
 268                 if (dsisr & 0x2000) {
 269                         printk(KERN_ERR "MMU SLB multi-hit or invalid B field\n");
 270                         dump_slb = 1;
 271                 }
 272                 if (dsisr & 0x1000)
 273                         printk(KERN_ERR "Recoverable Duptags\n");
 274                 if (dsisr & 0x800)
 275                         printk(KERN_ERR "Recoverable D-cache parity error count overflow\n");
 276                 if (dsisr & 0x400)
 277                         printk(KERN_ERR "TLB parity error count overflow\n");
 278         }
 279
 280         if (srr1 & 0x80000)
 281                 printk(KERN_ERR "Bus Error\n");
 282
 283         if (srr1 & 0x40000) {
 284                 printk(KERN_ERR "I-side SLB multiple hit\n");
 285                 dump_slb = 1;
 286         }
 287
 288         if (srr1 & 0x20000)
 289                 printk(KERN_ERR "I-cache parity error hit\n");
 290
 291         if (num_mce_regs == 0)
 292                 printk(KERN_ERR "No MCE registers mapped yet, can't dump\n");
 293         else
 294                 printk(KERN_ERR "SoC debug registers:\n");
 295
 296         for (i = 0; i < num_mce_regs; i++)
 297                 printk(KERN_ERR "%s: 0x%08x\n", mce_regs[i].name,
 298                         in_le32(mce_regs[i].addr));
 299
 300         if (dump_slb) {
 301                 unsigned long e, v;
 302                 int i;
 303
 304                 printk(KERN_ERR "slb contents:\n");
 305                 for (i = 0; i < SLB_NUM_ENTRIES; i++) {
 306                         asm volatile("slbmfee  %0,%1" : "=r" (e) : "r" (i));
 307                         asm volatile("slbmfev  %0,%1" : "=r" (v) : "r" (i));
 308                         printk(KERN_ERR "%02d %016lx %016lx\n", i, e, v);
 309                 }
 310         }
 311
 312
 313         /* SRR1[62] is from MSR[62] if recoverable, so pass that back */
 314         return !!(srr1 & 0x2);
 315 }
 316
 317 static void __init pas_init_early(void)
 318 {
 319         iommu_init_early_pasemi();
 320 }
 321
 322 #ifdef CONFIG_PCMCIA
 323 static int pcmcia_notify(struct notifier_block *nb, unsigned long action,
 324                          void *data)
 325 {
 326         struct device *dev = data;
 327         struct device *parent;
 328         struct pcmcia_device *pdev = to_pcmcia_dev(dev);
 329
 330         /* We are only intereted in device addition */
 331         if (action != BUS_NOTIFY_ADD_DEVICE)
 332                 return 0;
 333
 334         parent = pdev->socket->dev.parent;
 335
 336         /* We know electra_cf devices will always have of_node set, since
 337          * electra_cf is an of_platform driver.
 338          */
 339         if (!parent->archdata.of_node)
 340                 return 0;
 341
 342         if (!of_device_is_compatible(parent->archdata.of_node, "electra-cf"))
 343                 return 0;
 344
 345         /* We use the direct ops for localbus */
 346         dev->archdata.dma_ops = &dma_direct_ops;
 347
 348         return 0;
 349 }
 350
 351 static struct notifier_block pcmcia_notifier = {
 352         .notifier_call = pcmcia_notify,
 353 };
 354
 355 static inline void pasemi_pcmcia_init(void)
 356 {
 357         extern struct bus_type pcmcia_bus_type;
 358
 359         bus_register_notifier(&pcmcia_bus_type, &pcmcia_notifier);
 360 }
 361
 362 #else
 363
 364 static inline void pasemi_pcmcia_init(void)
 365 {
 366 }
 367
 368 #endif
 369
 370
 371 static struct of_device_id pasemi_bus_ids[] = {
 372         /* Unfortunately needed for legacy firmwares */
 373         { .type = "localbus", },
 374         { .type = "sdc", },
 375         /* These are the proper entries, which newer firmware uses */
 376         { .compatible = "pasemi,localbus", },
 377         { .compatible = "pasemi,sdc", },
 378         {},
 379 };
 380
 381 static int __init pasemi_publish_devices(void)
 382 {
 383         if (!machine_is(pasemi))
 384                 return 0;
 385
 386         pasemi_pcmcia_init();
 387
 388         /* Publish OF platform devices for SDC and other non-PCI devices */
 389         of_platform_bus_probe(NULL, pasemi_bus_ids, NULL);
 390
 391         return 0;
 392 }
 393 device_initcall(pasemi_publish_devices);
 394
 395
 396 /*
 397  * Called very early, MMU is off, device-tree isn't unflattened
 398  */
 399 static int __init pas_probe(void)
 400 {
 401         unsigned long root = of_get_flat_dt_root();
 402
 403         if (!of_flat_dt_is_compatible(root, "PA6T-1682M") &&
 404             !of_flat_dt_is_compatible(root, "pasemi,pwrficient"))
 405                 return 0;
 406
 407         hpte_init_native();
 408
 409         alloc_iobmap_l2();
 410
 411         return 1;
 412 }
 413
 414 define_machine(pasemi) {
 415         .name                   = "PA Semi PWRficient",
 416         .probe                  = pas_probe,
 417         .setup_arch             = pas_setup_arch,
 418         .init_early             = pas_init_early,
 419         .init_IRQ               = pas_init_IRQ,
 420         .get_irq                = mpic_get_irq,
 421         .restart                = pas_restart,
 422         .get_boot_time          = pas_get_boot_time,
 423         .calibrate_decr         = generic_calibrate_decr,
 424         .progress               = pas_progress,
 425         .machine_check_exception = pas_machine_check_handler,
 426 };