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   1 /*
   2  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
   3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
   4  *
   5  *    Description:
   6  *      Architecture- / platform-specific boot-time initialization code for
   7  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
   8  *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
   9  *      <dan@net4x.com>.
  10  *
  11  *      This program is free software; you can redistribute it and/or
  12  *      modify it under the terms of the GNU General Public License
  13  *      as published by the Free Software Foundation; either version
  14  *      2 of the License, or (at your option) any later version.
  15  */
  16
  17 #undef DEBUG
  18
  19 #include <linux/config.h>
  20 #include <linux/init.h>
  21 #include <linux/threads.h>
  22 #include <linux/smp.h>
  23 #include <linux/param.h>
  24 #include <linux/string.h>
  25 #include <linux/initrd.h>
  26 #include <linux/seq_file.h>
  27 #include <linux/kdev_t.h>
  28 #include <linux/major.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/kernel.h>
  31
  32 #include <asm/processor.h>
  33 #include <asm/machdep.h>
  34 #include <asm/page.h>
  35 #include <asm/mmu.h>
  36 #include <asm/pgtable.h>
  37 #include <asm/mmu_context.h>
  38 #include <asm/cputable.h>
  39 #include <asm/sections.h>
  40 #include <asm/iommu.h>
  41 #include <asm/firmware.h>
  42 #include <asm/system.h>
  43 #include <asm/time.h>
  44 #include <asm/paca.h>
  45 #include <asm/cache.h>
  46 #include <asm/sections.h>
  47 #include <asm/abs_addr.h>
  48 #include <asm/iseries/hv_lp_config.h>
  49 #include <asm/iseries/hv_call_event.h>
  50 #include <asm/iseries/hv_call_xm.h>
  51 #include <asm/iseries/it_lp_queue.h>
  52 #include <asm/iseries/mf.h>
  53 #include <asm/iseries/it_exp_vpd_panel.h>
  54 #include <asm/iseries/hv_lp_event.h>
  55 #include <asm/iseries/lpar_map.h>
  56 #include <asm/udbg.h>
  57
  58 #include "naca.h"
  59 #include "setup.h"
  60 #include "irq.h"
  61 #include "vpd_areas.h"
  62 #include "processor_vpd.h"
  63 #include "main_store.h"
  64 #include "call_sm.h"
  65 #include "call_hpt.h"
  66
  67 #ifdef DEBUG
  68 #define DBG(fmt...) udbg_printf(fmt)
  69 #else
  70 #define DBG(fmt...)
  71 #endif
  72
  73 /* Function Prototypes */
  74 static unsigned long build_iSeries_Memory_Map(void);
  75 static void iseries_shared_idle(void);
  76 static void iseries_dedicated_idle(void);
  77 #ifdef CONFIG_PCI
  78 extern void iSeries_pci_final_fixup(void);
  79 #else
  80 static void iSeries_pci_final_fixup(void) { }
  81 #endif
  82
  83 /* Global Variables */
  84 int piranha_simulator;
  85
  86 extern int rd_size;             /* Defined in drivers/block/rd.c */
  87 extern unsigned long embedded_sysmap_start;
  88 extern unsigned long embedded_sysmap_end;
  89
  90 extern unsigned long iSeries_recal_tb;
  91 extern unsigned long iSeries_recal_titan;
  92
  93 static unsigned long cmd_mem_limit;
  94
  95 struct MemoryBlock {
  96         unsigned long absStart;
  97         unsigned long absEnd;
  98         unsigned long logicalStart;
  99         unsigned long logicalEnd;
 100 };
 101
 102 /*
 103  * Process the main store vpd to determine where the holes in memory are
 104  * and return the number of physical blocks and fill in the array of
 105  * block data.
 106  */
 107 static unsigned long iSeries_process_Condor_mainstore_vpd(
 108                 struct MemoryBlock *mb_array, unsigned long max_entries)
 109 {
 110         unsigned long holeFirstChunk, holeSizeChunks;
 111         unsigned long numMemoryBlocks = 1;
 112         struct IoHriMainStoreSegment4 *msVpd =
 113                 (struct IoHriMainStoreSegment4 *)xMsVpd;
 114         unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
 115         unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
 116         unsigned long holeSize = holeEnd - holeStart;
 117
 118         printk("Mainstore_VPD: Condor\n");
 119         /*
 120          * Determine if absolute memory has any
 121          * holes so that we can interpret the
 122          * access map we get back from the hypervisor
 123          * correctly.
 124          */
 125         mb_array[0].logicalStart = 0;
 126         mb_array[0].logicalEnd = 0x100000000;
 127         mb_array[0].absStart = 0;
 128         mb_array[0].absEnd = 0x100000000;
 129
 130         if (holeSize) {
 131                 numMemoryBlocks = 2;
 132                 holeStart = holeStart & 0x000fffffffffffff;
 133                 holeStart = addr_to_chunk(holeStart);
 134                 holeFirstChunk = holeStart;
 135                 holeSize = addr_to_chunk(holeSize);
 136                 holeSizeChunks = holeSize;
 137                 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
 138                                 holeFirstChunk, holeSizeChunks );
 139                 mb_array[0].logicalEnd = holeFirstChunk;
 140                 mb_array[0].absEnd = holeFirstChunk;
 141                 mb_array[1].logicalStart = holeFirstChunk;
 142                 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
 143                 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
 144                 mb_array[1].absEnd = 0x100000000;
 145         }
 146         return numMemoryBlocks;
 147 }
 148
 149 #define MaxSegmentAreas                 32
 150 #define MaxSegmentAdrRangeBlocks        128
 151 #define MaxAreaRangeBlocks              4
 152
 153 static unsigned long iSeries_process_Regatta_mainstore_vpd(
 154                 struct MemoryBlock *mb_array, unsigned long max_entries)
 155 {
 156         struct IoHriMainStoreSegment5 *msVpdP =
 157                 (struct IoHriMainStoreSegment5 *)xMsVpd;
 158         unsigned long numSegmentBlocks = 0;
 159         u32 existsBits = msVpdP->msAreaExists;
 160         unsigned long area_num;
 161
 162         printk("Mainstore_VPD: Regatta\n");
 163
 164         for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
 165                 unsigned long numAreaBlocks;
 166                 struct IoHriMainStoreArea4 *currentArea;
 167
 168                 if (existsBits & 0x80000000) {
 169                         unsigned long block_num;
 170
 171                         currentArea = &msVpdP->msAreaArray[area_num];
 172                         numAreaBlocks = currentArea->numAdrRangeBlocks;
 173                         printk("ms_vpd: processing area %2ld  blocks=%ld",
 174                                         area_num, numAreaBlocks);
 175                         for (block_num = 0; block_num < numAreaBlocks;
 176                                         ++block_num ) {
 177                                 /* Process an address range block */
 178                                 struct MemoryBlock tempBlock;
 179                                 unsigned long i;
 180
 181                                 tempBlock.absStart =
 182                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
 183                                 tempBlock.absEnd =
 184                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
 185                                 tempBlock.logicalStart = 0;
 186                                 tempBlock.logicalEnd   = 0;
 187                                 printk("\n          block %ld absStart=%016lx absEnd=%016lx",
 188                                                 block_num, tempBlock.absStart,
 189                                                 tempBlock.absEnd);
 190
 191                                 for (i = 0; i < numSegmentBlocks; ++i) {
 192                                         if (mb_array[i].absStart ==
 193                                                         tempBlock.absStart)
 194                                                 break;
 195                                 }
 196                                 if (i == numSegmentBlocks) {
 197                                         if (numSegmentBlocks == max_entries)
 198                                                 panic("iSeries_process_mainstore_vpd: too many memory blocks");
 199                                         mb_array[numSegmentBlocks] = tempBlock;
 200                                         ++numSegmentBlocks;
 201                                 } else
 202                                         printk(" (duplicate)");
 203                         }
 204                         printk("\n");
 205                 }
 206                 existsBits <<= 1;
 207         }
 208         /* Now sort the blocks found into ascending sequence */
 209         if (numSegmentBlocks > 1) {
 210                 unsigned long m, n;
 211
 212                 for (m = 0; m < numSegmentBlocks - 1; ++m) {
 213                         for (n = numSegmentBlocks - 1; m < n; --n) {
 214                                 if (mb_array[n].absStart <
 215                                                 mb_array[n-1].absStart) {
 216                                         struct MemoryBlock tempBlock;
 217
 218                                         tempBlock = mb_array[n];
 219                                         mb_array[n] = mb_array[n-1];
 220                                         mb_array[n-1] = tempBlock;
 221                                 }
 222                         }
 223                 }
 224         }
 225         /*
 226          * Assign "logical" addresses to each block.  These
 227          * addresses correspond to the hypervisor "bitmap" space.
 228          * Convert all addresses into units of 256K chunks.
 229          */
 230         {
 231         unsigned long i, nextBitmapAddress;
 232
 233         printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
 234         nextBitmapAddress = 0;
 235         for (i = 0; i < numSegmentBlocks; ++i) {
 236                 unsigned long length = mb_array[i].absEnd -
 237                         mb_array[i].absStart;
 238
 239                 mb_array[i].logicalStart = nextBitmapAddress;
 240                 mb_array[i].logicalEnd = nextBitmapAddress + length;
 241                 nextBitmapAddress += length;
 242                 printk("          Bitmap range: %016lx - %016lx\n"
 243                                 "        Absolute range: %016lx - %016lx\n",
 244                                 mb_array[i].logicalStart,
 245                                 mb_array[i].logicalEnd,
 246                                 mb_array[i].absStart, mb_array[i].absEnd);
 247                 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
 248                                 0x000fffffffffffff);
 249                 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
 250                                 0x000fffffffffffff);
 251                 mb_array[i].logicalStart =
 252                         addr_to_chunk(mb_array[i].logicalStart);
 253                 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
 254         }
 255         }
 256
 257         return numSegmentBlocks;
 258 }
 259
 260 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
 261                 unsigned long max_entries)
 262 {
 263         unsigned long i;
 264         unsigned long mem_blocks = 0;
 265
 266         if (cpu_has_feature(CPU_FTR_SLB))
 267                 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
 268                                 max_entries);
 269         else
 270                 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
 271                                 max_entries);
 272
 273         printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
 274         for (i = 0; i < mem_blocks; ++i) {
 275                 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
 276                        "                             abs chunks %016lx - %016lx\n",
 277                         i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
 278                         mb_array[i].absStart, mb_array[i].absEnd);
 279         }
 280         return mem_blocks;
 281 }
 282
 283 static void __init iSeries_get_cmdline(void)
 284 {
 285         char *p, *q;
 286
 287         /* copy the command line parameter from the primary VSP  */
 288         HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
 289                         HvLpDma_Direction_RemoteToLocal);
 290
 291         p = cmd_line;
 292         q = cmd_line + 255;
 293         while(p < q) {
 294                 if (!*p || *p == '\n')
 295                         break;
 296                 ++p;
 297         }
 298         *p = 0;
 299 }
 300
 301 static void __init iSeries_init_early(void)
 302 {
 303         DBG(" -> iSeries_init_early()\n");
 304
 305         ppc64_interrupt_controller = IC_ISERIES;
 306
 307 #if defined(CONFIG_BLK_DEV_INITRD)
 308         /*
 309          * If the init RAM disk has been configured and there is
 310          * a non-zero starting address for it, set it up
 311          */
 312         if (naca.xRamDisk) {
 313                 initrd_start = (unsigned long)__va(naca.xRamDisk);
 314                 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
 315                 initrd_below_start_ok = 1;      // ramdisk in kernel space
 316                 ROOT_DEV = Root_RAM0;
 317                 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
 318                         rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
 319         } else
 320 #endif /* CONFIG_BLK_DEV_INITRD */
 321         {
 322             /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
 323         }
 324
 325         iSeries_recal_tb = get_tb();
 326         iSeries_recal_titan = HvCallXm_loadTod();
 327
 328         /*
 329          * Initialize the hash table management pointers
 330          */
 331         hpte_init_iSeries();
 332
 333         /*
 334          * Initialize the DMA/TCE management
 335          */
 336         iommu_init_early_iSeries();
 337
 338         /* Initialize machine-dependency vectors */
 339 #ifdef CONFIG_SMP
 340         smp_init_iSeries();
 341 #endif
 342         if (itLpNaca.xPirEnvironMode == 0)
 343                 piranha_simulator = 1;
 344
 345         /* Associate Lp Event Queue 0 with processor 0 */
 346         HvCallEvent_setLpEventQueueInterruptProc(0, 0);
 347
 348         mf_init();
 349
 350         /* If we were passed an initrd, set the ROOT_DEV properly if the values
 351          * look sensible. If not, clear initrd reference.
 352          */
 353 #ifdef CONFIG_BLK_DEV_INITRD
 354         if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
 355             initrd_end > initrd_start)
 356                 ROOT_DEV = Root_RAM0;
 357         else
 358                 initrd_start = initrd_end = 0;
 359 #endif /* CONFIG_BLK_DEV_INITRD */
 360
 361         DBG(" <- iSeries_init_early()\n");
 362 }
 363
 364 struct mschunks_map mschunks_map = {
 365         /* XXX We don't use these, but Piranha might need them. */
 366         .chunk_size  = MSCHUNKS_CHUNK_SIZE,
 367         .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
 368         .chunk_mask  = MSCHUNKS_OFFSET_MASK,
 369 };
 370 EXPORT_SYMBOL(mschunks_map);
 371
 372 void mschunks_alloc(unsigned long num_chunks)
 373 {
 374         klimit = _ALIGN(klimit, sizeof(u32));
 375         mschunks_map.mapping = (u32 *)klimit;
 376         klimit += num_chunks * sizeof(u32);
 377         mschunks_map.num_chunks = num_chunks;
 378 }
 379
 380 /*
 381  * The iSeries may have very large memories ( > 128 GB ) and a partition
 382  * may get memory in "chunks" that may be anywhere in the 2**52 real
 383  * address space.  The chunks are 256K in size.  To map this to the
 384  * memory model Linux expects, the AS/400 specific code builds a
 385  * translation table to translate what Linux thinks are "physical"
 386  * addresses to the actual real addresses.  This allows us to make
 387  * it appear to Linux that we have contiguous memory starting at
 388  * physical address zero while in fact this could be far from the truth.
 389  * To avoid confusion, I'll let the words physical and/or real address
 390  * apply to the Linux addresses while I'll use "absolute address" to
 391  * refer to the actual hardware real address.
 392  *
 393  * build_iSeries_Memory_Map gets information from the Hypervisor and
 394  * looks at the Main Store VPD to determine the absolute addresses
 395  * of the memory that has been assigned to our partition and builds
 396  * a table used to translate Linux's physical addresses to these
 397  * absolute addresses.  Absolute addresses are needed when
 398  * communicating with the hypervisor (e.g. to build HPT entries)
 399  *
 400  * Returns the physical memory size
 401  */
 402
 403 static unsigned long __init build_iSeries_Memory_Map(void)
 404 {
 405         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
 406         u32 nextPhysChunk;
 407         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
 408         u32 totalChunks,moreChunks;
 409         u32 currChunk, thisChunk, absChunk;
 410         u32 currDword;
 411         u32 chunkBit;
 412         u64 map;
 413         struct MemoryBlock mb[32];
 414         unsigned long numMemoryBlocks, curBlock;
 415
 416         /* Chunk size on iSeries is 256K bytes */
 417         totalChunks = (u32)HvLpConfig_getMsChunks();
 418         mschunks_alloc(totalChunks);
 419
 420         /*
 421          * Get absolute address of our load area
 422          * and map it to physical address 0
 423          * This guarantees that the loadarea ends up at physical 0
 424          * otherwise, it might not be returned by PLIC as the first
 425          * chunks
 426          */
 427
 428         loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
 429         loadAreaSize =  itLpNaca.xLoadAreaChunks;
 430
 431         /*
 432          * Only add the pages already mapped here.
 433          * Otherwise we might add the hpt pages
 434          * The rest of the pages of the load area
 435          * aren't in the HPT yet and can still
 436          * be assigned an arbitrary physical address
 437          */
 438         if ((loadAreaSize * 64) > HvPagesToMap)
 439                 loadAreaSize = HvPagesToMap / 64;
 440
 441         loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
 442
 443         /*
 444          * TODO Do we need to do something if the HPT is in the 64MB load area?
 445          * This would be required if the itLpNaca.xLoadAreaChunks includes
 446          * the HPT size
 447          */
 448
 449         printk("Mapping load area - physical addr = 0000000000000000\n"
 450                 "                    absolute addr = %016lx\n",
 451                 chunk_to_addr(loadAreaFirstChunk));
 452         printk("Load area size %dK\n", loadAreaSize * 256);
 453
 454         for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
 455                 mschunks_map.mapping[nextPhysChunk] =
 456                         loadAreaFirstChunk + nextPhysChunk;
 457
 458         /*
 459          * Get absolute address of our HPT and remember it so
 460          * we won't map it to any physical address
 461          */
 462         hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
 463         hptSizePages = (u32)HvCallHpt_getHptPages();
 464         hptSizeChunks = hptSizePages >>
 465                 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
 466         hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
 467
 468         printk("HPT absolute addr = %016lx, size = %dK\n",
 469                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
 470
 471         /*
 472          * Determine if absolute memory has any
 473          * holes so that we can interpret the
 474          * access map we get back from the hypervisor
 475          * correctly.
 476          */
 477         numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
 478
 479         /*
 480          * Process the main store access map from the hypervisor
 481          * to build up our physical -> absolute translation table
 482          */
 483         curBlock = 0;
 484         currChunk = 0;
 485         currDword = 0;
 486         moreChunks = totalChunks;
 487
 488         while (moreChunks) {
 489                 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
 490                                 currDword);
 491                 thisChunk = currChunk;
 492                 while (map) {
 493                         chunkBit = map >> 63;
 494                         map <<= 1;
 495                         if (chunkBit) {
 496                                 --moreChunks;
 497                                 while (thisChunk >= mb[curBlock].logicalEnd) {
 498                                         ++curBlock;
 499                                         if (curBlock >= numMemoryBlocks)
 500                                                 panic("out of memory blocks");
 501                                 }
 502                                 if (thisChunk < mb[curBlock].logicalStart)
 503                                         panic("memory block error");
 504
 505                                 absChunk = mb[curBlock].absStart +
 506                                         (thisChunk - mb[curBlock].logicalStart);
 507                                 if (((absChunk < hptFirstChunk) ||
 508                                      (absChunk > hptLastChunk)) &&
 509                                     ((absChunk < loadAreaFirstChunk) ||
 510                                      (absChunk > loadAreaLastChunk))) {
 511                                         mschunks_map.mapping[nextPhysChunk] =
 512                                                 absChunk;
 513                                         ++nextPhysChunk;
 514                                 }
 515                         }
 516                         ++thisChunk;
 517                 }
 518                 ++currDword;
 519                 currChunk += 64;
 520         }
 521
 522         /*
 523          * main store size (in chunks) is
 524          *   totalChunks - hptSizeChunks
 525          * which should be equal to
 526          *   nextPhysChunk
 527          */
 528         return chunk_to_addr(nextPhysChunk);
 529 }
 530
 531 /*
 532  * Document me.
 533  */
 534 static void __init iSeries_setup_arch(void)
 535 {
 536         if (get_lppaca()->shared_proc) {
 537                 ppc_md.idle_loop = iseries_shared_idle;
 538                 printk(KERN_INFO "Using shared processor idle loop\n");
 539         } else {
 540                 ppc_md.idle_loop = iseries_dedicated_idle;
 541                 printk(KERN_INFO "Using dedicated idle loop\n");
 542         }
 543
 544         /* Setup the Lp Event Queue */
 545         setup_hvlpevent_queue();
 546
 547         printk("Max  logical processors = %d\n",
 548                         itVpdAreas.xSlicMaxLogicalProcs);
 549         printk("Max physical processors = %d\n",
 550                         itVpdAreas.xSlicMaxPhysicalProcs);
 551 }
 552
 553 static void iSeries_show_cpuinfo(struct seq_file *m)
 554 {
 555         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
 556 }
 557
 558 static void __init iSeries_progress(char * st, unsigned short code)
 559 {
 560         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
 561         mf_display_progress(code);
 562 }
 563
 564 static void __init iSeries_fixup_klimit(void)
 565 {
 566         /*
 567          * Change klimit to take into account any ram disk
 568          * that may be included
 569          */
 570         if (naca.xRamDisk)
 571                 klimit = KERNELBASE + (u64)naca.xRamDisk +
 572                         (naca.xRamDiskSize * HW_PAGE_SIZE);
 573         else {
 574                 /*
 575                  * No ram disk was included - check and see if there
 576                  * was an embedded system map.  Change klimit to take
 577                  * into account any embedded system map
 578                  */
 579                 if (embedded_sysmap_end)
 580                         klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
 581                                         0xfffffffffffff000);
 582         }
 583 }
 584
 585 static int __init iSeries_src_init(void)
 586 {
 587         /* clear the progress line */
 588         ppc_md.progress(" ", 0xffff);
 589         return 0;
 590 }
 591
 592 late_initcall(iSeries_src_init);
 593
 594 static inline void process_iSeries_events(void)
 595 {
 596         asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
 597 }
 598
 599 static void yield_shared_processor(void)
 600 {
 601         unsigned long tb;
 602
 603         HvCall_setEnabledInterrupts(HvCall_MaskIPI |
 604                                     HvCall_MaskLpEvent |
 605                                     HvCall_MaskLpProd |
 606                                     HvCall_MaskTimeout);
 607
 608         tb = get_tb();
 609         /* Compute future tb value when yield should expire */
 610         HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
 611
 612         /*
 613          * The decrementer stops during the yield.  Force a fake decrementer
 614          * here and let the timer_interrupt code sort out the actual time.
 615          */
 616         get_lppaca()->int_dword.fields.decr_int = 1;
 617         ppc64_runlatch_on();
 618         process_iSeries_events();
 619 }
 620
 621 static void iseries_shared_idle(void)
 622 {
 623         while (1) {
 624                 while (!need_resched() && !hvlpevent_is_pending()) {
 625                         local_irq_disable();
 626                         ppc64_runlatch_off();
 627
 628                         /* Recheck with irqs off */
 629                         if (!need_resched() && !hvlpevent_is_pending())
 630                                 yield_shared_processor();
 631
 632                         HMT_medium();
 633                         local_irq_enable();
 634                 }
 635
 636                 ppc64_runlatch_on();
 637
 638                 if (hvlpevent_is_pending())
 639                         process_iSeries_events();
 640
 641                 preempt_enable_no_resched();
 642                 schedule();
 643                 preempt_disable();
 644         }
 645 }
 646
 647 static void iseries_dedicated_idle(void)
 648 {
 649         set_thread_flag(TIF_POLLING_NRFLAG);
 650
 651         while (1) {
 652                 if (!need_resched()) {
 653                         while (!need_resched()) {
 654                                 ppc64_runlatch_off();
 655                                 HMT_low();
 656
 657                                 if (hvlpevent_is_pending()) {
 658                                         HMT_medium();
 659                                         ppc64_runlatch_on();
 660                                         process_iSeries_events();
 661                                 }
 662                         }
 663
 664                         HMT_medium();
 665                 }
 666
 667                 ppc64_runlatch_on();
 668                 preempt_enable_no_resched();
 669                 schedule();
 670                 preempt_disable();
 671         }
 672 }
 673
 674 #ifndef CONFIG_PCI
 675 void __init iSeries_init_IRQ(void) { }
 676 #endif
 677
 678 static int __init iseries_probe(int platform)
 679 {
 680         if (PLATFORM_ISERIES_LPAR != platform)
 681                 return 0;
 682
 683         powerpc_firmware_features |= FW_FEATURE_ISERIES;
 684         powerpc_firmware_features |= FW_FEATURE_LPAR;
 685
 686         return 1;
 687 }
 688
 689 struct machdep_calls __initdata iseries_md = {
 690         .setup_arch     = iSeries_setup_arch,
 691         .show_cpuinfo   = iSeries_show_cpuinfo,
 692         .init_IRQ       = iSeries_init_IRQ,
 693         .get_irq        = iSeries_get_irq,
 694         .init_early     = iSeries_init_early,
 695         .pcibios_fixup  = iSeries_pci_final_fixup,
 696         .restart        = mf_reboot,
 697         .power_off      = mf_power_off,
 698         .halt           = mf_power_off,
 699         .get_boot_time  = iSeries_get_boot_time,
 700         .set_rtc_time   = iSeries_set_rtc_time,
 701         .get_rtc_time   = iSeries_get_rtc_time,
 702         .calibrate_decr = generic_calibrate_decr,
 703         .progress       = iSeries_progress,
 704         .probe          = iseries_probe,
 705         /* XXX Implement enable_pmcs for iSeries */
 706 };
 707
 708 struct blob {
 709         unsigned char data[PAGE_SIZE];
 710         unsigned long next;
 711 };
 712
 713 struct iseries_flat_dt {
 714         struct boot_param_header header;
 715         u64 reserve_map[2];
 716         struct blob dt;
 717         struct blob strings;
 718 };
 719
 720 struct iseries_flat_dt iseries_dt;
 721
 722 void dt_init(struct iseries_flat_dt *dt)
 723 {
 724         dt->header.off_mem_rsvmap =
 725                 offsetof(struct iseries_flat_dt, reserve_map);
 726         dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
 727         dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
 728         dt->header.totalsize = sizeof(struct iseries_flat_dt);
 729         dt->header.dt_strings_size = sizeof(struct blob);
 730
 731         /* There is no notion of hardware cpu id on iSeries */
 732         dt->header.boot_cpuid_phys = smp_processor_id();
 733
 734         dt->dt.next = (unsigned long)&dt->dt.data;
 735         dt->strings.next = (unsigned long)&dt->strings.data;
 736
 737         dt->header.magic = OF_DT_HEADER;
 738         dt->header.version = 0x10;
 739         dt->header.last_comp_version = 0x10;
 740
 741         dt->reserve_map[0] = 0;
 742         dt->reserve_map[1] = 0;
 743 }
 744
 745 void dt_check_blob(struct blob *b)
 746 {
 747         if (b->next >= (unsigned long)&b->next) {
 748                 DBG("Ran out of space in flat device tree blob!\n");
 749                 BUG();
 750         }
 751 }
 752
 753 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
 754 {
 755         *((u32*)dt->dt.next) = value;
 756         dt->dt.next += sizeof(u32);
 757
 758         dt_check_blob(&dt->dt);
 759 }
 760
 761 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
 762 {
 763         *((u64*)dt->dt.next) = value;
 764         dt->dt.next += sizeof(u64);
 765
 766         dt_check_blob(&dt->dt);
 767 }
 768
 769 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
 770 {
 771         unsigned long start = blob->next - (unsigned long)blob->data;
 772
 773         memcpy((char *)blob->next, data, len);
 774         blob->next = _ALIGN(blob->next + len, 4);
 775
 776         dt_check_blob(blob);
 777
 778         return start;
 779 }
 780
 781 void dt_start_node(struct iseries_flat_dt *dt, char *name)
 782 {
 783         dt_push_u32(dt, OF_DT_BEGIN_NODE);
 784         dt_push_bytes(&dt->dt, name, strlen(name) + 1);
 785 }
 786
 787 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
 788
 789 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
 790 {
 791         unsigned long offset;
 792
 793         dt_push_u32(dt, OF_DT_PROP);
 794
 795         /* Length of the data */
 796         dt_push_u32(dt, len);
 797
 798         /* Put the property name in the string blob. */
 799         offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
 800
 801         /* The offset of the properties name in the string blob. */
 802         dt_push_u32(dt, (u32)offset);
 803
 804         /* The actual data. */
 805         dt_push_bytes(&dt->dt, data, len);
 806 }
 807
 808 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
 809 {
 810         dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
 811 }
 812
 813 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
 814 {
 815         dt_prop(dt, name, (char *)&data, sizeof(u32));
 816 }
 817
 818 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
 819 {
 820         dt_prop(dt, name, (char *)&data, sizeof(u64));
 821 }
 822
 823 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
 824 {
 825         dt_prop(dt, name, (char *)data, sizeof(u64) * n);
 826 }
 827
 828 void dt_prop_u32_list(struct iseries_flat_dt *dt, char *name, u32 *data, int n)
 829 {
 830         dt_prop(dt, name, (char *)data, sizeof(u32) * n);
 831 }
 832
 833 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
 834 {
 835         dt_prop(dt, name, NULL, 0);
 836 }
 837
 838 void dt_cpus(struct iseries_flat_dt *dt)
 839 {
 840         unsigned char buf[32];
 841         unsigned char *p;
 842         unsigned int i, index;
 843         struct IoHriProcessorVpd *d;
 844         u32 pft_size[2];
 845
 846         /* yuck */
 847         snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
 848         p = strchr(buf, ' ');
 849         if (!p) p = buf + strlen(buf);
 850
 851         dt_start_node(dt, "cpus");
 852         dt_prop_u32(dt, "#address-cells", 1);
 853         dt_prop_u32(dt, "#size-cells", 0);
 854
 855         pft_size[0] = 0; /* NUMA CEC cookie, 0 for non NUMA  */
 856         pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE);
 857
 858         for (i = 0; i < NR_CPUS; i++) {
 859                 if (lppaca[i].dyn_proc_status >= 2)
 860                         continue;
 861
 862                 snprintf(p, 32 - (p - buf), "@%d", i);
 863                 dt_start_node(dt, buf);
 864
 865                 dt_prop_str(dt, "device_type", "cpu");
 866
 867                 index = lppaca[i].dyn_hv_phys_proc_index;
 868                 d = &xIoHriProcessorVpd[index];
 869
 870                 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
 871                 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
 872
 873                 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
 874                 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
 875
 876                 /* magic conversions to Hz copied from old code */
 877                 dt_prop_u32(dt, "clock-frequency",
 878                         ((1UL << 34) * 1000000) / d->xProcFreq);
 879                 dt_prop_u32(dt, "timebase-frequency",
 880                         ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
 881
 882                 dt_prop_u32(dt, "reg", i);
 883
 884                 dt_prop_u32_list(dt, "ibm,pft-size", pft_size, 2);
 885
 886                 dt_end_node(dt);
 887         }
 888
 889         dt_end_node(dt);
 890 }
 891
 892 void dt_model(struct iseries_flat_dt *dt)
 893 {
 894         char buf[16] = "IBM,";
 895
 896         /* "IBM," + mfgId[2:3] + systemSerial[1:5] */
 897         strne2a(buf + 4, xItExtVpdPanel.mfgID + 2, 2);
 898         strne2a(buf + 6, xItExtVpdPanel.systemSerial + 1, 5);
 899         buf[11] = '\0';
 900         dt_prop_str(dt, "system-id", buf);
 901
 902         /* "IBM," + machineType[0:4] */
 903         strne2a(buf + 4, xItExtVpdPanel.machineType, 4);
 904         buf[8] = '\0';
 905         dt_prop_str(dt, "model", buf);
 906
 907         dt_prop_str(dt, "compatible", "IBM,iSeries");
 908 }
 909
 910 void build_flat_dt(struct iseries_flat_dt *dt, unsigned long phys_mem_size)
 911 {
 912         u64 tmp[2];
 913
 914         dt_init(dt);
 915
 916         dt_start_node(dt, "");
 917
 918         dt_prop_u32(dt, "#address-cells", 2);
 919         dt_prop_u32(dt, "#size-cells", 2);
 920         dt_model(dt);
 921
 922         /* /memory */
 923         dt_start_node(dt, "memory@0");
 924         dt_prop_str(dt, "name", "memory");
 925         dt_prop_str(dt, "device_type", "memory");
 926         tmp[0] = 0;
 927         tmp[1] = phys_mem_size;
 928         dt_prop_u64_list(dt, "reg", tmp, 2);
 929         dt_end_node(dt);
 930
 931         /* /chosen */
 932         dt_start_node(dt, "chosen");
 933         dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
 934         dt_prop_str(dt, "bootargs", cmd_line);
 935         if (cmd_mem_limit)
 936                 dt_prop_u64(dt, "linux,memory-limit", cmd_mem_limit);
 937         dt_end_node(dt);
 938
 939         dt_cpus(dt);
 940
 941         dt_end_node(dt);
 942
 943         dt_push_u32(dt, OF_DT_END);
 944 }
 945
 946 void * __init iSeries_early_setup(void)
 947 {
 948         unsigned long phys_mem_size;
 949
 950         iSeries_fixup_klimit();
 951
 952         /*
 953          * Initialize the table which translate Linux physical addresses to
 954          * AS/400 absolute addresses
 955          */
 956         phys_mem_size = build_iSeries_Memory_Map();
 957
 958         iSeries_get_cmdline();
 959
 960         /* Save unparsed command line copy for /proc/cmdline */
 961         strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
 962
 963         /* Parse early parameters, in particular mem=x */
 964         parse_early_param();
 965
 966         build_flat_dt(&iseries_dt, phys_mem_size);
 967
 968         return (void *) __pa(&iseries_dt);
 969 }
 970
 971 /*
 972  * On iSeries we just parse the mem=X option from the command line.
 973  * On pSeries it's a bit more complicated, see prom_init_mem()
 974  */
 975 static int __init early_parsemem(char *p)
 976 {
 977         if (p)
 978                 cmd_mem_limit = ALIGN(memparse(p, &p), PAGE_SIZE);
 979         return 0;
 980 }
 981 early_param("mem", early_parsemem);
 982
 983 static void hvputc(char c)
 984 {
 985         if (c == '\n')
 986                 hvputc('\r');
 987
 988         HvCall_writeLogBuffer(&c, 1);
 989 }
 990
 991 void __init udbg_init_iseries(void)
 992 {
 993         udbg_putc = hvputc;
 994 }