SAFE public projects git trees. - safe/jmp/linux-2.6/blob - arch/powerpc/boot/dts/gef_sbc610.dts

   1 /*
   2  * GE Fanuc SBC610 Device Tree Source
   3  *
   4  * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  *
  11  * Based on: SBS CM6 Device Tree Source
  12  * Copyright 2007 SBS Technologies GmbH & Co. KG
  13  * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
  14  * Copyright 2006 Freescale Semiconductor Inc.
  15  */
  16
  17 /*
  18  * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
  19  */
  20
  21 /dts-v1/;
  22
  23 / {
  24         model = "GEF_SBC610";
  25         compatible = "gef,sbc610";
  26         #address-cells = <1>;
  27         #size-cells = <1>;
  28
  29         aliases {
  30                 ethernet0 = &enet0;
  31                 ethernet1 = &enet1;
  32                 serial0 = &serial0;
  33                 serial1 = &serial1;
  34                 pci0 = &pci0;
  35         };
  36
  37         cpus {
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40
  41                 PowerPC,8641@0 {
  42                         device_type = "cpu";
  43                         reg = <0>;
  44                         d-cache-line-size = <32>;       // 32 bytes
  45                         i-cache-line-size = <32>;       // 32 bytes
  46                         d-cache-size = <32768>;         // L1, 32K
  47                         i-cache-size = <32768>;         // L1, 32K
  48                         timebase-frequency = <0>;       // From uboot
  49                         bus-frequency = <0>;            // From uboot
  50                         clock-frequency = <0>;          // From uboot
  51                 };
  52                 PowerPC,8641@1 {
  53                         device_type = "cpu";
  54                         reg = <1>;
  55                         d-cache-line-size = <32>;       // 32 bytes
  56                         i-cache-line-size = <32>;       // 32 bytes
  57                         d-cache-size = <32768>;         // L1, 32K
  58                         i-cache-size = <32768>;         // L1, 32K
  59                         timebase-frequency = <0>;       // From uboot
  60                         bus-frequency = <0>;            // From uboot
  61                         clock-frequency = <0>;          // From uboot
  62                 };
  63         };
  64
  65         memory {
  66                 device_type = "memory";
  67                 reg = <0x0 0x40000000>; // set by uboot
  68         };
  69
  70         localbus@fef05000 {
  71                 #address-cells = <2>;
  72                 #size-cells = <1>;
  73                 compatible = "fsl,mpc8641-localbus", "simple-bus";
  74                 reg = <0xfef05000 0x1000>;
  75                 interrupts = <19 2>;
  76                 interrupt-parent = <&mpic>;
  77
  78                 ranges = <0 0 0xff000000 0x01000000     // 16MB Boot flash
  79                           1 0 0xe8000000 0x08000000     // Paged Flash 0
  80                           2 0 0xe0000000 0x08000000     // Paged Flash 1
  81                           3 0 0xfc100000 0x00020000     // NVRAM
  82                           4 0 0xfc000000 0x00008000     // FPGA
  83                           5 0 0xfc008000 0x00008000     // AFIX FPGA
  84                           6 0 0xfd000000 0x00800000     // IO FPGA (8-bit)
  85                           7 0 0xfd800000 0x00800000>;   // IO FPGA (32-bit)
  86
  87                 nvram@3,0 {
  88                         device_type = "nvram";
  89                         compatible = "simtek,stk14ca8";
  90                         reg = <0x3 0x0 0x20000>;
  91                 };
  92
  93                 fpga@4,0 {
  94                         compatible = "gef,fpga-regs";
  95                         reg = <0x4 0x0 0x40>;
  96                 };
  97
  98                 wdt@4,2000 {
  99                         compatible = "gef,fpga-wdt";
 100                         reg = <0x4 0x2000 0x8>;
 101                         interrupts = <0x1a 0x4>;
 102                         interrupt-parent = <&gef_pic>;
 103                 };
 104                 /* Second watchdog available, driver currently supports one.
 105                 wdt@4,2010 {
 106                         compatible = "gef,fpga-wdt";
 107                         reg = <0x4 0x2010 0x8>;
 108                         interrupts = <0x1b 0x4>;
 109                         interrupt-parent = <&gef_pic>;
 110                 };
 111                 */
 112                 gef_pic: pic@4,4000 {
 113                         #interrupt-cells = <1>;
 114                         interrupt-controller;
 115                         compatible = "gef,fpga-pic";
 116                         reg = <0x4 0x4000 0x20>;
 117                         interrupts = <0x8
 118                                       0x9>;
 119                         interrupt-parent = <&mpic>;
 120
 121                 };
 122                 gef_gpio: gpio@7,14000 {
 123                         #gpio-cells = <2>;
 124                         compatible = "gef,sbc610-gpio";
 125                         reg = <0x7 0x14000 0x24>;
 126                         gpio-controller;
 127                 };
 128         };
 129
 130         soc@fef00000 {
 131                 #address-cells = <1>;
 132                 #size-cells = <1>;
 133                 #interrupt-cells = <2>;
 134                 device_type = "soc";
 135                 compatible = "simple-bus";
 136                 ranges = <0x0 0xfef00000 0x00100000>;
 137                 bus-frequency = <33333333>;
 138
 139                 mcm-law@0 {
 140                         compatible = "fsl,mcm-law";
 141                         reg = <0x0 0x1000>;
 142                         fsl,num-laws = <10>;
 143                 };
 144
 145                 mcm@1000 {
 146                         compatible = "fsl,mpc8641-mcm", "fsl,mcm";
 147                         reg = <0x1000 0x1000>;
 148                         interrupts = <17 2>;
 149                         interrupt-parent = <&mpic>;
 150                 };
 151
 152                 i2c1: i2c@3000 {
 153                         #address-cells = <1>;
 154                         #size-cells = <0>;
 155                         compatible = "fsl-i2c";
 156                         reg = <0x3000 0x100>;
 157                         interrupts = <0x2b 0x2>;
 158                         interrupt-parent = <&mpic>;
 159                         dfsrr;
 160
 161                         hwmon@48 {
 162                                 compatible = "national,lm92";
 163                                 reg = <0x48>;
 164                         };
 165
 166                         hwmon@4c {
 167                                 compatible = "adi,adt7461";
 168                                 reg = <0x4c>;
 169                         };
 170
 171                         rtc@51 {
 172                                 compatible = "epson,rx8581";
 173                                 reg = <0x00000051>;
 174                         };
 175
 176                         eti@6b {
 177                                 compatible = "dallas,ds1682";
 178                                 reg = <0x6b>;
 179                         };
 180                 };
 181
 182                 i2c2: i2c@3100 {
 183                         #address-cells = <1>;
 184                         #size-cells = <0>;
 185                         compatible = "fsl-i2c";
 186                         reg = <0x3100 0x100>;
 187                         interrupts = <0x2b 0x2>;
 188                         interrupt-parent = <&mpic>;
 189                         dfsrr;
 190                 };
 191
 192                 dma@21300 {
 193                         #address-cells = <1>;
 194                         #size-cells = <1>;
 195                         compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
 196                         reg = <0x21300 0x4>;
 197                         ranges = <0x0 0x21100 0x200>;
 198                         cell-index = <0>;
 199                         dma-channel@0 {
 200                                 compatible = "fsl,mpc8641-dma-channel",
 201                                            "fsl,eloplus-dma-channel";
 202                                 reg = <0x0 0x80>;
 203                                 cell-index = <0>;
 204                                 interrupt-parent = <&mpic>;
 205                                 interrupts = <20 2>;
 206                         };
 207                         dma-channel@80 {
 208                                 compatible = "fsl,mpc8641-dma-channel",
 209                                            "fsl,eloplus-dma-channel";
 210                                 reg = <0x80 0x80>;
 211                                 cell-index = <1>;
 212                                 interrupt-parent = <&mpic>;
 213                                 interrupts = <21 2>;
 214                         };
 215                         dma-channel@100 {
 216                                 compatible = "fsl,mpc8641-dma-channel",
 217                                            "fsl,eloplus-dma-channel";
 218                                 reg = <0x100 0x80>;
 219                                 cell-index = <2>;
 220                                 interrupt-parent = <&mpic>;
 221                                 interrupts = <22 2>;
 222                         };
 223                         dma-channel@180 {
 224                                 compatible = "fsl,mpc8641-dma-channel",
 225                                            "fsl,eloplus-dma-channel";
 226                                 reg = <0x180 0x80>;
 227                                 cell-index = <3>;
 228                                 interrupt-parent = <&mpic>;
 229                                 interrupts = <23 2>;
 230                         };
 231                 };
 232
 233                 enet0: ethernet@24000 {
 234                         #address-cells = <1>;
 235                         #size-cells = <1>;
 236                         device_type = "network";
 237                         model = "eTSEC";
 238                         compatible = "gianfar";
 239                         reg = <0x24000 0x1000>;
 240                         ranges = <0x0 0x24000 0x1000>;
 241                         local-mac-address = [ 00 00 00 00 00 00 ];
 242                         interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
 243                         interrupt-parent = <&mpic>;
 244                         phy-handle = <&phy0>;
 245                         phy-connection-type = "gmii";
 246
 247                         mdio@520 {
 248                                 #address-cells = <1>;
 249                                 #size-cells = <0>;
 250                                 compatible = "fsl,gianfar-mdio";
 251                                 reg = <0x520 0x20>;
 252
 253                                 phy0: ethernet-phy@0 {
 254                                         interrupt-parent = <&gef_pic>;
 255                                         interrupts = <0x9 0x4>;
 256                                         reg = <1>;
 257                                 };
 258                                 phy2: ethernet-phy@2 {
 259                                         interrupt-parent = <&gef_pic>;
 260                                         interrupts = <0x8 0x4>;
 261                                         reg = <3>;
 262                                 };
 263                         };
 264                 };
 265
 266                 enet1: ethernet@26000 {
 267                         device_type = "network";
 268                         model = "eTSEC";
 269                         compatible = "gianfar";
 270                         reg = <0x26000 0x1000>;
 271                         local-mac-address = [ 00 00 00 00 00 00 ];
 272                         interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
 273                         interrupt-parent = <&mpic>;
 274                         phy-handle = <&phy2>;
 275                         phy-connection-type = "gmii";
 276                 };
 277
 278                 serial0: serial@4500 {
 279                         cell-index = <0>;
 280                         device_type = "serial";
 281                         compatible = "ns16550";
 282                         reg = <0x4500 0x100>;
 283                         clock-frequency = <0>;
 284                         interrupts = <0x2a 0x2>;
 285                         interrupt-parent = <&mpic>;
 286                 };
 287
 288                 serial1: serial@4600 {
 289                         cell-index = <1>;
 290                         device_type = "serial";
 291                         compatible = "ns16550";
 292                         reg = <0x4600 0x100>;
 293                         clock-frequency = <0>;
 294                         interrupts = <0x1c 0x2>;
 295                         interrupt-parent = <&mpic>;
 296                 };
 297
 298                 mpic: pic@40000 {
 299                         clock-frequency = <0>;
 300                         interrupt-controller;
 301                         #address-cells = <0>;
 302                         #interrupt-cells = <2>;
 303                         reg = <0x40000 0x40000>;
 304                         compatible = "chrp,open-pic";
 305                         device_type = "open-pic";
 306                 };
 307
 308                 global-utilities@e0000 {
 309                         compatible = "fsl,mpc8641-guts";
 310                         reg = <0xe0000 0x1000>;
 311                         fsl,has-rstcr;
 312                 };
 313         };
 314
 315         pci0: pcie@fef08000 {
 316                 compatible = "fsl,mpc8641-pcie";
 317                 device_type = "pci";
 318                 #interrupt-cells = <1>;
 319                 #size-cells = <2>;
 320                 #address-cells = <3>;
 321                 reg = <0xfef08000 0x1000>;
 322                 bus-range = <0x0 0xff>;
 323                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
 324                           0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
 325                 clock-frequency = <33333333>;
 326                 interrupt-parent = <&mpic>;
 327                 interrupts = <0x18 0x2>;
 328                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 329                 interrupt-map = <
 330                         0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
 331                         0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
 332                         0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
 333                         0x0000 0x0 0x0 0x4 &mpic 0x3 0x1
 334                 >;
 335
 336                 pcie@0 {
 337                         reg = <0 0 0 0 0>;
 338                         #size-cells = <2>;
 339                         #address-cells = <3>;
 340                         device_type = "pci";
 341                         ranges = <0x02000000 0x0 0x80000000
 342                                   0x02000000 0x0 0x80000000
 343                                   0x0 0x40000000
 344
 345                                   0x01000000 0x0 0x00000000
 346                                   0x01000000 0x0 0x00000000
 347                                   0x0 0x00400000>;
 348                 };
 349         };
 350 };