2 * Description: Instruction SRAM accessor functions for the Blackfin
4 * Copyright 2008 Analog Devices Inc.
6 * Bugs: Enter bugs at http://blackfin.uclinux.org/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, see the file COPYING, or write
15 * to the Free Software Foundation, Inc.,
16 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 #define pr_fmt(fmt) "isram: " fmt
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/types.h>
24 #include <linux/spinlock.h>
25 #include <linux/sched.h>
27 #include <asm/blackfin.h>
31 * IMPORTANT WARNING ABOUT THESE FUNCTIONS
33 * The emulator will not function correctly if a write command is left in
34 * ITEST_COMMAND or DTEST_COMMAND AND access to cache memory is needed by
35 * the emulator. To avoid such problems, ensure that both ITEST_COMMAND
36 * and DTEST_COMMAND are zero when exiting these functions.
41 * On the Blackfin, L1 instruction sram (which operates at core speeds) can not
42 * be accessed by a normal core load, so we need to go through a few hoops to
44 * To try to make it easier - we export a memcpy interface, where either src or
45 * dest can be in this special L1 memory area.
46 * The low level read/write functions should not be exposed to the rest of the
47 * kernel, since they operate on 64-bit data, and need specific address alignment
50 static DEFINE_SPINLOCK(dtest_lock);
52 /* Takes a void pointer */
53 #define IADDR2DTEST(x) \
54 ({ unsigned long __addr = (unsigned long)(x); \
55 (__addr & 0x47F8) | /* address bits 14 & 10:3 */ \
56 (__addr & 0x0800) << 15 | /* address bit 11 */ \
57 (__addr & 0x3000) << 4 | /* address bits 13:12 */ \
58 (__addr & 0x8000) << 8 | /* address bit 15 */ \
59 (0x1000004); /* isram access */ \
62 /* Takes a pointer, and returns the offset (in bits) which things should be shifted */
63 #define ADDR2OFFSET(x) ((((unsigned long)(x)) & 0x7) * 8)
65 /* Takes a pointer, determines if it is the last byte in the isram 64-bit data type */
66 #define ADDR2LAST(x) ((((unsigned long)x) & 0x7) == 0x7)
68 static void isram_write(const void *addr, uint64_t data)
73 if (addr >= (void *)(L1_CODE_START + L1_CODE_LENGTH))
76 cmd = IADDR2DTEST(addr) | 1; /* write */
79 * Writes to DTEST_DATA[0:1] need to be atomic with write to DTEST_COMMAND
80 * While in exception context - atomicity is guaranteed or double fault
82 spin_lock_irqsave(&dtest_lock, flags);
84 bfin_write_DTEST_DATA0(data & 0xFFFFFFFF);
85 bfin_write_DTEST_DATA1(data >> 32);
87 /* use the builtin, since interrupts are already turned off */
88 __builtin_bfin_csync();
89 bfin_write_DTEST_COMMAND(cmd);
90 __builtin_bfin_csync();
92 bfin_write_DTEST_COMMAND(0);
93 __builtin_bfin_csync();
95 spin_unlock_irqrestore(&dtest_lock, flags);
98 static uint64_t isram_read(const void *addr)
104 if (addr > (void *)(L1_CODE_START + L1_CODE_LENGTH))
107 cmd = IADDR2DTEST(addr) | 0; /* read */
110 * Reads of DTEST_DATA[0:1] need to be atomic with write to DTEST_COMMAND
111 * While in exception context - atomicity is guaranteed or double fault
113 spin_lock_irqsave(&dtest_lock, flags);
114 /* use the builtin, since interrupts are already turned off */
115 __builtin_bfin_csync();
116 bfin_write_DTEST_COMMAND(cmd);
117 __builtin_bfin_csync();
118 ret = bfin_read_DTEST_DATA0() | ((uint64_t)bfin_read_DTEST_DATA1() << 32);
120 bfin_write_DTEST_COMMAND(0);
121 __builtin_bfin_csync();
122 spin_unlock_irqrestore(&dtest_lock, flags);
127 static bool isram_check_addr(const void *addr, size_t n)
129 if ((addr >= (void *)L1_CODE_START) &&
130 (addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))) {
131 if ((addr + n) > (void *)(L1_CODE_START + L1_CODE_LENGTH)) {
132 show_stack(NULL, NULL);
133 pr_err("copy involving %p length (%zu) too long\n", addr, n);
141 * The isram_memcpy() function copies n bytes from memory area src to memory area dest.
142 * The isram_memcpy() function returns a pointer to dest.
143 * Either dest or src can be in L1 instruction sram.
145 void *isram_memcpy(void *dest, const void *src, size_t n)
147 uint64_t data_in = 0, data_out = 0;
149 bool dest_in_l1, src_in_l1, need_data, put_data;
150 unsigned char byte, *src_byte, *dest_byte;
152 src_byte = (unsigned char *)src;
153 dest_byte = (unsigned char *)dest;
155 dest_in_l1 = isram_check_addr(dest, n);
156 src_in_l1 = isram_check_addr(src, n);
160 for (count = 0; count < n; count++) {
163 data_in = isram_read(src + count);
167 if (ADDR2LAST(src + count))
170 byte = (unsigned char)((data_in >> ADDR2OFFSET(src + count)) & 0xff);
173 /* src is in L2 or L3 - so just dereference*/
174 byte = src_byte[count];
179 data_out = isram_read(dest + count);
183 data_out &= ~((uint64_t)0xff << ADDR2OFFSET(dest + count));
184 data_out |= ((uint64_t)byte << ADDR2OFFSET(dest + count));
186 if (ADDR2LAST(dest + count)) {
188 isram_write(dest + count, data_out);
191 /* dest in L2 or L3 - so just dereference */
192 dest_byte[count] = byte;
196 /* make sure we dump the last byte if necessary */
197 if (dest_in_l1 && !put_data)
198 isram_write(dest + count, data_out);
202 EXPORT_SYMBOL(isram_memcpy);
204 #ifdef CONFIG_BFIN_ISRAM_SELF_TEST
206 #define TEST_LEN 0x100
208 static __init void hex_dump(unsigned char *buf, int len)
211 pr_cont("%02x", *buf++);
214 static __init int isram_read_test(char *sdram, void *l1inst)
217 uint64_t data1, data2;
219 pr_info("INFO: running isram_read tests\n");
221 /* setup some different data to play with */
222 for (i = 0; i < TEST_LEN; ++i)
224 dma_memcpy(l1inst, sdram, TEST_LEN);
226 /* make sure we can read the L1 inst */
227 for (i = 0; i < TEST_LEN; i += sizeof(uint64_t)) {
228 data1 = isram_read(l1inst + i);
229 memcpy(&data2, sdram + i, sizeof(data2));
230 if (memcmp(&data1, &data2, sizeof(uint64_t))) {
231 pr_err("FAIL: isram_read(%p) returned %#llx but wanted %#llx\n",
232 l1inst + i, data1, data2);
240 static __init int isram_write_test(char *sdram, void *l1inst)
243 uint64_t data1, data2;
245 pr_info("INFO: running isram_write tests\n");
247 /* setup some different data to play with */
248 memset(sdram, 0, TEST_LEN * 2);
249 dma_memcpy(l1inst, sdram, TEST_LEN);
250 for (i = 0; i < TEST_LEN; ++i)
253 /* make sure we can write the L1 inst */
254 for (i = 0; i < TEST_LEN; i += sizeof(uint64_t)) {
255 memcpy(&data1, sdram + i, sizeof(data1));
256 isram_write(l1inst + i, data1);
257 data2 = isram_read(l1inst + i);
258 if (memcmp(&data1, &data2, sizeof(uint64_t))) {
259 pr_err("FAIL: isram_write(%p, %#llx) != %#llx\n",
260 l1inst + i, data1, data2);
265 dma_memcpy(sdram + TEST_LEN, l1inst, TEST_LEN);
266 if (memcmp(sdram, sdram + TEST_LEN, TEST_LEN)) {
267 pr_err("FAIL: isram_write() did not work properly\n");
275 _isram_memcpy_test(char pattern, void *sdram, void *l1inst, const char *smemcpy,
276 void *(*fmemcpy)(void *, const void *, size_t))
278 memset(sdram, pattern, TEST_LEN);
279 fmemcpy(l1inst, sdram, TEST_LEN);
280 fmemcpy(sdram + TEST_LEN, l1inst, TEST_LEN);
281 if (memcmp(sdram, sdram + TEST_LEN, TEST_LEN)) {
282 pr_err("FAIL: %s(%p <=> %p, %#x) failed (data is %#x)\n",
283 smemcpy, l1inst, sdram, TEST_LEN, pattern);
288 #define _isram_memcpy_test(a, b, c, d) _isram_memcpy_test(a, b, c, #d, d)
290 static __init int isram_memcpy_test(char *sdram, void *l1inst)
292 int i, j, thisret, ret = 0;
294 /* check broad isram_memcpy() */
295 pr_info("INFO: running broad isram_memcpy tests\n");
296 for (i = 0xf; i >= 0; --i)
297 ret += _isram_memcpy_test(i, sdram, l1inst, isram_memcpy);
299 /* check read of small, unaligned, and hardware 64bit limits */
300 pr_info("INFO: running isram_memcpy (read) tests\n");
302 for (i = 0; i < TEST_LEN; ++i)
304 dma_memcpy(l1inst, sdram, TEST_LEN);
307 for (i = 0; i < TEST_LEN - 32; ++i) {
308 unsigned char cmp[32];
309 for (j = 1; j <= 32; ++j) {
310 memset(cmp, 0, sizeof(cmp));
311 isram_memcpy(cmp, l1inst + i, j);
312 if (memcmp(cmp, sdram + i, j)) {
313 pr_err("FAIL: %p:", l1inst + 1);
316 hex_dump(sdram + i, j);
318 if (++thisret > 20) {
319 pr_err("FAIL: skipping remaining series\n");
328 /* check write of small, unaligned, and hardware 64bit limits */
329 pr_info("INFO: running isram_memcpy (write) tests\n");
331 memset(sdram + TEST_LEN, 0, TEST_LEN);
332 dma_memcpy(l1inst, sdram + TEST_LEN, TEST_LEN);
335 for (i = 0; i < TEST_LEN - 32; ++i) {
336 unsigned char cmp[32];
337 for (j = 1; j <= 32; ++j) {
338 isram_memcpy(l1inst + i, sdram + i, j);
339 dma_memcpy(cmp, l1inst + i, j);
340 if (memcmp(cmp, sdram + i, j)) {
341 pr_err("FAIL: %p:", l1inst + i);
344 hex_dump(sdram + i, j);
346 if (++thisret > 20) {
347 pr_err("FAIL: skipping remaining series\n");
359 static __init int isram_test_init(void)
365 sdram = kmalloc(TEST_LEN * 2, GFP_KERNEL);
367 pr_warning("SKIP: could not allocate sdram\n");
371 l1inst = l1_inst_sram_alloc(TEST_LEN);
374 pr_warning("SKIP: could not allocate L1 inst\n");
378 /* sanity check initial L1 inst state */
380 pr_info("INFO: running initial dma_memcpy checks\n");
381 if (_isram_memcpy_test(0xa, sdram, l1inst, dma_memcpy))
383 if (_isram_memcpy_test(0x5, sdram, l1inst, dma_memcpy))
387 ret += isram_read_test(sdram, l1inst);
388 ret += isram_write_test(sdram, l1inst);
389 ret += isram_memcpy_test(sdram, l1inst);
398 pr_info("PASS: all tests worked !\n");
401 late_initcall(isram_test_init);
403 static __exit void isram_test_exit(void)
405 /* stub to allow unloading */
407 module_exit(isram_test_exit);