SAFE public projects git trees. - safe/jmp/linux-2.6/blob - arch/blackfin/mach-bf561/boards/cm_bf561.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *               2008-2009 Bluetechnix
   4  *               2005 National ICT Australia (NICTA)
   5  *                    Aidan Williams <aidan@nicta.com.au>
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  17 #include <linux/usb/isp1362.h>
  18 #endif
  19 #include <linux/ata_platform.h>
  20 #include <linux/irq.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/portmux.h>
  24 #include <asm/dpmc.h>
  25 #include <linux/mtd/physmap.h>
  26
  27 /*
  28  * Name the Board for the /proc/cpuinfo
  29  */
  30 const char bfin_board_name[] = "Bluetechnix CM BF561";
  31
  32 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  33 /* all SPI peripherals info goes here */
  34
  35 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  36 static struct mtd_partition bfin_spi_flash_partitions[] = {
  37         {
  38                 .name = "bootloader(spi)",
  39                 .size = 0x00020000,
  40                 .offset = 0,
  41                 .mask_flags = MTD_CAP_ROM
  42         }, {
  43                 .name = "linux kernel(spi)",
  44                 .size = 0xe0000,
  45                 .offset = 0x20000
  46         }, {
  47                 .name = "file system(spi)",
  48                 .size = 0x700000,
  49                 .offset = 0x00100000,
  50         }
  51 };
  52
  53 static struct flash_platform_data bfin_spi_flash_data = {
  54         .name = "m25p80",
  55         .parts = bfin_spi_flash_partitions,
  56         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  57         .type = "m25p64",
  58 };
  59
  60 /* SPI flash chip (m25p64) */
  61 static struct bfin5xx_spi_chip spi_flash_chip_info = {
  62         .enable_dma = 0,         /* use dma transfer with this chip*/
  63         .bits_per_word = 8,
  64 };
  65 #endif
  66
  67 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  68 /* SPI ADC chip */
  69 static struct bfin5xx_spi_chip spi_adc_chip_info = {
  70         .enable_dma = 1,         /* use dma transfer with this chip*/
  71         .bits_per_word = 16,
  72 };
  73 #endif
  74
  75 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  76 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  77         .enable_dma = 0,
  78         .bits_per_word = 16,
  79 };
  80 #endif
  81
  82 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  83 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  84         .enable_dma = 0,
  85         .bits_per_word = 8,
  86 };
  87 #endif
  88
  89 static struct spi_board_info bfin_spi_board_info[] __initdata = {
  90 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  91         {
  92                 /* the modalias must be the same as spi device driver name */
  93                 .modalias = "m25p80", /* Name of spi_driver for this device */
  94                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
  95                 .bus_num = 0, /* Framework bus number */
  96                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  97                 .platform_data = &bfin_spi_flash_data,
  98                 .controller_data = &spi_flash_chip_info,
  99                 .mode = SPI_MODE_3,
 100         },
 101 #endif
 102
 103 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 104         {
 105                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 106                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 107                 .bus_num = 0, /* Framework bus number */
 108                 .chip_select = 1, /* Framework chip select. */
 109                 .platform_data = NULL, /* No spi_driver specific config */
 110                 .controller_data = &spi_adc_chip_info,
 111         },
 112 #endif
 113
 114 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 115         {
 116                 .modalias = "ad1836",
 117                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 118                 .bus_num = 0,
 119                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
 120                 .controller_data = &ad1836_spi_chip_info,
 121         },
 122 #endif
 123 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 124         {
 125                 .modalias = "mmc_spi",
 126                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 127                 .bus_num = 0,
 128                 .chip_select = 1,
 129                 .controller_data = &mmc_spi_chip_info,
 130                 .mode = SPI_MODE_3,
 131         },
 132 #endif
 133 };
 134
 135 /* SPI (0) */
 136 static struct resource bfin_spi0_resource[] = {
 137         [0] = {
 138                 .start = SPI0_REGBASE,
 139                 .end   = SPI0_REGBASE + 0xFF,
 140                 .flags = IORESOURCE_MEM,
 141         },
 142         [1] = {
 143                 .start = CH_SPI,
 144                 .end   = CH_SPI,
 145                 .flags = IORESOURCE_DMA,
 146         },
 147         [2] = {
 148                 .start = IRQ_SPI,
 149                 .end   = IRQ_SPI,
 150                 .flags = IORESOURCE_IRQ,
 151         },
 152 };
 153
 154 /* SPI controller data */
 155 static struct bfin5xx_spi_master bfin_spi0_info = {
 156         .num_chipselect = 8,
 157         .enable_dma = 1,  /* master has the ability to do dma transfer */
 158         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 159 };
 160
 161 static struct platform_device bfin_spi0_device = {
 162         .name = "bfin-spi",
 163         .id = 0, /* Bus number */
 164         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 165         .resource = bfin_spi0_resource,
 166         .dev = {
 167                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 168         },
 169 };
 170 #endif  /* spi master and devices */
 171
 172
 173 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
 174 static struct platform_device hitachi_fb_device = {
 175         .name = "hitachi-tx09",
 176 };
 177 #endif
 178
 179
 180 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 181 #include <linux/smc91x.h>
 182
 183 static struct smc91x_platdata smc91x_info = {
 184         .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
 185         .leda = RPC_LED_100_10,
 186         .ledb = RPC_LED_TX_RX,
 187 };
 188
 189 static struct resource smc91x_resources[] = {
 190         {
 191                 .name = "smc91x-regs",
 192                 .start = 0x28000300,
 193                 .end = 0x28000300 + 16,
 194                 .flags = IORESOURCE_MEM,
 195         }, {
 196                 .start = IRQ_PF0,
 197                 .end = IRQ_PF0,
 198                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 199         },
 200 };
 201 static struct platform_device smc91x_device = {
 202         .name = "smc91x",
 203         .id = 0,
 204         .num_resources = ARRAY_SIZE(smc91x_resources),
 205         .resource = smc91x_resources,
 206         .dev    = {
 207                 .platform_data  = &smc91x_info,
 208         },
 209 };
 210 #endif
 211
 212 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
 213 #include <linux/smsc911x.h>
 214
 215 static struct resource smsc911x_resources[] = {
 216         {
 217                 .name = "smsc911x-memory",
 218                 .start = 0x24008000,
 219                 .end = 0x24008000 + 0xFF,
 220                 .flags = IORESOURCE_MEM,
 221         },
 222         {
 223                 .start = IRQ_PF43,
 224                 .end = IRQ_PF43,
 225                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 226         },
 227 };
 228
 229 static struct smsc911x_platform_config smsc911x_config = {
 230         .flags = SMSC911X_USE_16BIT,
 231         .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 232         .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
 233         .phy_interface = PHY_INTERFACE_MODE_MII,
 234 };
 235
 236 static struct platform_device smsc911x_device = {
 237         .name = "smsc911x",
 238         .id = 0,
 239         .num_resources = ARRAY_SIZE(smsc911x_resources),
 240         .resource = smsc911x_resources,
 241         .dev = {
 242                 .platform_data = &smsc911x_config,
 243         },
 244 };
 245 #endif
 246
 247 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 248 static struct resource net2272_bfin_resources[] = {
 249         {
 250                 .start = 0x24000000,
 251                 .end = 0x24000000 + 0x100,
 252                 .flags = IORESOURCE_MEM,
 253         }, {
 254                 .start = IRQ_PF45,
 255                 .end = IRQ_PF45,
 256                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 257         },
 258 };
 259
 260 static struct platform_device net2272_bfin_device = {
 261         .name = "net2272",
 262         .id = -1,
 263         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
 264         .resource = net2272_bfin_resources,
 265 };
 266 #endif
 267
 268 static struct resource bfin_gpios_resources = {
 269         .start = 0,
 270         .end   = MAX_BLACKFIN_GPIOS - 1,
 271         .flags = IORESOURCE_IRQ,
 272 };
 273
 274 static struct platform_device bfin_gpios_device = {
 275         .name = "simple-gpio",
 276         .id = -1,
 277         .num_resources = 1,
 278         .resource = &bfin_gpios_resources,
 279 };
 280
 281 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 282 static struct resource isp1362_hcd_resources[] = {
 283         {
 284                 .start = 0x24008000,
 285                 .end = 0x24008000,
 286                 .flags = IORESOURCE_MEM,
 287         }, {
 288                 .start = 0x24008004,
 289                 .end = 0x24008004,
 290                 .flags = IORESOURCE_MEM,
 291         }, {
 292                 .start = IRQ_PF47,
 293                 .end = IRQ_PF47,
 294                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 295         },
 296 };
 297
 298 static struct isp1362_platform_data isp1362_priv = {
 299         .sel15Kres = 1,
 300         .clknotstop = 0,
 301         .oc_enable = 0,
 302         .int_act_high = 0,
 303         .int_edge_triggered = 0,
 304         .remote_wakeup_connected = 0,
 305         .no_power_switching = 1,
 306         .power_switching_mode = 0,
 307 };
 308
 309 static struct platform_device isp1362_hcd_device = {
 310         .name = "isp1362-hcd",
 311         .id = 0,
 312         .dev = {
 313                 .platform_data = &isp1362_priv,
 314         },
 315         .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
 316         .resource = isp1362_hcd_resources,
 317 };
 318 #endif
 319
 320 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 321 static struct resource bfin_uart_resources[] = {
 322         {
 323                 .start = 0xFFC00400,
 324                 .end = 0xFFC004FF,
 325                 .flags = IORESOURCE_MEM,
 326         },
 327 };
 328
 329 static struct platform_device bfin_uart_device = {
 330         .name = "bfin-uart",
 331         .id = 1,
 332         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 333         .resource = bfin_uart_resources,
 334 };
 335 #endif
 336
 337 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 338 #ifdef CONFIG_BFIN_SIR0
 339 static struct resource bfin_sir0_resources[] = {
 340         {
 341                 .start = 0xFFC00400,
 342                 .end = 0xFFC004FF,
 343                 .flags = IORESOURCE_MEM,
 344         },
 345         {
 346                 .start = IRQ_UART0_RX,
 347                 .end = IRQ_UART0_RX+1,
 348                 .flags = IORESOURCE_IRQ,
 349         },
 350         {
 351                 .start = CH_UART0_RX,
 352                 .end = CH_UART0_RX+1,
 353                 .flags = IORESOURCE_DMA,
 354         },
 355 };
 356
 357 static struct platform_device bfin_sir0_device = {
 358         .name = "bfin_sir",
 359         .id = 0,
 360         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 361         .resource = bfin_sir0_resources,
 362 };
 363 #endif
 364 #endif
 365
 366 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 367 #define PATA_INT        IRQ_PF46
 368
 369 static struct pata_platform_info bfin_pata_platform_data = {
 370         .ioport_shift = 2,
 371         .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
 372 };
 373
 374 static struct resource bfin_pata_resources[] = {
 375         {
 376                 .start = 0x2400C000,
 377                 .end = 0x2400C001F,
 378                 .flags = IORESOURCE_MEM,
 379         },
 380         {
 381                 .start = 0x2400D018,
 382                 .end = 0x2400D01B,
 383                 .flags = IORESOURCE_MEM,
 384         },
 385         {
 386                 .start = PATA_INT,
 387                 .end = PATA_INT,
 388                 .flags = IORESOURCE_IRQ,
 389         },
 390 };
 391
 392 static struct platform_device bfin_pata_device = {
 393         .name = "pata_platform",
 394         .id = -1,
 395         .num_resources = ARRAY_SIZE(bfin_pata_resources),
 396         .resource = bfin_pata_resources,
 397         .dev = {
 398                 .platform_data = &bfin_pata_platform_data,
 399         }
 400 };
 401 #endif
 402
 403 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 404 static struct mtd_partition para_partitions[] = {
 405         {
 406                 .name       = "bootloader(nor)",
 407                 .size       = 0x40000,
 408                 .offset     = 0,
 409         }, {
 410                 .name       = "linux kernel(nor)",
 411                 .size       = 0x100000,
 412                 .offset     = MTDPART_OFS_APPEND,
 413         }, {
 414                 .name       = "file system(nor)",
 415                 .size       = MTDPART_SIZ_FULL,
 416                 .offset     = MTDPART_OFS_APPEND,
 417         }
 418 };
 419
 420 static struct physmap_flash_data para_flash_data = {
 421         .width      = 2,
 422         .parts      = para_partitions,
 423         .nr_parts   = ARRAY_SIZE(para_partitions),
 424 };
 425
 426 static struct resource para_flash_resource = {
 427         .start = 0x20000000,
 428         .end   = 0x207fffff,
 429         .flags = IORESOURCE_MEM,
 430 };
 431
 432 static struct platform_device para_flash_device = {
 433         .name          = "physmap-flash",
 434         .id            = 0,
 435         .dev = {
 436                 .platform_data = &para_flash_data,
 437         },
 438         .num_resources = 1,
 439         .resource      = &para_flash_resource,
 440 };
 441 #endif
 442
 443 static const unsigned int cclk_vlev_datasheet[] =
 444 {
 445         VRPAIR(VLEV_085, 250000000),
 446         VRPAIR(VLEV_090, 300000000),
 447         VRPAIR(VLEV_095, 313000000),
 448         VRPAIR(VLEV_100, 350000000),
 449         VRPAIR(VLEV_105, 400000000),
 450         VRPAIR(VLEV_110, 444000000),
 451         VRPAIR(VLEV_115, 450000000),
 452         VRPAIR(VLEV_120, 475000000),
 453         VRPAIR(VLEV_125, 500000000),
 454         VRPAIR(VLEV_130, 600000000),
 455 };
 456
 457 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 458         .tuple_tab = cclk_vlev_datasheet,
 459         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 460         .vr_settling_time = 25 /* us */,
 461 };
 462
 463 static struct platform_device bfin_dpmc = {
 464         .name = "bfin dpmc",
 465         .dev = {
 466                 .platform_data = &bfin_dmpc_vreg_data,
 467         },
 468 };
 469
 470 static struct platform_device *cm_bf561_devices[] __initdata = {
 471
 472         &bfin_dpmc,
 473
 474 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
 475         &hitachi_fb_device,
 476 #endif
 477
 478 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 479         &bfin_uart_device,
 480 #endif
 481
 482 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 483 #ifdef CONFIG_BFIN_SIR0
 484         &bfin_sir0_device,
 485 #endif
 486 #endif
 487
 488 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 489         &isp1362_hcd_device,
 490 #endif
 491
 492 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 493         &smc91x_device,
 494 #endif
 495
 496 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
 497         &smsc911x_device,
 498 #endif
 499
 500 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 501         &net2272_bfin_device,
 502 #endif
 503
 504 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 505         &bfin_spi0_device,
 506 #endif
 507
 508 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 509         &bfin_pata_device,
 510 #endif
 511
 512 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 513         &para_flash_device,
 514 #endif
 515
 516         &bfin_gpios_device,
 517 };
 518
 519 static int __init cm_bf561_init(void)
 520 {
 521         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 522         platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
 523 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 524         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 525 #endif
 526
 527 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 528         irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
 529 #endif
 530         return 0;
 531 }
 532
 533 arch_initcall(cm_bf561_init);