2 * Copyright 2004-2009 Analog Devices Inc.
5 * Ivan Danov <idanov@gmail.com>
6 * 2005 National ICT Australia (NICTA)
7 * Aidan Williams <aidan@nicta.com.au>
9 * Licensed under the GPL-2 or later.
12 #include <linux/device.h>
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/flash.h>
18 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
19 #include <linux/usb/isp1362.h>
22 #include <asm/bfin5xx_spi.h>
25 * Name the Board for the /proc/cpuinfo
27 const char bfin_board_name[] = "IP04/IP08";
30 * Driver needs to know address, irq and flag pin.
32 #if defined(CONFIG_BFIN532_IP0X)
33 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
35 #include <linux/dm9000.h>
37 static struct resource dm9000_resource1[] = {
40 .end = 0x20100000 + 1,
41 .flags = IORESOURCE_MEM
43 .start = 0x20100000 + 2,
44 .end = 0x20100000 + 3,
45 .flags = IORESOURCE_MEM
49 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
53 static struct resource dm9000_resource2[] = {
56 .end = 0x20200000 + 1,
57 .flags = IORESOURCE_MEM
59 .start = 0x20200000 + 2,
60 .end = 0x20200000 + 3,
61 .flags = IORESOURCE_MEM
65 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
70 * for the moment we limit ourselves to 16bit IO until some
71 * better IO routines can be written and tested
73 static struct dm9000_plat_data dm9000_platdata1 = {
74 .flags = DM9000_PLATF_16BITONLY,
77 static struct platform_device dm9000_device1 = {
80 .num_resources = ARRAY_SIZE(dm9000_resource1),
81 .resource = dm9000_resource1,
83 .platform_data = &dm9000_platdata1,
87 static struct dm9000_plat_data dm9000_platdata2 = {
88 .flags = DM9000_PLATF_16BITONLY,
91 static struct platform_device dm9000_device2 = {
94 .num_resources = ARRAY_SIZE(dm9000_resource2),
95 .resource = dm9000_resource2,
97 .platform_data = &dm9000_platdata2,
105 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
106 /* all SPI peripherals info goes here */
108 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
109 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
111 * CPOL (Clock Polarity)
112 * 0 - Active high SCK
114 * CPHA (Clock Phase) Selects transfer format and operation mode
115 * 0 - SCLK toggles from middle of the first data bit, slave select
116 * pins controlled by hardware.
117 * 1 - SCLK toggles from beginning of first data bit, slave select
118 * pins controller by user software.
119 * .ctl_reg = 0x1c00, * CPOL=1,CPHA=1,Sandisk 1G work
120 * NO NO .ctl_reg = 0x1800, * CPOL=1,CPHA=0
121 * NO NO .ctl_reg = 0x1400, * CPOL=0,CPHA=1
123 .ctl_reg = 0x1000, /* CPOL=0,CPHA=0,Sandisk 1G work */
124 .enable_dma = 0, /* if 1 - block!!! */
126 .cs_change_per_word = 0,
130 /* Notice: for blackfin, the speed_hz is the value of register
131 * SPI_BAUD, not the real baudrate */
132 static struct spi_board_info bfin_spi_board_info[] __initdata = {
133 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
135 .modalias = "mmc_spi",
139 .controller_data = &mmc_spi_chip_info,
144 /* SPI controller data */
145 static struct bfin5xx_spi_master spi_bfin_master_info = {
147 .enable_dma = 1, /* master has the ability to do dma transfer */
150 static struct platform_device spi_bfin_master_device = {
151 .name = "bfin-spi-master",
152 .id = 1, /* Bus number */
154 .platform_data = &spi_bfin_master_info, /* Passed to driver */
157 #endif /* spi master and devices */
159 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
160 static struct resource bfin_uart_resources[] = {
164 .flags = IORESOURCE_MEM,
168 static struct platform_device bfin_uart_device = {
171 .num_resources = ARRAY_SIZE(bfin_uart_resources),
172 .resource = bfin_uart_resources,
176 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
177 #ifdef CONFIG_BFIN_SIR0
178 static struct resource bfin_sir0_resources[] = {
182 .flags = IORESOURCE_MEM,
185 .start = IRQ_UART0_RX,
186 .end = IRQ_UART0_RX+1,
187 .flags = IORESOURCE_IRQ,
190 .start = CH_UART0_RX,
191 .end = CH_UART0_RX+1,
192 .flags = IORESOURCE_DMA,
196 static struct platform_device bfin_sir0_device = {
199 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
200 .resource = bfin_sir0_resources,
205 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
206 static struct resource isp1362_hcd_resources[] = {
209 .end = 0x20300000 + 1,
210 .flags = IORESOURCE_MEM,
212 .start = 0x20300000 + 2,
213 .end = 0x20300000 + 3,
214 .flags = IORESOURCE_MEM,
218 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
222 static struct isp1362_platform_data isp1362_priv = {
225 .oc_enable = 0, /* external OC */
227 .int_edge_triggered = 0,
228 .remote_wakeup_connected = 0,
229 .no_power_switching = 1,
230 .power_switching_mode = 0,
233 static struct platform_device isp1362_hcd_device = {
234 .name = "isp1362-hcd",
237 .platform_data = &isp1362_priv,
239 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
240 .resource = isp1362_hcd_resources,
245 static struct platform_device *ip0x_devices[] __initdata = {
246 #if defined(CONFIG_BFIN532_IP0X)
247 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
253 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
254 &spi_bfin_master_device,
257 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
261 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
262 #ifdef CONFIG_BFIN_SIR0
267 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
272 static int __init ip0x_init(void)
276 printk(KERN_INFO "%s(): registering device resources\n", __func__);
277 platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices));
279 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
280 for (i = 0; i < ARRAY_SIZE(bfin_spi_board_info); ++i) {
281 int j = 1 << bfin_spi_board_info[i].chip_select;
282 /* set spi cs to 1 */
283 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | j);
284 bfin_write_FIO_FLAG_S(j);
286 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
292 arch_initcall(ip0x_init);