SAFE public projects git trees. - safe/jmp/linux-2.6/blob - arch/blackfin/mach-bf527/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/usb/musb.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/reboot.h>
  24 #include <asm/nand.h>
  25 #include <asm/portmux.h>
  26 #include <asm/dpmc.h>
  27 #include <linux/spi/ad7877.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF526-EZBRD";
  33
  34 /*
  35  *  Driver needs to know address, irq and flag pin.
  36  */
  37
  38 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  39 static struct resource musb_resources[] = {
  40         [0] = {
  41                 .start  = 0xffc03800,
  42                 .end    = 0xffc03cff,
  43                 .flags  = IORESOURCE_MEM,
  44         },
  45         [1] = { /* general IRQ */
  46                 .start  = IRQ_USB_INT0,
  47                 .end    = IRQ_USB_INT0,
  48                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  49         },
  50         [2] = { /* DMA IRQ */
  51                 .start  = IRQ_USB_DMA,
  52                 .end    = IRQ_USB_DMA,
  53                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  54         },
  55 };
  56
  57 static struct musb_hdrc_config musb_config = {
  58         .multipoint     = 0,
  59         .dyn_fifo       = 0,
  60         .soft_con       = 1,
  61         .dma            = 1,
  62         .num_eps        = 8,
  63         .dma_channels   = 8,
  64         .gpio_vrsel     = GPIO_PG13,
  65 };
  66
  67 static struct musb_hdrc_platform_data musb_plat = {
  68 #if defined(CONFIG_USB_MUSB_OTG)
  69         .mode           = MUSB_OTG,
  70 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  71         .mode           = MUSB_HOST,
  72 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  73         .mode           = MUSB_PERIPHERAL,
  74 #endif
  75         .config         = &musb_config,
  76 };
  77
  78 static u64 musb_dmamask = ~(u32)0;
  79
  80 static struct platform_device musb_device = {
  81         .name           = "musb_hdrc",
  82         .id             = 0,
  83         .dev = {
  84                 .dma_mask               = &musb_dmamask,
  85                 .coherent_dma_mask      = 0xffffffff,
  86                 .platform_data          = &musb_plat,
  87         },
  88         .num_resources  = ARRAY_SIZE(musb_resources),
  89         .resource       = musb_resources,
  90 };
  91 #endif
  92
  93 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  94 static struct mtd_partition ezbrd_partitions[] = {
  95         {
  96                 .name       = "bootloader(nor)",
  97                 .size       = 0x40000,
  98                 .offset     = 0,
  99         }, {
 100                 .name       = "linux kernel(nor)",
 101                 .size       = 0x1C0000,
 102                 .offset     = MTDPART_OFS_APPEND,
 103         }, {
 104                 .name       = "file system(nor)",
 105                 .size       = MTDPART_SIZ_FULL,
 106                 .offset     = MTDPART_OFS_APPEND,
 107         }
 108 };
 109
 110 static struct physmap_flash_data ezbrd_flash_data = {
 111         .width      = 2,
 112         .parts      = ezbrd_partitions,
 113         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
 114 };
 115
 116 static struct resource ezbrd_flash_resource = {
 117         .start = 0x20000000,
 118         .end   = 0x203fffff,
 119         .flags = IORESOURCE_MEM,
 120 };
 121
 122 static struct platform_device ezbrd_flash_device = {
 123         .name          = "physmap-flash",
 124         .id            = 0,
 125         .dev = {
 126                 .platform_data = &ezbrd_flash_data,
 127         },
 128         .num_resources = 1,
 129         .resource      = &ezbrd_flash_resource,
 130 };
 131 #endif
 132
 133 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 134 static struct mtd_partition partition_info[] = {
 135         {
 136                 .name = "linux kernel(nand)",
 137                 .offset = 0,
 138                 .size = 4 * 1024 * 1024,
 139         },
 140         {
 141                 .name = "file system(nand)",
 142                 .offset = MTDPART_OFS_APPEND,
 143                 .size = MTDPART_SIZ_FULL,
 144         },
 145 };
 146
 147 static struct bf5xx_nand_platform bf5xx_nand_platform = {
 148         .page_size = NFC_PG_SIZE_256,
 149         .data_width = NFC_NWIDTH_8,
 150         .partitions = partition_info,
 151         .nr_partitions = ARRAY_SIZE(partition_info),
 152         .rd_dly = 3,
 153         .wr_dly = 3,
 154 };
 155
 156 static struct resource bf5xx_nand_resources[] = {
 157         {
 158                 .start = NFC_CTL,
 159                 .end = NFC_DATA_RD + 2,
 160                 .flags = IORESOURCE_MEM,
 161         },
 162         {
 163                 .start = CH_NFC,
 164                 .end = CH_NFC,
 165                 .flags = IORESOURCE_IRQ,
 166         },
 167 };
 168
 169 static struct platform_device bf5xx_nand_device = {
 170         .name = "bf5xx-nand",
 171         .id = 0,
 172         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 173         .resource = bf5xx_nand_resources,
 174         .dev = {
 175                 .platform_data = &bf5xx_nand_platform,
 176         },
 177 };
 178 #endif
 179
 180 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 181 static struct platform_device rtc_device = {
 182         .name = "rtc-bfin",
 183         .id   = -1,
 184 };
 185 #endif
 186
 187
 188 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 189 static struct platform_device bfin_mii_bus = {
 190         .name = "bfin_mii_bus",
 191 };
 192
 193 static struct platform_device bfin_mac_device = {
 194         .name = "bfin_mac",
 195         .dev.platform_data = &bfin_mii_bus,
 196 };
 197 #endif
 198
 199 #if defined(CONFIG_MTD_M25P80) \
 200         || defined(CONFIG_MTD_M25P80_MODULE)
 201 static struct mtd_partition bfin_spi_flash_partitions[] = {
 202         {
 203                 .name = "bootloader(spi)",
 204                 .size = 0x00040000,
 205                 .offset = 0,
 206                 .mask_flags = MTD_CAP_ROM
 207         }, {
 208                 .name = "linux kernel(spi)",
 209                 .size = MTDPART_SIZ_FULL,
 210                 .offset = MTDPART_OFS_APPEND,
 211         }
 212 };
 213
 214 static struct flash_platform_data bfin_spi_flash_data = {
 215         .name = "m25p80",
 216         .parts = bfin_spi_flash_partitions,
 217         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 218         .type = "sst25wf040",
 219 };
 220
 221 /* SPI flash chip (sst25wf040) */
 222 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 223         .enable_dma = 0,         /* use dma transfer with this chip*/
 224         .bits_per_word = 8,
 225 };
 226 #endif
 227
 228 #if defined(CONFIG_BFIN_SPI_ADC) \
 229         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 230 /* SPI ADC chip */
 231 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 232         .enable_dma = 1,         /* use dma transfer with this chip*/
 233         .bits_per_word = 16,
 234 };
 235 #endif
 236
 237 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 238 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 239         .enable_dma = 0,
 240         .bits_per_word = 8,
 241 };
 242 #endif
 243
 244 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 245 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 246         .enable_dma = 0,
 247         .bits_per_word = 16,
 248 };
 249
 250 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 251         .model                  = 7877,
 252         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 253         .x_plate_ohms           = 419,
 254         .y_plate_ohms           = 486,
 255         .pressure_max           = 1000,
 256         .pressure_min           = 0,
 257         .stopacq_polarity       = 1,
 258         .first_conversion_delay = 3,
 259         .acquisition_time       = 1,
 260         .averaging              = 1,
 261         .pen_down_acc_interval  = 1,
 262 };
 263 #endif
 264
 265 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 266 #include <linux/spi/ad7879.h>
 267 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 268         .model                  = 7879, /* Model = AD7879 */
 269         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 270         .pressure_max           = 10000,
 271         .pressure_min           = 0,
 272         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
 273         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 274         .median                 = 2,    /* do 8 measurements */
 275         .averaging              = 1,    /* take the average of 4 middle samples */
 276         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 277         .gpio_output            = 1,    /* configure AUX/VBAT/GPIO as GPIO output */
 278         .gpio_default           = 1,    /* During initialization set GPIO = HIGH */
 279 };
 280 #endif
 281
 282 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 283 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 284         .enable_dma = 0,
 285         .bits_per_word = 16,
 286 };
 287 #endif
 288
 289 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 290          && defined(CONFIG_SND_SOC_WM8731_SPI)
 291 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 292         .enable_dma = 0,
 293         .bits_per_word = 16,
 294 };
 295 #endif
 296
 297 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 298 static struct bfin5xx_spi_chip spidev_chip_info = {
 299         .enable_dma = 0,
 300         .bits_per_word = 8,
 301 };
 302 #endif
 303
 304 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 305 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
 306         .enable_dma = 0,
 307         .bits_per_word = 8,
 308 };
 309 #endif
 310
 311 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 312 #if defined(CONFIG_MTD_M25P80) \
 313         || defined(CONFIG_MTD_M25P80_MODULE)
 314         {
 315                 /* the modalias must be the same as spi device driver name */
 316                 .modalias = "m25p80", /* Name of spi_driver for this device */
 317                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 318                 .bus_num = 0, /* Framework bus number */
 319                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 320                 .platform_data = &bfin_spi_flash_data,
 321                 .controller_data = &spi_flash_chip_info,
 322                 .mode = SPI_MODE_3,
 323         },
 324 #endif
 325
 326 #if defined(CONFIG_BFIN_SPI_ADC) \
 327         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 328         {
 329                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 330                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 331                 .bus_num = 0, /* Framework bus number */
 332                 .chip_select = 1, /* Framework chip select. */
 333                 .platform_data = NULL, /* No spi_driver specific config */
 334                 .controller_data = &spi_adc_chip_info,
 335         },
 336 #endif
 337
 338 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 339         {
 340                 .modalias = "mmc_spi",
 341                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 342                 .bus_num = 0,
 343                 .chip_select = 5,
 344                 .controller_data = &mmc_spi_chip_info,
 345                 .mode = SPI_MODE_3,
 346         },
 347 #endif
 348 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 349         {
 350                 .modalias               = "ad7877",
 351                 .platform_data          = &bfin_ad7877_ts_info,
 352                 .irq                    = IRQ_PF8,
 353                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 354                 .bus_num        = 0,
 355                 .chip_select  = 2,
 356                 .controller_data = &spi_ad7877_chip_info,
 357         },
 358 #endif
 359 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 360         {
 361                 .modalias = "ad7879",
 362                 .platform_data = &bfin_ad7879_ts_info,
 363                 .irq = IRQ_PG0,
 364                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 365                 .bus_num = 0,
 366                 .chip_select = 5,
 367                 .controller_data = &spi_ad7879_chip_info,
 368                 .mode = SPI_CPHA | SPI_CPOL,
 369         },
 370 #endif
 371 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 372          && defined(CONFIG_SND_SOC_WM8731_SPI)
 373         {
 374                 .modalias       = "wm8731",
 375                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 376                 .bus_num        = 0,
 377                 .chip_select    = 5,
 378                 .controller_data = &spi_wm8731_chip_info,
 379                 .mode = SPI_MODE_0,
 380         },
 381 #endif
 382 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 383         {
 384                 .modalias = "spidev",
 385                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 386                 .bus_num = 0,
 387                 .chip_select = 1,
 388                 .controller_data = &spidev_chip_info,
 389         },
 390 #endif
 391 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 392         {
 393                 .modalias = "bfin-lq035q1-spi",
 394                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 395                 .bus_num = 0,
 396                 .chip_select = 1,
 397                 .controller_data = &lq035q1_spi_chip_info,
 398                 .mode = SPI_CPHA | SPI_CPOL,
 399         },
 400 #endif
 401 };
 402
 403 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 404 /* SPI controller data */
 405 static struct bfin5xx_spi_master bfin_spi0_info = {
 406         .num_chipselect = 8,
 407         .enable_dma = 1,  /* master has the ability to do dma transfer */
 408         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 409 };
 410
 411 /* SPI (0) */
 412 static struct resource bfin_spi0_resource[] = {
 413         [0] = {
 414                 .start = SPI0_REGBASE,
 415                 .end   = SPI0_REGBASE + 0xFF,
 416                 .flags = IORESOURCE_MEM,
 417                 },
 418         [1] = {
 419                 .start = CH_SPI,
 420                 .end   = CH_SPI,
 421                 .flags = IORESOURCE_DMA,
 422         },
 423         [2] = {
 424                 .start = IRQ_SPI,
 425                 .end   = IRQ_SPI,
 426                 .flags = IORESOURCE_IRQ,
 427         },
 428 };
 429
 430 static struct platform_device bfin_spi0_device = {
 431         .name = "bfin-spi",
 432         .id = 0, /* Bus number */
 433         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 434         .resource = bfin_spi0_resource,
 435         .dev = {
 436                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 437         },
 438 };
 439 #endif  /* spi master and devices */
 440
 441 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 442 static struct resource bfin_uart_resources[] = {
 443 #ifdef CONFIG_SERIAL_BFIN_UART0
 444         {
 445                 .start = 0xFFC00400,
 446                 .end = 0xFFC004FF,
 447                 .flags = IORESOURCE_MEM,
 448         },
 449 #endif
 450 #ifdef CONFIG_SERIAL_BFIN_UART1
 451         {
 452                 .start = 0xFFC02000,
 453                 .end = 0xFFC020FF,
 454                 .flags = IORESOURCE_MEM,
 455         },
 456 #endif
 457 };
 458
 459 static struct platform_device bfin_uart_device = {
 460         .name = "bfin-uart",
 461         .id = 1,
 462         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 463         .resource = bfin_uart_resources,
 464 };
 465 #endif
 466
 467 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 468 #ifdef CONFIG_BFIN_SIR0
 469 static struct resource bfin_sir0_resources[] = {
 470         {
 471                 .start = 0xFFC00400,
 472                 .end = 0xFFC004FF,
 473                 .flags = IORESOURCE_MEM,
 474         },
 475         {
 476                 .start = IRQ_UART0_RX,
 477                 .end = IRQ_UART0_RX+1,
 478                 .flags = IORESOURCE_IRQ,
 479         },
 480         {
 481                 .start = CH_UART0_RX,
 482                 .end = CH_UART0_RX+1,
 483                 .flags = IORESOURCE_DMA,
 484         },
 485 };
 486
 487 static struct platform_device bfin_sir0_device = {
 488         .name = "bfin_sir",
 489         .id = 0,
 490         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 491         .resource = bfin_sir0_resources,
 492 };
 493 #endif
 494 #ifdef CONFIG_BFIN_SIR1
 495 static struct resource bfin_sir1_resources[] = {
 496         {
 497                 .start = 0xFFC02000,
 498                 .end = 0xFFC020FF,
 499                 .flags = IORESOURCE_MEM,
 500         },
 501         {
 502                 .start = IRQ_UART1_RX,
 503                 .end = IRQ_UART1_RX+1,
 504                 .flags = IORESOURCE_IRQ,
 505         },
 506         {
 507                 .start = CH_UART1_RX,
 508                 .end = CH_UART1_RX+1,
 509                 .flags = IORESOURCE_DMA,
 510         },
 511 };
 512
 513 static struct platform_device bfin_sir1_device = {
 514         .name = "bfin_sir",
 515         .id = 1,
 516         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 517         .resource = bfin_sir1_resources,
 518 };
 519 #endif
 520 #endif
 521
 522 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 523 static struct resource bfin_twi0_resource[] = {
 524         [0] = {
 525                 .start = TWI0_REGBASE,
 526                 .end   = TWI0_REGBASE,
 527                 .flags = IORESOURCE_MEM,
 528         },
 529         [1] = {
 530                 .start = IRQ_TWI,
 531                 .end   = IRQ_TWI,
 532                 .flags = IORESOURCE_IRQ,
 533         },
 534 };
 535
 536 static struct platform_device i2c_bfin_twi_device = {
 537         .name = "i2c-bfin-twi",
 538         .id = 0,
 539         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 540         .resource = bfin_twi0_resource,
 541 };
 542 #endif
 543
 544 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 545 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 546         {
 547                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 548         },
 549 #endif
 550 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 551         {
 552                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 553                 .irq = IRQ_PF8,
 554         },
 555 #endif
 556 };
 557
 558 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 559 static struct platform_device bfin_sport0_uart_device = {
 560         .name = "bfin-sport-uart",
 561         .id = 0,
 562 };
 563
 564 static struct platform_device bfin_sport1_uart_device = {
 565         .name = "bfin-sport-uart",
 566         .id = 1,
 567 };
 568 #endif
 569
 570 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 571 #include <linux/input.h>
 572 #include <linux/gpio_keys.h>
 573
 574 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 575         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 576         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 577 };
 578
 579 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 580         .buttons        = bfin_gpio_keys_table,
 581         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 582 };
 583
 584 static struct platform_device bfin_device_gpiokeys = {
 585         .name      = "gpio-keys",
 586         .dev = {
 587                 .platform_data = &bfin_gpio_keys_data,
 588         },
 589 };
 590 #endif
 591
 592 static const unsigned int cclk_vlev_datasheet[] =
 593 {
 594         VRPAIR(VLEV_100, 400000000),
 595         VRPAIR(VLEV_105, 426000000),
 596         VRPAIR(VLEV_110, 500000000),
 597         VRPAIR(VLEV_115, 533000000),
 598         VRPAIR(VLEV_120, 600000000),
 599 };
 600
 601 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 602         .tuple_tab = cclk_vlev_datasheet,
 603         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 604         .vr_settling_time = 25 /* us */,
 605 };
 606
 607 static struct platform_device bfin_dpmc = {
 608         .name = "bfin dpmc",
 609         .dev = {
 610                 .platform_data = &bfin_dmpc_vreg_data,
 611         },
 612 };
 613
 614 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 615 #include <asm/bfin-lq035q1.h>
 616
 617 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 618         .mode =         LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 619         .use_bl =       1,
 620         .gpio_bl =      GPIO_PG12,
 621 };
 622
 623 static struct resource bfin_lq035q1_resources[] = {
 624         {
 625                 .start = IRQ_PPI_ERROR,
 626                 .end = IRQ_PPI_ERROR,
 627                 .flags = IORESOURCE_IRQ,
 628         },
 629 };
 630
 631 static struct platform_device bfin_lq035q1_device = {
 632         .name           = "bfin-lq035q1",
 633         .id             = -1,
 634         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 635         .resource       = bfin_lq035q1_resources,
 636         .dev            = {
 637                 .platform_data = &bfin_lq035q1_data,
 638         },
 639 };
 640 #endif
 641
 642 static struct platform_device *stamp_devices[] __initdata = {
 643
 644         &bfin_dpmc,
 645
 646 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 647         &bf5xx_nand_device,
 648 #endif
 649
 650 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 651         &rtc_device,
 652 #endif
 653
 654 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 655         &musb_device,
 656 #endif
 657
 658 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 659         &bfin_mii_bus,
 660         &bfin_mac_device,
 661 #endif
 662
 663 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 664         &bfin_spi0_device,
 665 #endif
 666
 667 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 668         &bfin_uart_device,
 669 #endif
 670
 671 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 672         &bfin_lq035q1_device,
 673 #endif
 674
 675 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 676 #ifdef CONFIG_BFIN_SIR0
 677         &bfin_sir0_device,
 678 #endif
 679 #ifdef CONFIG_BFIN_SIR1
 680         &bfin_sir1_device,
 681 #endif
 682 #endif
 683
 684 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 685         &i2c_bfin_twi_device,
 686 #endif
 687
 688 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 689         &bfin_sport0_uart_device,
 690         &bfin_sport1_uart_device,
 691 #endif
 692
 693 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 694         &bfin_device_gpiokeys,
 695 #endif
 696
 697 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 698         &ezbrd_flash_device,
 699 #endif
 700 };
 701
 702 static int __init ezbrd_init(void)
 703 {
 704         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 705         i2c_register_board_info(0, bfin_i2c_board_info,
 706                                 ARRAY_SIZE(bfin_i2c_board_info));
 707         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 708         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 709         return 0;
 710 }
 711
 712 arch_initcall(ezbrd_init);
 713
 714 void native_machine_restart(char *cmd)
 715 {
 716         /* workaround reboot hang when booting from SPI */
 717         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 718                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 719 }
 720
 721 void bfin_get_ether_addr(char *addr)
 722 {
 723         /* the MAC is stored in OTP memory page 0xDF */
 724         u32 ret;
 725         u64 otp_mac;
 726         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 727
 728         ret = otp_read(0xDF, 0x00, &otp_mac);
 729         if (!(ret & 0x1)) {
 730                 char *otp_mac_p = (char *)&otp_mac;
 731                 for (ret = 0; ret < 6; ++ret)
 732                         addr[ret] = otp_mac_p[5 - ret];
 733         }
 734 }
 735 EXPORT_SYMBOL(bfin_get_ether_addr);