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   1 /*
   2  * File:         arch/blackfin/mach-bf518/boards/ezbrd.c
   3  * Based on:     arch/blackfin/mach-bf527/boards/ezbrd.c
   4  * Author:       Bryan Wu <cooloney@kernel.org>
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Modified:
  10  *               Copyright 2005 National ICT Australia (NICTA)
  11  *               Copyright 2004-2008 Analog Devices Inc.
  12  *
  13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2 of the License, or
  18  * (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, see the file COPYING, or write
  27  * to the Free Software Foundation, Inc.,
  28  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  29  */
  30
  31 #include <linux/device.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/mtd/mtd.h>
  34 #include <linux/mtd/partitions.h>
  35 #include <linux/mtd/physmap.h>
  36 #include <linux/spi/spi.h>
  37 #include <linux/spi/flash.h>
  38
  39 #include <linux/i2c.h>
  40 #include <linux/irq.h>
  41 #include <linux/interrupt.h>
  42 #include <asm/dma.h>
  43 #include <asm/bfin5xx_spi.h>
  44 #include <asm/reboot.h>
  45 #include <asm/portmux.h>
  46 #include <asm/dpmc.h>
  47 #include <asm/bfin_sdh.h>
  48 #include <linux/spi/ad7877.h>
  49 #include <net/dsa.h>
  50
  51 /*
  52  * Name the Board for the /proc/cpuinfo
  53  */
  54 const char bfin_board_name[] = "ADI BF518F-EZBRD";
  55
  56 /*
  57  *  Driver needs to know address, irq and flag pin.
  58  */
  59
  60 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  61 static struct mtd_partition ezbrd_partitions[] = {
  62         {
  63                 .name       = "bootloader(nor)",
  64                 .size       = 0x40000,
  65                 .offset     = 0,
  66         }, {
  67                 .name       = "linux kernel(nor)",
  68                 .size       = 0x1C0000,
  69                 .offset     = MTDPART_OFS_APPEND,
  70         }, {
  71                 .name       = "file system(nor)",
  72                 .size       = MTDPART_SIZ_FULL,
  73                 .offset     = MTDPART_OFS_APPEND,
  74         }
  75 };
  76
  77 static struct physmap_flash_data ezbrd_flash_data = {
  78         .width      = 2,
  79         .parts      = ezbrd_partitions,
  80         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
  81 };
  82
  83 static struct resource ezbrd_flash_resource = {
  84         .start = 0x20000000,
  85         .end   = 0x203fffff,
  86         .flags = IORESOURCE_MEM,
  87 };
  88
  89 static struct platform_device ezbrd_flash_device = {
  90         .name          = "physmap-flash",
  91         .id            = 0,
  92         .dev = {
  93                 .platform_data = &ezbrd_flash_data,
  94         },
  95         .num_resources = 1,
  96         .resource      = &ezbrd_flash_resource,
  97 };
  98 #endif
  99
 100 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 101 static struct platform_device rtc_device = {
 102         .name = "rtc-bfin",
 103         .id   = -1,
 104 };
 105 #endif
 106
 107 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 108 static struct platform_device bfin_mii_bus = {
 109         .name = "bfin_mii_bus",
 110 };
 111
 112 static struct platform_device bfin_mac_device = {
 113         .name = "bfin_mac",
 114         .dev.platform_data = &bfin_mii_bus,
 115 };
 116
 117 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 118 static struct dsa_platform_data ksz8893m_switch_data = {
 119         .mii_bus = &bfin_mii_bus.dev,
 120         .netdev = &bfin_mac_device.dev,
 121         .port_names[0]  = NULL,
 122         .port_names[1]  = "eth%d",
 123         .port_names[2]  = "eth%d",
 124         .port_names[3]  = "cpu",
 125 };
 126
 127 static struct platform_device ksz8893m_switch_device = {
 128         .name           = "dsa",
 129         .id             = 0,
 130         .num_resources  = 0,
 131         .dev.platform_data = &ksz8893m_switch_data,
 132 };
 133 #endif
 134 #endif
 135
 136 #if defined(CONFIG_MTD_M25P80) \
 137         || defined(CONFIG_MTD_M25P80_MODULE)
 138 static struct mtd_partition bfin_spi_flash_partitions[] = {
 139         {
 140                 .name = "bootloader(spi)",
 141                 .size = 0x00040000,
 142                 .offset = 0,
 143                 .mask_flags = MTD_CAP_ROM
 144         }, {
 145                 .name = "linux kernel(spi)",
 146                 .size = MTDPART_SIZ_FULL,
 147                 .offset = MTDPART_OFS_APPEND,
 148         }
 149 };
 150
 151 static struct flash_platform_data bfin_spi_flash_data = {
 152         .name = "m25p80",
 153         .parts = bfin_spi_flash_partitions,
 154         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 155         .type = "m25p16",
 156 };
 157
 158 /* SPI flash chip (m25p64) */
 159 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 160         .enable_dma = 0,         /* use dma transfer with this chip*/
 161         .bits_per_word = 8,
 162 };
 163 #endif
 164
 165 #if defined(CONFIG_SPI_ADC_BF533) \
 166         || defined(CONFIG_SPI_ADC_BF533_MODULE)
 167 /* SPI ADC chip */
 168 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 169         .enable_dma = 1,         /* use dma transfer with this chip*/
 170         .bits_per_word = 16,
 171 };
 172 #endif
 173
 174 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 175 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 176         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 177 /* SPI SWITCH CHIP */
 178 static struct bfin5xx_spi_chip spi_switch_info = {
 179         .enable_dma = 0,
 180         .bits_per_word = 8,
 181 };
 182 #endif
 183 #endif
 184
 185 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 186 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
 187         .enable_dma = 1,
 188         .bits_per_word = 8,
 189 };
 190 #endif
 191
 192 #if defined(CONFIG_PBX)
 193 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
 194         .ctl_reg        = 0x4, /* send zero */
 195         .enable_dma     = 0,
 196         .bits_per_word  = 8,
 197         .cs_change_per_word = 1,
 198 };
 199 #endif
 200
 201 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 202 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 203         .enable_dma = 0,
 204         .bits_per_word = 16,
 205 };
 206
 207 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 208         .model                  = 7877,
 209         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 210         .x_plate_ohms           = 419,
 211         .y_plate_ohms           = 486,
 212         .pressure_max           = 1000,
 213         .pressure_min           = 0,
 214         .stopacq_polarity       = 1,
 215         .first_conversion_delay = 3,
 216         .acquisition_time       = 1,
 217         .averaging              = 1,
 218         .pen_down_acc_interval  = 1,
 219 };
 220 #endif
 221
 222 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 223          && defined(CONFIG_SND_SOC_WM8731_SPI)
 224 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 225         .enable_dma = 0,
 226         .bits_per_word = 16,
 227 };
 228 #endif
 229
 230 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 231 static struct bfin5xx_spi_chip spidev_chip_info = {
 232         .enable_dma = 0,
 233         .bits_per_word = 8,
 234 };
 235 #endif
 236
 237 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 238 #if defined(CONFIG_MTD_M25P80) \
 239         || defined(CONFIG_MTD_M25P80_MODULE)
 240         {
 241                 /* the modalias must be the same as spi device driver name */
 242                 .modalias = "m25p80", /* Name of spi_driver for this device */
 243                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 244                 .bus_num = 0, /* Framework bus number */
 245                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 246                 .platform_data = &bfin_spi_flash_data,
 247                 .controller_data = &spi_flash_chip_info,
 248                 .mode = SPI_MODE_3,
 249         },
 250 #endif
 251
 252 #if defined(CONFIG_SPI_ADC_BF533) \
 253         || defined(CONFIG_SPI_ADC_BF533_MODULE)
 254         {
 255                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 256                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 257                 .bus_num = 0, /* Framework bus number */
 258                 .chip_select = 1, /* Framework chip select. */
 259                 .platform_data = NULL, /* No spi_driver specific config */
 260                 .controller_data = &spi_adc_chip_info,
 261         },
 262 #endif
 263
 264 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 265 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 266         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 267         {
 268                 .modalias = "ksz8893m",
 269                 .max_speed_hz = 5000000,
 270                 .bus_num = 0,
 271                 .chip_select = 1,
 272                 .platform_data = NULL,
 273                 .controller_data = &spi_switch_info,
 274                 .mode = SPI_MODE_3,
 275         },
 276 #endif
 277 #endif
 278
 279 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 280         {
 281                 .modalias = "spi_mmc_dummy",
 282                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 283                 .bus_num = 0,
 284                 .chip_select = 0,
 285                 .platform_data = NULL,
 286                 .controller_data = &spi_mmc_chip_info,
 287                 .mode = SPI_MODE_3,
 288         },
 289         {
 290                 .modalias = "spi_mmc",
 291                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 292                 .bus_num = 0,
 293                 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
 294                 .platform_data = NULL,
 295                 .controller_data = &spi_mmc_chip_info,
 296                 .mode = SPI_MODE_3,
 297         },
 298 #endif
 299 #if defined(CONFIG_PBX)
 300         {
 301                 .modalias = "fxs-spi",
 302                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 303                 .bus_num = 0,
 304                 .chip_select = 8 - CONFIG_J11_JUMPER,
 305                 .controller_data = &spi_si3xxx_chip_info,
 306                 .mode = SPI_MODE_3,
 307         },
 308         {
 309                 .modalias = "fxo-spi",
 310                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 311                 .bus_num = 0,
 312                 .chip_select = 8 - CONFIG_J19_JUMPER,
 313                 .controller_data = &spi_si3xxx_chip_info,
 314                 .mode = SPI_MODE_3,
 315         },
 316 #endif
 317 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 318         {
 319                 .modalias               = "ad7877",
 320                 .platform_data          = &bfin_ad7877_ts_info,
 321                 .irq                    = IRQ_PF8,
 322                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 323                 .bus_num        = 0,
 324                 .chip_select  = 2,
 325                 .controller_data = &spi_ad7877_chip_info,
 326         },
 327 #endif
 328 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 329          && defined(CONFIG_SND_SOC_WM8731_SPI)
 330         {
 331                 .modalias       = "wm8731",
 332                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 333                 .bus_num        = 0,
 334                 .chip_select    = 5,
 335                 .controller_data = &spi_wm8731_chip_info,
 336                 .mode = SPI_MODE_0,
 337         },
 338 #endif
 339 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 340         {
 341                 .modalias = "spidev",
 342                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 343                 .bus_num = 0,
 344                 .chip_select = 1,
 345                 .controller_data = &spidev_chip_info,
 346         },
 347 #endif
 348 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 349         {
 350                 .modalias = "bfin-lq035q1-spi",
 351                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 352                 .bus_num = 0,
 353                 .chip_select = 1,
 354                 .controller_data = &lq035q1_spi_chip_info,
 355                 .mode = SPI_CPHA | SPI_CPOL,
 356         },
 357 #endif
 358 };
 359
 360 /* SPI controller data */
 361 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 362 /* SPI (0) */
 363 static struct bfin5xx_spi_master bfin_spi0_info = {
 364         .num_chipselect = 5,
 365         .enable_dma = 1,  /* master has the ability to do dma transfer */
 366         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 367 };
 368
 369 static struct resource bfin_spi0_resource[] = {
 370         [0] = {
 371                 .start = SPI0_REGBASE,
 372                 .end   = SPI0_REGBASE + 0xFF,
 373                 .flags = IORESOURCE_MEM,
 374                 },
 375         [1] = {
 376                 .start = CH_SPI0,
 377                 .end   = CH_SPI0,
 378                 .flags = IORESOURCE_IRQ,
 379         },
 380 };
 381
 382 static struct platform_device bfin_spi0_device = {
 383         .name = "bfin-spi",
 384         .id = 0, /* Bus number */
 385         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 386         .resource = bfin_spi0_resource,
 387         .dev = {
 388                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 389         },
 390 };
 391
 392 /* SPI (1) */
 393 static struct bfin5xx_spi_master bfin_spi1_info = {
 394         .num_chipselect = 5,
 395         .enable_dma = 1,  /* master has the ability to do dma transfer */
 396         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 397 };
 398
 399 static struct resource bfin_spi1_resource[] = {
 400         [0] = {
 401                 .start = SPI1_REGBASE,
 402                 .end   = SPI1_REGBASE + 0xFF,
 403                 .flags = IORESOURCE_MEM,
 404                 },
 405         [1] = {
 406                 .start = CH_SPI1,
 407                 .end   = CH_SPI1,
 408                 .flags = IORESOURCE_IRQ,
 409         },
 410 };
 411
 412 static struct platform_device bfin_spi1_device = {
 413         .name = "bfin-spi",
 414         .id = 1, /* Bus number */
 415         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 416         .resource = bfin_spi1_resource,
 417         .dev = {
 418                 .platform_data = &bfin_spi1_info, /* Passed to driver */
 419         },
 420 };
 421 #endif  /* spi master and devices */
 422
 423 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 424 static struct resource bfin_uart_resources[] = {
 425 #ifdef CONFIG_SERIAL_BFIN_UART0
 426         {
 427                 .start = 0xFFC00400,
 428                 .end = 0xFFC004FF,
 429                 .flags = IORESOURCE_MEM,
 430         },
 431 #endif
 432 #ifdef CONFIG_SERIAL_BFIN_UART1
 433         {
 434                 .start = 0xFFC02000,
 435                 .end = 0xFFC020FF,
 436                 .flags = IORESOURCE_MEM,
 437         },
 438 #endif
 439 };
 440
 441 static struct platform_device bfin_uart_device = {
 442         .name = "bfin-uart",
 443         .id = 1,
 444         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 445         .resource = bfin_uart_resources,
 446 };
 447 #endif
 448
 449 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 450 #ifdef CONFIG_BFIN_SIR0
 451 static struct resource bfin_sir0_resources[] = {
 452         {
 453                 .start = 0xFFC00400,
 454                 .end = 0xFFC004FF,
 455                 .flags = IORESOURCE_MEM,
 456         },
 457         {
 458                 .start = IRQ_UART0_RX,
 459                 .end = IRQ_UART0_RX+1,
 460                 .flags = IORESOURCE_IRQ,
 461         },
 462         {
 463                 .start = CH_UART0_RX,
 464                 .end = CH_UART0_RX+1,
 465                 .flags = IORESOURCE_DMA,
 466         },
 467 };
 468
 469 static struct platform_device bfin_sir0_device = {
 470         .name = "bfin_sir",
 471         .id = 0,
 472         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 473         .resource = bfin_sir0_resources,
 474 };
 475 #endif
 476 #ifdef CONFIG_BFIN_SIR1
 477 static struct resource bfin_sir1_resources[] = {
 478         {
 479                 .start = 0xFFC02000,
 480                 .end = 0xFFC020FF,
 481                 .flags = IORESOURCE_MEM,
 482         },
 483         {
 484                 .start = IRQ_UART1_RX,
 485                 .end = IRQ_UART1_RX+1,
 486                 .flags = IORESOURCE_IRQ,
 487         },
 488         {
 489                 .start = CH_UART1_RX,
 490                 .end = CH_UART1_RX+1,
 491                 .flags = IORESOURCE_DMA,
 492         },
 493 };
 494
 495 static struct platform_device bfin_sir1_device = {
 496         .name = "bfin_sir",
 497         .id = 1,
 498         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 499         .resource = bfin_sir1_resources,
 500 };
 501 #endif
 502 #endif
 503
 504 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 505 static struct resource bfin_twi0_resource[] = {
 506         [0] = {
 507                 .start = TWI0_REGBASE,
 508                 .end   = TWI0_REGBASE,
 509                 .flags = IORESOURCE_MEM,
 510         },
 511         [1] = {
 512                 .start = IRQ_TWI,
 513                 .end   = IRQ_TWI,
 514                 .flags = IORESOURCE_IRQ,
 515         },
 516 };
 517
 518 static struct platform_device i2c_bfin_twi_device = {
 519         .name = "i2c-bfin-twi",
 520         .id = 0,
 521         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 522         .resource = bfin_twi0_resource,
 523 };
 524 #endif
 525
 526 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 527 #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
 528         {
 529                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 530         },
 531 #endif
 532 #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
 533         {
 534                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 535                 .irq = IRQ_PF8,
 536         },
 537 #endif
 538 };
 539
 540 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 541 static struct platform_device bfin_sport0_uart_device = {
 542         .name = "bfin-sport-uart",
 543         .id = 0,
 544 };
 545
 546 static struct platform_device bfin_sport1_uart_device = {
 547         .name = "bfin-sport-uart",
 548         .id = 1,
 549 };
 550 #endif
 551
 552 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 553 #include <linux/input.h>
 554 #include <linux/gpio_keys.h>
 555
 556 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 557         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 558         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 559 };
 560
 561 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 562         .buttons        = bfin_gpio_keys_table,
 563         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 564 };
 565
 566 static struct platform_device bfin_device_gpiokeys = {
 567         .name      = "gpio-keys",
 568         .dev = {
 569                 .platform_data = &bfin_gpio_keys_data,
 570         },
 571 };
 572 #endif
 573
 574 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 575
 576 static struct bfin_sd_host bfin_sdh_data = {
 577         .dma_chan = CH_RSI,
 578         .irq_int0 = IRQ_RSI_INT0,
 579         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 580 };
 581
 582 static struct platform_device bf51x_sdh_device = {
 583         .name = "bfin-sdh",
 584         .id = 0,
 585         .dev = {
 586                 .platform_data = &bfin_sdh_data,
 587         },
 588 };
 589 #endif
 590
 591 static struct resource bfin_gpios_resources = {
 592         .start = 0,
 593         .end   = MAX_BLACKFIN_GPIOS - 1,
 594         .flags = IORESOURCE_IRQ,
 595 };
 596
 597 static struct platform_device bfin_gpios_device = {
 598         .name = "simple-gpio",
 599         .id = -1,
 600         .num_resources = 1,
 601         .resource = &bfin_gpios_resources,
 602 };
 603
 604 static const unsigned int cclk_vlev_datasheet[] =
 605 {
 606         VRPAIR(VLEV_100, 400000000),
 607         VRPAIR(VLEV_105, 426000000),
 608         VRPAIR(VLEV_110, 500000000),
 609         VRPAIR(VLEV_115, 533000000),
 610         VRPAIR(VLEV_120, 600000000),
 611 };
 612
 613 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 614         .tuple_tab = cclk_vlev_datasheet,
 615         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 616         .vr_settling_time = 25 /* us */,
 617 };
 618
 619 static struct platform_device bfin_dpmc = {
 620         .name = "bfin dpmc",
 621         .dev = {
 622                 .platform_data = &bfin_dmpc_vreg_data,
 623         },
 624 };
 625
 626 static struct platform_device *stamp_devices[] __initdata = {
 627
 628         &bfin_dpmc,
 629
 630 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 631         &rtc_device,
 632 #endif
 633
 634 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 635         &bfin_mii_bus,
 636         &bfin_mac_device,
 637 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 638         &ksz8893m_switch_device,
 639 #endif
 640 #endif
 641
 642 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 643         &bfin_spi0_device,
 644         &bfin_spi1_device,
 645 #endif
 646
 647 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 648         &bfin_uart_device,
 649 #endif
 650
 651 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 652 #ifdef CONFIG_BFIN_SIR0
 653         &bfin_sir0_device,
 654 #endif
 655 #ifdef CONFIG_BFIN_SIR1
 656         &bfin_sir1_device,
 657 #endif
 658 #endif
 659
 660 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 661         &i2c_bfin_twi_device,
 662 #endif
 663
 664 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 665         &bfin_sport0_uart_device,
 666         &bfin_sport1_uart_device,
 667 #endif
 668
 669 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 670         &bfin_device_gpiokeys,
 671 #endif
 672
 673 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 674         &bf51x_sdh_device,
 675 #endif
 676
 677 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 678         &ezbrd_flash_device,
 679 #endif
 680
 681         &bfin_gpios_device,
 682 };
 683
 684 static int __init ezbrd_init(void)
 685 {
 686         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 687         i2c_register_board_info(0, bfin_i2c_board_info,
 688                                 ARRAY_SIZE(bfin_i2c_board_info));
 689         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 690         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 691         return 0;
 692 }
 693
 694 arch_initcall(ezbrd_init);
 695
 696 void native_machine_restart(char *cmd)
 697 {
 698         /* workaround reboot hang when booting from SPI */
 699         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 700                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 701 }
 702
 703 void bfin_get_ether_addr(char *addr)
 704 {
 705         /* the MAC is stored in OTP memory page 0xDF */
 706         u32 ret;
 707         u64 otp_mac;
 708         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 709
 710         ret = otp_read(0xDF, 0x00, &otp_mac);
 711         if (!(ret & 0x1)) {
 712                 char *otp_mac_p = (char *)&otp_mac;
 713                 for (ret = 0; ret < 6; ++ret)
 714                         addr[ret] = otp_mac_p[5 - ret];
 715         }
 716 }
 717 EXPORT_SYMBOL(bfin_get_ether_addr);