2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
21 #include <asm/memory.h>
22 #include <asm/highmem.h>
23 #include <asm/cacheflush.h>
24 #include <asm/tlbflush.h>
25 #include <asm/sizes.h>
27 /* Sanity check size */
28 #if (CONSISTENT_DMA_SIZE % SZ_2M)
29 #error "CONSISTENT_DMA_SIZE must be multiple of 2MiB"
32 #define CONSISTENT_END (0xffe00000)
33 #define CONSISTENT_BASE (CONSISTENT_END - CONSISTENT_DMA_SIZE)
35 #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
36 #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
37 #define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
39 static u64 get_coherent_dma_mask(struct device *dev)
41 u64 mask = ISA_DMA_THRESHOLD;
44 mask = dev->coherent_dma_mask;
47 * Sanity check the DMA mask - it must be non-zero, and
48 * must be able to be satisfied by a DMA allocation.
51 dev_warn(dev, "coherent DMA mask is unset\n");
55 if ((~mask) & ISA_DMA_THRESHOLD) {
56 dev_warn(dev, "coherent DMA mask %#llx is smaller "
57 "than system GFP_DMA mask %#llx\n",
58 mask, (unsigned long long)ISA_DMA_THRESHOLD);
67 * Allocate a DMA buffer for 'dev' of size 'size' using the
68 * specified gfp mask. Note that 'size' must be page aligned.
70 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
72 unsigned long order = get_order(size);
73 struct page *page, *p, *e;
75 u64 mask = get_coherent_dma_mask(dev);
77 #ifdef CONFIG_DMA_API_DEBUG
78 u64 limit = (mask + 1) & ~mask;
79 if (limit && size >= limit) {
80 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
89 if (mask < 0xffffffffULL)
92 page = alloc_pages(gfp, order);
97 * Now split the huge page and free the excess pages
99 split_page(page, order);
100 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
104 * Ensure that the allocated pages are zeroed, and that any data
105 * lurking in the kernel direct-mapped region is invalidated.
107 ptr = page_address(page);
108 memset(ptr, 0, size);
109 dmac_flush_range(ptr, ptr + size);
110 outer_flush_range(__pa(ptr), __pa(ptr) + size);
116 * Free a DMA buffer. 'size' must be page aligned.
118 static void __dma_free_buffer(struct page *page, size_t size)
120 struct page *e = page + (size >> PAGE_SHIFT);
130 * These are the page tables (2MB each) covering uncached, DMA consistent allocations
132 static pte_t *consistent_pte[NUM_CONSISTENT_PTES];
134 #include "vmregion.h"
136 static struct arm_vmregion_head consistent_head = {
137 .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock),
138 .vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
139 .vm_start = CONSISTENT_BASE,
140 .vm_end = CONSISTENT_END,
143 #ifdef CONFIG_HUGETLB_PAGE
144 #error ARM Coherent DMA allocator does not (yet) support huge TLB
148 __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
152 struct arm_vmregion *c;
154 if (!consistent_pte[0]) {
155 printk(KERN_ERR "%s: not initialised\n", __func__);
160 size = PAGE_ALIGN(size);
162 page = __dma_alloc_buffer(dev, size, gfp);
167 * Allocate a virtual address in the consistent mapping region.
169 c = arm_vmregion_alloc(&consistent_head, size,
170 gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
173 int idx = CONSISTENT_PTE_INDEX(c->vm_start);
174 u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
176 pte = consistent_pte[idx] + off;
180 * Set the "dma handle"
182 *handle = page_to_dma(dev, page);
185 BUG_ON(!pte_none(*pte));
188 * x86 does not mark the pages reserved...
190 SetPageReserved(page);
191 set_pte_ext(pte, mk_pte(page, prot), 0);
195 if (off >= PTRS_PER_PTE) {
197 pte = consistent_pte[++idx];
199 } while (size -= PAGE_SIZE);
201 return (void *)c->vm_start;
205 __dma_free_buffer(page, size);
210 #else /* !CONFIG_MMU */
212 __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
218 size = PAGE_ALIGN(size);
220 page = __dma_alloc_buffer(dev, size, gfp);
224 *handle = page_to_dma(dev, page);
225 return page_address(page);
227 #endif /* CONFIG_MMU */
230 * Allocate DMA-coherent memory space and return both the kernel remapped
231 * virtual and bus address for that space.
234 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
238 if (dma_alloc_from_coherent(dev, size, handle, &memory))
241 if (arch_is_coherent()) {
244 page = __dma_alloc_buffer(dev, PAGE_ALIGN(size), gfp);
250 *handle = page_to_dma(dev, page);
251 return page_address(page);
254 return __dma_alloc(dev, size, handle, gfp,
255 pgprot_noncached(pgprot_kernel));
257 EXPORT_SYMBOL(dma_alloc_coherent);
260 * Allocate a writecombining region, in much the same way as
261 * dma_alloc_coherent above.
264 dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
266 return __dma_alloc(dev, size, handle, gfp,
267 pgprot_writecombine(pgprot_kernel));
269 EXPORT_SYMBOL(dma_alloc_writecombine);
271 static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
272 void *cpu_addr, dma_addr_t dma_addr, size_t size)
276 unsigned long user_size, kern_size;
277 struct arm_vmregion *c;
279 user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
281 c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
283 unsigned long off = vma->vm_pgoff;
285 kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
287 if (off < kern_size &&
288 user_size <= (kern_size - off)) {
289 ret = remap_pfn_range(vma, vma->vm_start,
290 page_to_pfn(c->vm_pages) + off,
291 user_size << PAGE_SHIFT,
295 #endif /* CONFIG_MMU */
300 int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
301 void *cpu_addr, dma_addr_t dma_addr, size_t size)
303 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
304 return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
306 EXPORT_SYMBOL(dma_mmap_coherent);
308 int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
309 void *cpu_addr, dma_addr_t dma_addr, size_t size)
311 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
312 return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
314 EXPORT_SYMBOL(dma_mmap_writecombine);
317 * free a page as defined by the above mapping.
318 * Must not be called with IRQs disabled.
321 void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
323 struct arm_vmregion *c;
329 WARN_ON(irqs_disabled());
331 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
334 size = PAGE_ALIGN(size);
336 if (arch_is_coherent()) {
337 __dma_free_buffer(dma_to_page(dev, handle), size);
341 c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr);
345 if ((c->vm_end - c->vm_start) != size) {
346 printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
347 __func__, c->vm_end - c->vm_start, size);
349 size = c->vm_end - c->vm_start;
352 idx = CONSISTENT_PTE_INDEX(c->vm_start);
353 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
354 ptep = consistent_pte[idx] + off;
357 pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
363 if (off >= PTRS_PER_PTE) {
365 ptep = consistent_pte[++idx];
368 if (!pte_none(pte) && pte_present(pte)) {
371 if (pfn_valid(pfn)) {
372 struct page *page = pfn_to_page(pfn);
375 * x86 does not mark the pages reserved...
377 ClearPageReserved(page);
381 printk(KERN_CRIT "%s: bad page in kernel page table\n",
383 } while (size -= PAGE_SIZE);
385 flush_tlb_kernel_range(c->vm_start, c->vm_end);
387 arm_vmregion_free(&consistent_head, c);
389 __dma_free_buffer(dma_to_page(dev, handle), size);
393 printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
397 #else /* !CONFIG_MMU */
398 void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
400 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
402 __dma_free_buffer(dma_to_page(dev, handle), PAGE_ALIGN(size));
404 #endif /* CONFIG_MMU */
405 EXPORT_SYMBOL(dma_free_coherent);
408 * Initialise the consistent memory allocation.
410 static int __init consistent_init(void)
418 u32 base = CONSISTENT_BASE;
421 pgd = pgd_offset(&init_mm, base);
422 pmd = pmd_alloc(&init_mm, pgd, base);
424 printk(KERN_ERR "%s: no pmd tables\n", __func__);
428 WARN_ON(!pmd_none(*pmd));
430 pte = pte_alloc_kernel(pmd, base);
432 printk(KERN_ERR "%s: no pte tables\n", __func__);
437 consistent_pte[i++] = pte;
438 base += (1 << PGDIR_SHIFT);
439 } while (base < CONSISTENT_END);
440 #endif /* !CONFIG_MMU */
445 core_initcall(consistent_init);
448 * Make an area consistent for devices.
449 * Note: Drivers should NOT use this function directly, as it will break
450 * platforms with CONFIG_DMABOUNCE.
451 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
453 void dma_cache_maint(const void *start, size_t size, int direction)
455 void (*inner_op)(const void *, const void *);
456 void (*outer_op)(unsigned long, unsigned long);
458 BUG_ON(!virt_addr_valid(start) || !virt_addr_valid(start + size - 1));
461 case DMA_FROM_DEVICE: /* invalidate only */
462 inner_op = dmac_inv_range;
463 outer_op = outer_inv_range;
465 case DMA_TO_DEVICE: /* writeback only */
466 inner_op = dmac_clean_range;
467 outer_op = outer_clean_range;
469 case DMA_BIDIRECTIONAL: /* writeback and invalidate */
470 inner_op = dmac_flush_range;
471 outer_op = outer_flush_range;
477 inner_op(start, start + size);
478 outer_op(__pa(start), __pa(start) + size);
480 EXPORT_SYMBOL(dma_cache_maint);
482 static void dma_cache_maint_contiguous(struct page *page, unsigned long offset,
483 size_t size, int direction)
487 void (*inner_op)(const void *, const void *);
488 void (*outer_op)(unsigned long, unsigned long);
491 case DMA_FROM_DEVICE: /* invalidate only */
492 inner_op = dmac_inv_range;
493 outer_op = outer_inv_range;
495 case DMA_TO_DEVICE: /* writeback only */
496 inner_op = dmac_clean_range;
497 outer_op = outer_clean_range;
499 case DMA_BIDIRECTIONAL: /* writeback and invalidate */
500 inner_op = dmac_flush_range;
501 outer_op = outer_flush_range;
507 if (!PageHighMem(page)) {
508 vaddr = page_address(page) + offset;
509 inner_op(vaddr, vaddr + size);
511 vaddr = kmap_high_get(page);
514 inner_op(vaddr, vaddr + size);
519 paddr = page_to_phys(page) + offset;
520 outer_op(paddr, paddr + size);
523 void dma_cache_maint_page(struct page *page, unsigned long offset,
524 size_t size, int dir)
527 * A single sg entry may refer to multiple physically contiguous
528 * pages. But we still need to process highmem pages individually.
529 * If highmem is not configured then the bulk of this loop gets
535 if (PageHighMem(page) && len + offset > PAGE_SIZE) {
536 if (offset >= PAGE_SIZE) {
537 page += offset / PAGE_SIZE;
540 len = PAGE_SIZE - offset;
542 dma_cache_maint_contiguous(page, offset, len, dir);
548 EXPORT_SYMBOL(dma_cache_maint_page);
551 * dma_map_sg - map a set of SG buffers for streaming mode DMA
552 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
553 * @sg: list of buffers
554 * @nents: number of buffers to map
555 * @dir: DMA transfer direction
557 * Map a set of buffers described by scatterlist in streaming mode for DMA.
558 * This is the scatter-gather version of the dma_map_single interface.
559 * Here the scatter gather list elements are each tagged with the
560 * appropriate dma address and length. They are obtained via
561 * sg_dma_{address,length}.
563 * Device ownership issues as mentioned for dma_map_single are the same
566 int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
567 enum dma_data_direction dir)
569 struct scatterlist *s;
572 for_each_sg(sg, s, nents, i) {
573 s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
575 if (dma_mapping_error(dev, s->dma_address))
581 for_each_sg(sg, s, i, j)
582 dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
585 EXPORT_SYMBOL(dma_map_sg);
588 * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
589 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
590 * @sg: list of buffers
591 * @nents: number of buffers to unmap (returned from dma_map_sg)
592 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
594 * Unmap a set of streaming mode DMA translations. Again, CPU access
595 * rules concerning calls here are the same as for dma_unmap_single().
597 void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
598 enum dma_data_direction dir)
600 struct scatterlist *s;
603 for_each_sg(sg, s, nents, i)
604 dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
606 EXPORT_SYMBOL(dma_unmap_sg);
609 * dma_sync_sg_for_cpu
610 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
611 * @sg: list of buffers
612 * @nents: number of buffers to map (returned from dma_map_sg)
613 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
615 void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
616 int nents, enum dma_data_direction dir)
618 struct scatterlist *s;
621 for_each_sg(sg, s, nents, i) {
622 dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0,
626 EXPORT_SYMBOL(dma_sync_sg_for_cpu);
629 * dma_sync_sg_for_device
630 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
631 * @sg: list of buffers
632 * @nents: number of buffers to map (returned from dma_map_sg)
633 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
635 void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
636 int nents, enum dma_data_direction dir)
638 struct scatterlist *s;
641 for_each_sg(sg, s, nents, i) {
642 if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0,
646 if (!arch_is_coherent())
647 dma_cache_maint_page(sg_page(s), s->offset,
651 EXPORT_SYMBOL(dma_sync_sg_for_device);