2 * linux/arch/arm/mm/copypage-v6.c
4 * Copyright (C) 2002 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/init.h>
11 #include <linux/spinlock.h>
13 #include <linux/highmem.h>
15 #include <asm/pgtable.h>
16 #include <asm/shmparam.h>
17 #include <asm/tlbflush.h>
18 #include <asm/cacheflush.h>
19 #include <asm/cachetype.h>
27 #define from_address (0xffff8000)
28 #define to_address (0xffffc000)
30 static DEFINE_SPINLOCK(v6_lock);
33 * Copy the user page. No aliasing to deal with so we can just
34 * attack the kernel's existing mapping of these pages.
36 static void v6_copy_user_highpage_nonaliasing(struct page *to,
37 struct page *from, unsigned long vaddr)
41 kfrom = kmap_atomic(from, KM_USER0);
42 kto = kmap_atomic(to, KM_USER1);
43 copy_page(kto, kfrom);
44 kunmap_atomic(kto, KM_USER1);
45 kunmap_atomic(kfrom, KM_USER0);
49 * Clear the user page. No aliasing to deal with so we can just
50 * attack the kernel's existing mapping of this page.
52 static void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr)
58 * Discard data in the kernel mapping for the new page.
59 * FIXME: needs this MCRR to be supported.
61 static void discard_old_kernel_data(void *kto)
63 __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06"
66 "r" ((unsigned long)kto + PAGE_SIZE - L1_CACHE_BYTES)
71 * Copy the page, taking account of the cache colour.
73 static void v6_copy_user_highpage_aliasing(struct page *to,
74 struct page *from, unsigned long vaddr)
76 unsigned int offset = CACHE_COLOUR(vaddr);
77 unsigned long kfrom, kto;
79 if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
80 __flush_dcache_page(page_mapping(from), from);
82 /* FIXME: not highmem safe */
83 discard_old_kernel_data(page_address(to));
86 * Now copy the page using the same cache colour as the
87 * pages ultimate destination.
91 set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
92 set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
94 kfrom = from_address + (offset << PAGE_SHIFT);
95 kto = to_address + (offset << PAGE_SHIFT);
97 flush_tlb_kernel_page(kfrom);
98 flush_tlb_kernel_page(kto);
100 copy_page((void *)kto, (void *)kfrom);
102 spin_unlock(&v6_lock);
106 * Clear the user page. We need to deal with the aliasing issues,
107 * so remap the kernel page into the same cache colour as the user
110 static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
112 unsigned int offset = CACHE_COLOUR(vaddr);
113 unsigned long to = to_address + (offset << PAGE_SHIFT);
116 * Discard data in the kernel mapping for the new page
117 * FIXME: needs this MCRR to be supported.
119 __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06"
122 "r" ((unsigned long)kaddr + PAGE_SIZE - L1_CACHE_BYTES)
126 * Now clear the page using the same cache colour as
127 * the pages ultimate destination.
131 set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, PAGE_KERNEL), 0);
132 flush_tlb_kernel_page(to);
133 clear_page((void *)to);
135 spin_unlock(&v6_lock);
138 struct cpu_user_fns v6_user_fns __initdata = {
139 .cpu_clear_user_page = v6_clear_user_page_nonaliasing,
140 .cpu_copy_user_highpage = v6_copy_user_highpage_nonaliasing,
143 static int __init v6_userpage_init(void)
145 if (cache_is_vipt_aliasing()) {
146 cpu_user.cpu_clear_user_page = v6_clear_user_page_aliasing;
147 cpu_user.cpu_copy_user_highpage = v6_copy_user_highpage_aliasing;
153 core_initcall(v6_userpage_init);