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   1 /*
   2  *  linux/arch/arm/mach-realview/realview_pb11mp.c
   3  *
   4  *  Copyright (C) 2008 ARM Limited
   5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include <linux/init.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/sysdev.h>
  25 #include <linux/amba/bus.h>
  26 #include <linux/amba/pl061.h>
  27 #include <linux/amba/mmci.h>
  28 #include <linux/io.h>
  29
  30 #include <mach/hardware.h>
  31 #include <asm/irq.h>
  32 #include <asm/leds.h>
  33 #include <asm/mach-types.h>
  34 #include <asm/hardware/gic.h>
  35 #include <asm/hardware/cache-l2x0.h>
  36 #include <asm/localtimer.h>
  37
  38 #include <asm/mach/arch.h>
  39 #include <asm/mach/flash.h>
  40 #include <asm/mach/map.h>
  41 #include <asm/mach/time.h>
  42
  43 #include <mach/board-pb11mp.h>
  44 #include <mach/irqs.h>
  45
  46 #include "core.h"
  47
  48 static struct map_desc realview_pb11mp_io_desc[] __initdata = {
  49         {
  50                 .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
  51                 .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
  52                 .length         = SZ_4K,
  53                 .type           = MT_DEVICE,
  54         }, {
  55                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
  56                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
  57                 .length         = SZ_4K,
  58                 .type           = MT_DEVICE,
  59         }, {
  60                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
  61                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
  62                 .length         = SZ_4K,
  63                 .type           = MT_DEVICE,
  64         }, {
  65                 .virtual        = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
  66                 .pfn            = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
  67                 .length         = SZ_4K,
  68                 .type           = MT_DEVICE,
  69         }, {
  70                 .virtual        = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
  71                 .pfn            = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
  72                 .length         = SZ_4K,
  73                 .type           = MT_DEVICE,
  74         }, {
  75                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
  76                 .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
  77                 .length         = SZ_4K,
  78                 .type           = MT_DEVICE,
  79         }, {
  80                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
  81                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
  82                 .length         = SZ_4K,
  83                 .type           = MT_DEVICE,
  84         }, {
  85                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
  86                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
  87                 .length         = SZ_4K,
  88                 .type           = MT_DEVICE,
  89         }, {
  90                 .virtual        = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
  91                 .pfn            = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
  92                 .length         = SZ_8K,
  93                 .type           = MT_DEVICE,
  94         },
  95 #ifdef CONFIG_DEBUG_LL
  96         {
  97                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
  98                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
  99                 .length         = SZ_4K,
 100                 .type           = MT_DEVICE,
 101         },
 102 #endif
 103 };
 104
 105 static void __init realview_pb11mp_map_io(void)
 106 {
 107         iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
 108 }
 109
 110 static struct pl061_platform_data gpio0_plat_data = {
 111         .gpio_base      = 0,
 112         .irq_base       = -1,
 113 };
 114
 115 static struct pl061_platform_data gpio1_plat_data = {
 116         .gpio_base      = 8,
 117         .irq_base       = -1,
 118 };
 119
 120 static struct pl061_platform_data gpio2_plat_data = {
 121         .gpio_base      = 16,
 122         .irq_base       = -1,
 123 };
 124
 125 /*
 126  * RealView PB11MPCore AMBA devices
 127  */
 128
 129 #define GPIO2_IRQ               { IRQ_PB11MP_GPIO2, NO_IRQ }
 130 #define GPIO2_DMA               { 0, 0 }
 131 #define GPIO3_IRQ               { IRQ_PB11MP_GPIO3, NO_IRQ }
 132 #define GPIO3_DMA               { 0, 0 }
 133 #define AACI_IRQ                { IRQ_TC11MP_AACI, NO_IRQ }
 134 #define AACI_DMA                { 0x80, 0x81 }
 135 #define MMCI0_IRQ               { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
 136 #define MMCI0_DMA               { 0x84, 0 }
 137 #define KMI0_IRQ                { IRQ_TC11MP_KMI0, NO_IRQ }
 138 #define KMI0_DMA                { 0, 0 }
 139 #define KMI1_IRQ                { IRQ_TC11MP_KMI1, NO_IRQ }
 140 #define KMI1_DMA                { 0, 0 }
 141 #define PB11MP_SMC_IRQ          { NO_IRQ, NO_IRQ }
 142 #define PB11MP_SMC_DMA          { 0, 0 }
 143 #define MPMC_IRQ                { NO_IRQ, NO_IRQ }
 144 #define MPMC_DMA                { 0, 0 }
 145 #define PB11MP_CLCD_IRQ         { IRQ_PB11MP_CLCD, NO_IRQ }
 146 #define PB11MP_CLCD_DMA         { 0, 0 }
 147 #define DMAC_IRQ                { IRQ_PB11MP_DMAC, NO_IRQ }
 148 #define DMAC_DMA                { 0, 0 }
 149 #define SCTL_IRQ                { NO_IRQ, NO_IRQ }
 150 #define SCTL_DMA                { 0, 0 }
 151 #define PB11MP_WATCHDOG_IRQ     { IRQ_PB11MP_WATCHDOG, NO_IRQ }
 152 #define PB11MP_WATCHDOG_DMA     { 0, 0 }
 153 #define PB11MP_GPIO0_IRQ        { IRQ_PB11MP_GPIO0, NO_IRQ }
 154 #define PB11MP_GPIO0_DMA        { 0, 0 }
 155 #define GPIO1_IRQ               { IRQ_PB11MP_GPIO1, NO_IRQ }
 156 #define GPIO1_DMA               { 0, 0 }
 157 #define PB11MP_RTC_IRQ          { IRQ_TC11MP_RTC, NO_IRQ }
 158 #define PB11MP_RTC_DMA          { 0, 0 }
 159 #define SCI_IRQ                 { IRQ_PB11MP_SCI, NO_IRQ }
 160 #define SCI_DMA                 { 7, 6 }
 161 #define PB11MP_UART0_IRQ        { IRQ_TC11MP_UART0, NO_IRQ }
 162 #define PB11MP_UART0_DMA        { 15, 14 }
 163 #define PB11MP_UART1_IRQ        { IRQ_TC11MP_UART1, NO_IRQ }
 164 #define PB11MP_UART1_DMA        { 13, 12 }
 165 #define PB11MP_UART2_IRQ        { IRQ_PB11MP_UART2, NO_IRQ }
 166 #define PB11MP_UART2_DMA        { 11, 10 }
 167 #define PB11MP_UART3_IRQ        { IRQ_PB11MP_UART3, NO_IRQ }
 168 #define PB11MP_UART3_DMA        { 0x86, 0x87 }
 169 #define PB11MP_SSP_IRQ          { IRQ_PB11MP_SSP, NO_IRQ }
 170 #define PB11MP_SSP_DMA          { 9, 8 }
 171
 172 /* FPGA Primecells */
 173 AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
 174 AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
 175 AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
 176 AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
 177 AMBA_DEVICE(uart3,      "fpga:uart3",   PB11MP_UART3,   NULL);
 178
 179 /* DevChip Primecells */
 180 AMBA_DEVICE(smc,        "dev:smc",      PB11MP_SMC,     NULL);
 181 AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
 182 AMBA_DEVICE(wdog,       "dev:wdog",     PB11MP_WATCHDOG, NULL);
 183 AMBA_DEVICE(gpio0,      "dev:gpio0",    PB11MP_GPIO0,   &gpio0_plat_data);
 184 AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
 185 AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
 186 AMBA_DEVICE(rtc,        "dev:rtc",      PB11MP_RTC,     NULL);
 187 AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
 188 AMBA_DEVICE(uart0,      "dev:uart0",    PB11MP_UART0,   NULL);
 189 AMBA_DEVICE(uart1,      "dev:uart1",    PB11MP_UART1,   NULL);
 190 AMBA_DEVICE(uart2,      "dev:uart2",    PB11MP_UART2,   NULL);
 191 AMBA_DEVICE(ssp0,       "dev:ssp0",     PB11MP_SSP,     NULL);
 192
 193 /* Primecells on the NEC ISSP chip */
 194 AMBA_DEVICE(clcd,       "issp:clcd",    PB11MP_CLCD,    &clcd_plat_data);
 195 AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
 196
 197 static struct amba_device *amba_devs[] __initdata = {
 198         &dmac_device,
 199         &uart0_device,
 200         &uart1_device,
 201         &uart2_device,
 202         &uart3_device,
 203         &smc_device,
 204         &clcd_device,
 205         &sctl_device,
 206         &wdog_device,
 207         &gpio0_device,
 208         &gpio1_device,
 209         &gpio2_device,
 210         &rtc_device,
 211         &sci0_device,
 212         &ssp0_device,
 213         &aaci_device,
 214         &mmc0_device,
 215         &kmi0_device,
 216         &kmi1_device,
 217 };
 218
 219 /*
 220  * RealView PB11MPCore platform devices
 221  */
 222 static struct resource realview_pb11mp_flash_resource[] = {
 223         [0] = {
 224                 .start          = REALVIEW_PB11MP_FLASH0_BASE,
 225                 .end            = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
 226                 .flags          = IORESOURCE_MEM,
 227         },
 228         [1] = {
 229                 .start          = REALVIEW_PB11MP_FLASH1_BASE,
 230                 .end            = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
 231                 .flags          = IORESOURCE_MEM,
 232         },
 233 };
 234
 235 static struct resource realview_pb11mp_smsc911x_resources[] = {
 236         [0] = {
 237                 .start          = REALVIEW_PB11MP_ETH_BASE,
 238                 .end            = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
 239                 .flags          = IORESOURCE_MEM,
 240         },
 241         [1] = {
 242                 .start          = IRQ_TC11MP_ETH,
 243                 .end            = IRQ_TC11MP_ETH,
 244                 .flags          = IORESOURCE_IRQ,
 245         },
 246 };
 247
 248 static struct resource realview_pb11mp_isp1761_resources[] = {
 249         [0] = {
 250                 .start          = REALVIEW_PB11MP_USB_BASE,
 251                 .end            = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1,
 252                 .flags          = IORESOURCE_MEM,
 253         },
 254         [1] = {
 255                 .start          = IRQ_TC11MP_USB,
 256                 .end            = IRQ_TC11MP_USB,
 257                 .flags          = IORESOURCE_IRQ,
 258         },
 259 };
 260
 261 static void __init gic_init_irq(void)
 262 {
 263         unsigned int pldctrl;
 264
 265         /* new irq mode with no DCC */
 266         writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
 267         pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
 268         pldctrl |= 2 << 22;
 269         writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
 270         writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
 271
 272         /* ARM11MPCore test chip GIC, primary */
 273         gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE);
 274         gic_dist_init(0, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), 29);
 275         gic_cpu_init(0, gic_cpu_base_addr);
 276
 277         /* board GIC, secondary */
 278         gic_dist_init(1, __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), IRQ_PB11MP_GIC_START);
 279         gic_cpu_init(1, __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
 280         gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
 281 }
 282
 283 static void __init realview_pb11mp_timer_init(void)
 284 {
 285         timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
 286         timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
 287         timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
 288         timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
 289
 290 #ifdef CONFIG_LOCAL_TIMERS
 291         twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
 292 #endif
 293         realview_timer_init(IRQ_TC11MP_TIMER0_1);
 294 }
 295
 296 static struct sys_timer realview_pb11mp_timer = {
 297         .init           = realview_pb11mp_timer_init,
 298 };
 299
 300 static void realview_pb11mp_reset(char mode)
 301 {
 302         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
 303         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
 304
 305         /*
 306          * To reset, we hit the on-board reset register
 307          * in the system FPGA
 308          */
 309         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
 310         __raw_writel(0x0000, reset_ctrl);
 311         __raw_writel(0x0004, reset_ctrl);
 312 }
 313
 314 static void __init realview_pb11mp_init(void)
 315 {
 316         int i;
 317
 318 #ifdef CONFIG_CACHE_L2X0
 319         /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
 320          * Bits:  .... ...0 0111 1001 0000 .... .... .... */
 321         l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
 322 #endif
 323
 324         realview_flash_register(realview_pb11mp_flash_resource,
 325                                 ARRAY_SIZE(realview_pb11mp_flash_resource));
 326         realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
 327         platform_device_register(&realview_i2c_device);
 328         platform_device_register(&realview_cf_device);
 329         realview_usb_register(realview_pb11mp_isp1761_resources);
 330
 331         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
 332                 struct amba_device *d = amba_devs[i];
 333                 amba_device_register(d, &iomem_resource);
 334         }
 335
 336 #ifdef CONFIG_LEDS
 337         leds_event = realview_leds_event;
 338 #endif
 339         realview_reset = realview_pb11mp_reset;
 340 }
 341
 342 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
 343         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 344         .phys_io        = REALVIEW_PB11MP_UART0_BASE,
 345         .io_pg_offst    = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
 346         .boot_params    = PHYS_OFFSET + 0x00000100,
 347         .fixup          = realview_fixup,
 348         .map_io         = realview_pb11mp_map_io,
 349         .init_irq       = gic_init_irq,
 350         .timer          = &realview_pb11mp_timer,
 351         .init_machine   = realview_pb11mp_init,
 352 MACHINE_END