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   1 /*
   2  * arch/arm/mach-orion5x/common.c
   3  *
   4  * Core functions for Marvell Orion 5x SoCs
   5  *
   6  * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/mbus.h>
  18 #include <linux/mv643xx_eth.h>
  19 #include <linux/mv643xx_i2c.h>
  20 #include <linux/ata_platform.h>
  21 #include <linux/spi/orion_spi.h>
  22 #include <net/dsa.h>
  23 #include <asm/page.h>
  24 #include <asm/setup.h>
  25 #include <asm/timex.h>
  26 #include <asm/mach/arch.h>
  27 #include <asm/mach/map.h>
  28 #include <asm/mach/time.h>
  29 #include <mach/hardware.h>
  30 #include <mach/orion5x.h>
  31 #include <plat/ehci-orion.h>
  32 #include <plat/mv_xor.h>
  33 #include <plat/orion_nand.h>
  34 #include <plat/time.h>
  35 #include "common.h"
  36
  37 /*****************************************************************************
  38  * I/O Address Mapping
  39  ****************************************************************************/
  40 static struct map_desc orion5x_io_desc[] __initdata = {
  41         {
  42                 .virtual        = ORION5X_REGS_VIRT_BASE,
  43                 .pfn            = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
  44                 .length         = ORION5X_REGS_SIZE,
  45                 .type           = MT_DEVICE,
  46         }, {
  47                 .virtual        = ORION5X_PCIE_IO_VIRT_BASE,
  48                 .pfn            = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
  49                 .length         = ORION5X_PCIE_IO_SIZE,
  50                 .type           = MT_DEVICE,
  51         }, {
  52                 .virtual        = ORION5X_PCI_IO_VIRT_BASE,
  53                 .pfn            = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
  54                 .length         = ORION5X_PCI_IO_SIZE,
  55                 .type           = MT_DEVICE,
  56         }, {
  57                 .virtual        = ORION5X_PCIE_WA_VIRT_BASE,
  58                 .pfn            = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
  59                 .length         = ORION5X_PCIE_WA_SIZE,
  60                 .type           = MT_DEVICE,
  61         },
  62 };
  63
  64 void __init orion5x_map_io(void)
  65 {
  66         iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
  67 }
  68
  69
  70 /*****************************************************************************
  71  * EHCI
  72  ****************************************************************************/
  73 static struct orion_ehci_data orion5x_ehci_data = {
  74         .dram           = &orion5x_mbus_dram_info,
  75         .phy_version    = EHCI_PHY_ORION,
  76 };
  77
  78 static u64 ehci_dmamask = 0xffffffffUL;
  79
  80
  81 /*****************************************************************************
  82  * EHCI0
  83  ****************************************************************************/
  84 static struct resource orion5x_ehci0_resources[] = {
  85         {
  86                 .start  = ORION5X_USB0_PHYS_BASE,
  87                 .end    = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
  88                 .flags  = IORESOURCE_MEM,
  89         }, {
  90                 .start  = IRQ_ORION5X_USB0_CTRL,
  91                 .end    = IRQ_ORION5X_USB0_CTRL,
  92                 .flags  = IORESOURCE_IRQ,
  93         },
  94 };
  95
  96 static struct platform_device orion5x_ehci0 = {
  97         .name           = "orion-ehci",
  98         .id             = 0,
  99         .dev            = {
 100                 .dma_mask               = &ehci_dmamask,
 101                 .coherent_dma_mask      = 0xffffffff,
 102                 .platform_data          = &orion5x_ehci_data,
 103         },
 104         .resource       = orion5x_ehci0_resources,
 105         .num_resources  = ARRAY_SIZE(orion5x_ehci0_resources),
 106 };
 107
 108 void __init orion5x_ehci0_init(void)
 109 {
 110         platform_device_register(&orion5x_ehci0);
 111 }
 112
 113
 114 /*****************************************************************************
 115  * EHCI1
 116  ****************************************************************************/
 117 static struct resource orion5x_ehci1_resources[] = {
 118         {
 119                 .start  = ORION5X_USB1_PHYS_BASE,
 120                 .end    = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
 121                 .flags  = IORESOURCE_MEM,
 122         }, {
 123                 .start  = IRQ_ORION5X_USB1_CTRL,
 124                 .end    = IRQ_ORION5X_USB1_CTRL,
 125                 .flags  = IORESOURCE_IRQ,
 126         },
 127 };
 128
 129 static struct platform_device orion5x_ehci1 = {
 130         .name           = "orion-ehci",
 131         .id             = 1,
 132         .dev            = {
 133                 .dma_mask               = &ehci_dmamask,
 134                 .coherent_dma_mask      = 0xffffffff,
 135                 .platform_data          = &orion5x_ehci_data,
 136         },
 137         .resource       = orion5x_ehci1_resources,
 138         .num_resources  = ARRAY_SIZE(orion5x_ehci1_resources),
 139 };
 140
 141 void __init orion5x_ehci1_init(void)
 142 {
 143         platform_device_register(&orion5x_ehci1);
 144 }
 145
 146
 147 /*****************************************************************************
 148  * GigE
 149  ****************************************************************************/
 150 struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
 151         .dram           = &orion5x_mbus_dram_info,
 152 };
 153
 154 static struct resource orion5x_eth_shared_resources[] = {
 155         {
 156                 .start  = ORION5X_ETH_PHYS_BASE + 0x2000,
 157                 .end    = ORION5X_ETH_PHYS_BASE + 0x3fff,
 158                 .flags  = IORESOURCE_MEM,
 159         }, {
 160                 .start  = IRQ_ORION5X_ETH_ERR,
 161                 .end    = IRQ_ORION5X_ETH_ERR,
 162                 .flags  = IORESOURCE_IRQ,
 163         },
 164 };
 165
 166 static struct platform_device orion5x_eth_shared = {
 167         .name           = MV643XX_ETH_SHARED_NAME,
 168         .id             = 0,
 169         .dev            = {
 170                 .platform_data  = &orion5x_eth_shared_data,
 171         },
 172         .num_resources  = ARRAY_SIZE(orion5x_eth_shared_resources),
 173         .resource       = orion5x_eth_shared_resources,
 174 };
 175
 176 static struct resource orion5x_eth_resources[] = {
 177         {
 178                 .name   = "eth irq",
 179                 .start  = IRQ_ORION5X_ETH_SUM,
 180                 .end    = IRQ_ORION5X_ETH_SUM,
 181                 .flags  = IORESOURCE_IRQ,
 182         },
 183 };
 184
 185 static struct platform_device orion5x_eth = {
 186         .name           = MV643XX_ETH_NAME,
 187         .id             = 0,
 188         .num_resources  = 1,
 189         .resource       = orion5x_eth_resources,
 190 };
 191
 192 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 193 {
 194         eth_data->shared = &orion5x_eth_shared;
 195         orion5x_eth.dev.platform_data = eth_data;
 196
 197         platform_device_register(&orion5x_eth_shared);
 198         platform_device_register(&orion5x_eth);
 199 }
 200
 201
 202 /*****************************************************************************
 203  * Ethernet switch
 204  ****************************************************************************/
 205 static struct resource orion5x_switch_resources[] = {
 206         {
 207                 .start  = 0,
 208                 .end    = 0,
 209                 .flags  = IORESOURCE_IRQ,
 210         },
 211 };
 212
 213 static struct platform_device orion5x_switch_device = {
 214         .name           = "dsa",
 215         .id             = 0,
 216         .num_resources  = 0,
 217         .resource       = orion5x_switch_resources,
 218 };
 219
 220 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
 221 {
 222         int i;
 223
 224         if (irq != NO_IRQ) {
 225                 orion5x_switch_resources[0].start = irq;
 226                 orion5x_switch_resources[0].end = irq;
 227                 orion5x_switch_device.num_resources = 1;
 228         }
 229
 230         d->netdev = &orion5x_eth.dev;
 231         for (i = 0; i < d->nr_chips; i++)
 232                 d->chip[i].mii_bus = &orion5x_eth_shared.dev;
 233         orion5x_switch_device.dev.platform_data = d;
 234
 235         platform_device_register(&orion5x_switch_device);
 236 }
 237
 238
 239 /*****************************************************************************
 240  * I2C
 241  ****************************************************************************/
 242 static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
 243         .freq_m         = 8, /* assumes 166 MHz TCLK */
 244         .freq_n         = 3,
 245         .timeout        = 1000, /* Default timeout of 1 second */
 246 };
 247
 248 static struct resource orion5x_i2c_resources[] = {
 249         {
 250                 .name   = "i2c base",
 251                 .start  = I2C_PHYS_BASE,
 252                 .end    = I2C_PHYS_BASE + 0x1f,
 253                 .flags  = IORESOURCE_MEM,
 254         }, {
 255                 .name   = "i2c irq",
 256                 .start  = IRQ_ORION5X_I2C,
 257                 .end    = IRQ_ORION5X_I2C,
 258                 .flags  = IORESOURCE_IRQ,
 259         },
 260 };
 261
 262 static struct platform_device orion5x_i2c = {
 263         .name           = MV64XXX_I2C_CTLR_NAME,
 264         .id             = 0,
 265         .num_resources  = ARRAY_SIZE(orion5x_i2c_resources),
 266         .resource       = orion5x_i2c_resources,
 267         .dev            = {
 268                 .platform_data  = &orion5x_i2c_pdata,
 269         },
 270 };
 271
 272 void __init orion5x_i2c_init(void)
 273 {
 274         platform_device_register(&orion5x_i2c);
 275 }
 276
 277
 278 /*****************************************************************************
 279  * SATA
 280  ****************************************************************************/
 281 static struct resource orion5x_sata_resources[] = {
 282         {
 283                 .name   = "sata base",
 284                 .start  = ORION5X_SATA_PHYS_BASE,
 285                 .end    = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
 286                 .flags  = IORESOURCE_MEM,
 287         }, {
 288                 .name   = "sata irq",
 289                 .start  = IRQ_ORION5X_SATA,
 290                 .end    = IRQ_ORION5X_SATA,
 291                 .flags  = IORESOURCE_IRQ,
 292         },
 293 };
 294
 295 static struct platform_device orion5x_sata = {
 296         .name           = "sata_mv",
 297         .id             = 0,
 298         .dev            = {
 299                 .coherent_dma_mask      = 0xffffffff,
 300         },
 301         .num_resources  = ARRAY_SIZE(orion5x_sata_resources),
 302         .resource       = orion5x_sata_resources,
 303 };
 304
 305 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
 306 {
 307         sata_data->dram = &orion5x_mbus_dram_info;
 308         orion5x_sata.dev.platform_data = sata_data;
 309         platform_device_register(&orion5x_sata);
 310 }
 311
 312
 313 /*****************************************************************************
 314  * SPI
 315  ****************************************************************************/
 316 static struct orion_spi_info orion5x_spi_plat_data = {
 317         .tclk                   = 0,
 318         .enable_clock_fix       = 1,
 319 };
 320
 321 static struct resource orion5x_spi_resources[] = {
 322         {
 323                 .name   = "spi base",
 324                 .start  = SPI_PHYS_BASE,
 325                 .end    = SPI_PHYS_BASE + 0x1f,
 326                 .flags  = IORESOURCE_MEM,
 327         },
 328 };
 329
 330 static struct platform_device orion5x_spi = {
 331         .name           = "orion_spi",
 332         .id             = 0,
 333         .dev            = {
 334                 .platform_data  = &orion5x_spi_plat_data,
 335         },
 336         .num_resources  = ARRAY_SIZE(orion5x_spi_resources),
 337         .resource       = orion5x_spi_resources,
 338 };
 339
 340 void __init orion5x_spi_init()
 341 {
 342         platform_device_register(&orion5x_spi);
 343 }
 344
 345
 346 /*****************************************************************************
 347  * UART0
 348  ****************************************************************************/
 349 static struct plat_serial8250_port orion5x_uart0_data[] = {
 350         {
 351                 .mapbase        = UART0_PHYS_BASE,
 352                 .membase        = (char *)UART0_VIRT_BASE,
 353                 .irq            = IRQ_ORION5X_UART0,
 354                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 355                 .iotype         = UPIO_MEM,
 356                 .regshift       = 2,
 357                 .uartclk        = 0,
 358         }, {
 359         },
 360 };
 361
 362 static struct resource orion5x_uart0_resources[] = {
 363         {
 364                 .start          = UART0_PHYS_BASE,
 365                 .end            = UART0_PHYS_BASE + 0xff,
 366                 .flags          = IORESOURCE_MEM,
 367         }, {
 368                 .start          = IRQ_ORION5X_UART0,
 369                 .end            = IRQ_ORION5X_UART0,
 370                 .flags          = IORESOURCE_IRQ,
 371         },
 372 };
 373
 374 static struct platform_device orion5x_uart0 = {
 375         .name                   = "serial8250",
 376         .id                     = PLAT8250_DEV_PLATFORM,
 377         .dev                    = {
 378                 .platform_data  = orion5x_uart0_data,
 379         },
 380         .resource               = orion5x_uart0_resources,
 381         .num_resources          = ARRAY_SIZE(orion5x_uart0_resources),
 382 };
 383
 384 void __init orion5x_uart0_init(void)
 385 {
 386         platform_device_register(&orion5x_uart0);
 387 }
 388
 389
 390 /*****************************************************************************
 391  * UART1
 392  ****************************************************************************/
 393 static struct plat_serial8250_port orion5x_uart1_data[] = {
 394         {
 395                 .mapbase        = UART1_PHYS_BASE,
 396                 .membase        = (char *)UART1_VIRT_BASE,
 397                 .irq            = IRQ_ORION5X_UART1,
 398                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 399                 .iotype         = UPIO_MEM,
 400                 .regshift       = 2,
 401                 .uartclk        = 0,
 402         }, {
 403         },
 404 };
 405
 406 static struct resource orion5x_uart1_resources[] = {
 407         {
 408                 .start          = UART1_PHYS_BASE,
 409                 .end            = UART1_PHYS_BASE + 0xff,
 410                 .flags          = IORESOURCE_MEM,
 411         }, {
 412                 .start          = IRQ_ORION5X_UART1,
 413                 .end            = IRQ_ORION5X_UART1,
 414                 .flags          = IORESOURCE_IRQ,
 415         },
 416 };
 417
 418 static struct platform_device orion5x_uart1 = {
 419         .name                   = "serial8250",
 420         .id                     = PLAT8250_DEV_PLATFORM1,
 421         .dev                    = {
 422                 .platform_data  = orion5x_uart1_data,
 423         },
 424         .resource               = orion5x_uart1_resources,
 425         .num_resources          = ARRAY_SIZE(orion5x_uart1_resources),
 426 };
 427
 428 void __init orion5x_uart1_init(void)
 429 {
 430         platform_device_register(&orion5x_uart1);
 431 }
 432
 433
 434 /*****************************************************************************
 435  * XOR engine
 436  ****************************************************************************/
 437 struct mv_xor_platform_shared_data orion5x_xor_shared_data = {
 438         .dram           = &orion5x_mbus_dram_info,
 439 };
 440
 441 static struct resource orion5x_xor_shared_resources[] = {
 442         {
 443                 .name   = "xor low",
 444                 .start  = ORION5X_XOR_PHYS_BASE,
 445                 .end    = ORION5X_XOR_PHYS_BASE + 0xff,
 446                 .flags  = IORESOURCE_MEM,
 447         }, {
 448                 .name   = "xor high",
 449                 .start  = ORION5X_XOR_PHYS_BASE + 0x200,
 450                 .end    = ORION5X_XOR_PHYS_BASE + 0x2ff,
 451                 .flags  = IORESOURCE_MEM,
 452         },
 453 };
 454
 455 static struct platform_device orion5x_xor_shared = {
 456         .name           = MV_XOR_SHARED_NAME,
 457         .id             = 0,
 458         .dev            = {
 459                 .platform_data  = &orion5x_xor_shared_data,
 460         },
 461         .num_resources  = ARRAY_SIZE(orion5x_xor_shared_resources),
 462         .resource       = orion5x_xor_shared_resources,
 463 };
 464
 465 static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
 466
 467 static struct resource orion5x_xor0_resources[] = {
 468         [0] = {
 469                 .start  = IRQ_ORION5X_XOR0,
 470                 .end    = IRQ_ORION5X_XOR0,
 471                 .flags  = IORESOURCE_IRQ,
 472         },
 473 };
 474
 475 static struct mv_xor_platform_data orion5x_xor0_data = {
 476         .shared         = &orion5x_xor_shared,
 477         .hw_id          = 0,
 478         .pool_size      = PAGE_SIZE,
 479 };
 480
 481 static struct platform_device orion5x_xor0_channel = {
 482         .name           = MV_XOR_NAME,
 483         .id             = 0,
 484         .num_resources  = ARRAY_SIZE(orion5x_xor0_resources),
 485         .resource       = orion5x_xor0_resources,
 486         .dev            = {
 487                 .dma_mask               = &orion5x_xor_dmamask,
 488                 .coherent_dma_mask      = DMA_64BIT_MASK,
 489                 .platform_data          = (void *)&orion5x_xor0_data,
 490         },
 491 };
 492
 493 static struct resource orion5x_xor1_resources[] = {
 494         [0] = {
 495                 .start  = IRQ_ORION5X_XOR1,
 496                 .end    = IRQ_ORION5X_XOR1,
 497                 .flags  = IORESOURCE_IRQ,
 498         },
 499 };
 500
 501 static struct mv_xor_platform_data orion5x_xor1_data = {
 502         .shared         = &orion5x_xor_shared,
 503         .hw_id          = 1,
 504         .pool_size      = PAGE_SIZE,
 505 };
 506
 507 static struct platform_device orion5x_xor1_channel = {
 508         .name           = MV_XOR_NAME,
 509         .id             = 1,
 510         .num_resources  = ARRAY_SIZE(orion5x_xor1_resources),
 511         .resource       = orion5x_xor1_resources,
 512         .dev            = {
 513                 .dma_mask               = &orion5x_xor_dmamask,
 514                 .coherent_dma_mask      = DMA_64BIT_MASK,
 515                 .platform_data          = (void *)&orion5x_xor1_data,
 516         },
 517 };
 518
 519 void __init orion5x_xor_init(void)
 520 {
 521         platform_device_register(&orion5x_xor_shared);
 522
 523         /*
 524          * two engines can't do memset simultaneously, this limitation
 525          * satisfied by removing memset support from one of the engines.
 526          */
 527         dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
 528         dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
 529         platform_device_register(&orion5x_xor0_channel);
 530
 531         dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
 532         dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
 533         dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
 534         platform_device_register(&orion5x_xor1_channel);
 535 }
 536
 537
 538 /*****************************************************************************
 539  * Time handling
 540  ****************************************************************************/
 541 int orion5x_tclk;
 542
 543 int __init orion5x_find_tclk(void)
 544 {
 545         u32 dev, rev;
 546
 547         orion5x_pcie_id(&dev, &rev);
 548         if (dev == MV88F6183_DEV_ID &&
 549             (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
 550                 return 133333333;
 551
 552         return 166666667;
 553 }
 554
 555 static void orion5x_timer_init(void)
 556 {
 557         orion5x_tclk = orion5x_find_tclk();
 558         orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
 559 }
 560
 561 struct sys_timer orion5x_timer = {
 562         .init = orion5x_timer_init,
 563 };
 564
 565
 566 /*****************************************************************************
 567  * General
 568  ****************************************************************************/
 569 /*
 570  * Identify device ID and rev from PCIe configuration header space '0'.
 571  */
 572 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
 573 {
 574         orion5x_pcie_id(dev, rev);
 575
 576         if (*dev == MV88F5281_DEV_ID) {
 577                 if (*rev == MV88F5281_REV_D2) {
 578                         *dev_name = "MV88F5281-D2";
 579                 } else if (*rev == MV88F5281_REV_D1) {
 580                         *dev_name = "MV88F5281-D1";
 581                 } else if (*rev == MV88F5281_REV_D0) {
 582                         *dev_name = "MV88F5281-D0";
 583                 } else {
 584                         *dev_name = "MV88F5281-Rev-Unsupported";
 585                 }
 586         } else if (*dev == MV88F5182_DEV_ID) {
 587                 if (*rev == MV88F5182_REV_A2) {
 588                         *dev_name = "MV88F5182-A2";
 589                 } else {
 590                         *dev_name = "MV88F5182-Rev-Unsupported";
 591                 }
 592         } else if (*dev == MV88F5181_DEV_ID) {
 593                 if (*rev == MV88F5181_REV_B1) {
 594                         *dev_name = "MV88F5181-Rev-B1";
 595                 } else if (*rev == MV88F5181L_REV_A1) {
 596                         *dev_name = "MV88F5181L-Rev-A1";
 597                 } else {
 598                         *dev_name = "MV88F5181(L)-Rev-Unsupported";
 599                 }
 600         } else if (*dev == MV88F6183_DEV_ID) {
 601                 if (*rev == MV88F6183_REV_B0) {
 602                         *dev_name = "MV88F6183-Rev-B0";
 603                 } else {
 604                         *dev_name = "MV88F6183-Rev-Unsupported";
 605                 }
 606         } else {
 607                 *dev_name = "Device-Unknown";
 608         }
 609 }
 610
 611 void __init orion5x_init(void)
 612 {
 613         char *dev_name;
 614         u32 dev, rev;
 615
 616         orion5x_id(&dev, &rev, &dev_name);
 617         printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
 618
 619         orion5x_eth_shared_data.t_clk = orion5x_tclk;
 620         orion5x_spi_plat_data.tclk = orion5x_tclk;
 621         orion5x_uart0_data[0].uartclk = orion5x_tclk;
 622         orion5x_uart1_data[0].uartclk = orion5x_tclk;
 623
 624         /*
 625          * Setup Orion address map
 626          */
 627         orion5x_setup_cpu_mbus_bridge();
 628
 629         /*
 630          * Don't issue "Wait for Interrupt" instruction if we are
 631          * running on D0 5281 silicon.
 632          */
 633         if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
 634                 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
 635                 disable_hlt();
 636         }
 637 }
 638
 639 /*
 640  * Many orion-based systems have buggy bootloader implementations.
 641  * This is a common fixup for bogus memory tags.
 642  */
 643 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
 644                             char **from, struct meminfo *meminfo)
 645 {
 646         for (; t->hdr.size; t = tag_next(t))
 647                 if (t->hdr.tag == ATAG_MEM &&
 648                     (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
 649                      t->u.mem.start & ~PAGE_MASK)) {
 650                         printk(KERN_WARNING
 651                                "Clearing invalid memory bank %dKB@0x%08x\n",
 652                                t->u.mem.size / 1024, t->u.mem.start);
 653                         t->hdr.tag = 0;
 654                 }
 655 }