ARM: MX3: add SPI devices for mx31lite
[safe/jmp/linux-2.6] / arch / arm / mach-mx3 / mx31lite.c
1 /*
2  *  Copyright (C) 2000 Deep Blue Solutions Ltd
3  *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
4  *  Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5  *  Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/kernel.h>
25 #include <linux/memory.h>
26 #include <linux/platform_device.h>
27 #include <linux/gpio.h>
28 #include <linux/smsc911x.h>
29 #include <linux/mfd/mc13783.h>
30 #include <linux/spi/spi.h>
31
32 #include <asm/mach-types.h>
33 #include <asm/mach/arch.h>
34 #include <asm/mach/time.h>
35 #include <asm/mach/map.h>
36 #include <asm/page.h>
37 #include <asm/setup.h>
38
39 #include <mach/hardware.h>
40 #include <mach/common.h>
41 #include <mach/board-mx31lite.h>
42 #include <mach/imx-uart.h>
43 #include <mach/iomux-mx3.h>
44 #include <mach/irqs.h>
45 #include <mach/mxc_nand.h>
46 #include <mach/spi.h>
47
48 #include "devices.h"
49
50 /*
51  * This file contains the module-specific initialization routines.
52  */
53
54 static unsigned int mx31lite_pins[] = {
55         /* LAN9117 IRQ pin */
56         IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
57         /* SPI 1 */
58         MX31_PIN_CSPI2_SCLK__SCLK,
59         MX31_PIN_CSPI2_MOSI__MOSI,
60         MX31_PIN_CSPI2_MISO__MISO,
61         MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
62         MX31_PIN_CSPI2_SS0__SS0,
63         MX31_PIN_CSPI2_SS1__SS1,
64         MX31_PIN_CSPI2_SS2__SS2,
65 };
66
67 static struct mxc_nand_platform_data mx31lite_nand_board_info = {
68         .width = 1,
69         .hw_ecc = 1,
70 };
71
72 static struct smsc911x_platform_config smsc911x_config = {
73         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
74         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
75         .flags          = SMSC911X_USE_16BIT,
76 };
77
78 static struct resource smsc911x_resources[] = {
79         {
80                 .start          = CS4_BASE_ADDR,
81                 .end            = CS4_BASE_ADDR + 0x100,
82                 .flags          = IORESOURCE_MEM,
83         }, {
84                 .start          = IOMUX_TO_IRQ(MX31_PIN_SFS6),
85                 .end            = IOMUX_TO_IRQ(MX31_PIN_SFS6),
86                 .flags          = IORESOURCE_IRQ,
87         },
88 };
89
90 static struct platform_device smsc911x_device = {
91         .name           = "smsc911x",
92         .id             = -1,
93         .num_resources  = ARRAY_SIZE(smsc911x_resources),
94         .resource       = smsc911x_resources,
95         .dev            = {
96                 .platform_data = &smsc911x_config,
97         },
98 };
99
100 /*
101  * SPI
102  *
103  * The MC13783 is the only hard-wired SPI device on the module.
104  */
105
106 static int spi_internal_chipselect[] = {
107         MXC_SPI_CS(0),
108 };
109
110 static struct spi_imx_master spi1_pdata = {
111         .chipselect     = spi_internal_chipselect,
112         .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
113 };
114
115 static struct mc13783_platform_data mc13783_pdata __initdata = {
116         .flags  = MC13783_USE_RTC |
117                   MC13783_USE_REGULATOR,
118 };
119
120 static struct spi_board_info mc13783_spi_dev __initdata = {
121         .modalias       = "mc13783",
122         .max_speed_hz   = 1000000,
123         .bus_num        = 1,
124         .chip_select    = 0,
125         .platform_data  = &mc13783_pdata,
126         .irq            = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
127 };
128
129 /*
130  * This structure defines the MX31 memory map.
131  */
132 static struct map_desc mx31lite_io_desc[] __initdata = {
133         {
134                 .virtual = SPBA0_BASE_ADDR_VIRT,
135                 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
136                 .length = SPBA0_SIZE,
137                 .type = MT_DEVICE_NONSHARED
138         }, {
139                 .virtual = CS4_BASE_ADDR_VIRT,
140                 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
141                 .length = CS4_SIZE,
142                 .type = MT_DEVICE
143         }
144 };
145
146 /*
147  * Set up static virtual mappings.
148  */
149 void __init mx31lite_map_io(void)
150 {
151         mx31_map_io();
152         iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
153 }
154
155 static int mx31lite_baseboard;
156 core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
157
158 static void __init mxc_board_init(void)
159 {
160         int ret;
161
162         switch (mx31lite_baseboard) {
163         case MX31LITE_NOBOARD:
164                 break;
165         case MX31LITE_DB:
166                 mx31lite_db_init();
167                 break;
168         default:
169                 printk(KERN_ERR "Illegal mx31lite_baseboard type %d\n",
170                                 mx31lite_baseboard);
171         }
172
173         mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
174                                       "mx31lite");
175
176         mxc_register_device(&mxc_nand_device, &mx31lite_nand_board_info);
177         mxc_register_device(&mxc_spi_device1, &spi1_pdata);
178         spi_register_board_info(&mc13783_spi_dev, 1);
179
180         /* SMSC9117 IRQ pin */
181         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
182         if (ret)
183                 pr_warning("could not get LAN irq gpio\n");
184         else {
185                 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
186                 platform_device_register(&smsc911x_device);
187         }
188 }
189
190 static void __init mx31lite_timer_init(void)
191 {
192         mx31_clocks_init(26000000);
193 }
194
195 struct sys_timer mx31lite_timer = {
196         .init   = mx31lite_timer_init,
197 };
198
199 MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
200         /* Maintainer: Freescale Semiconductor, Inc. */
201         .phys_io        = AIPS1_BASE_ADDR,
202         .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
203         .boot_params    = PHYS_OFFSET + 0x100,
204         .map_io         = mx31lite_map_io,
205         .init_irq       = mx31_init_irq,
206         .init_machine   = mxc_board_init,
207         .timer          = &mx31lite_timer,
208 MACHINE_END