2 * linux/arch/arm/mach-mmp/irq-mmp2.c
4 * Generic IRQ handling, GPIO IRQ demultiplexing, etc.
6 * Author: Haojian Zhuang <haojian.zhuang@marvell.com>
7 * Copyright: Marvell International Ltd.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/init.h>
15 #include <linux/irq.h>
18 #include <mach/regs-icu.h>
22 static void icu_mask_irq(unsigned int irq)
24 uint32_t r = __raw_readl(ICU_INT_CONF(irq));
26 r &= ~ICU_INT_ROUTE_PJ4_IRQ;
27 __raw_writel(r, ICU_INT_CONF(irq));
30 static void icu_unmask_irq(unsigned int irq)
32 uint32_t r = __raw_readl(ICU_INT_CONF(irq));
34 r |= ICU_INT_ROUTE_PJ4_IRQ;
35 __raw_writel(r, ICU_INT_CONF(irq));
38 static struct irq_chip icu_irq_chip = {
40 .mask_ack = icu_mask_irq,
41 .unmask = icu_unmask_irq,
44 #define SECOND_IRQ_MASK(_name_, irq_base, prefix) \
45 static void _name_##_mask_irq(unsigned int irq) \
48 r = __raw_readl(prefix##_MASK) | (1 << (irq - irq_base)); \
49 __raw_writel(r, prefix##_MASK); \
52 #define SECOND_IRQ_UNMASK(_name_, irq_base, prefix) \
53 static void _name_##_unmask_irq(unsigned int irq) \
56 r = __raw_readl(prefix##_MASK) & ~(1 << (irq - irq_base)); \
57 __raw_writel(r, prefix##_MASK); \
60 #define SECOND_IRQ_DEMUX(_name_, irq_base, prefix) \
61 static void _name_##_irq_demux(unsigned int irq, struct irq_desc *desc) \
63 unsigned long status, mask, n; \
64 mask = __raw_readl(prefix##_MASK); \
66 status = __raw_readl(prefix##_STATUS) & ~mask; \
69 n = find_first_bit(&status, BITS_PER_LONG); \
70 while (n < BITS_PER_LONG) { \
71 generic_handle_irq(irq_base + n); \
72 n = find_next_bit(&status, BITS_PER_LONG, n+1); \
77 #define SECOND_IRQ_CHIP(_name_, irq_base, prefix) \
78 SECOND_IRQ_MASK(_name_, irq_base, prefix) \
79 SECOND_IRQ_UNMASK(_name_, irq_base, prefix) \
80 SECOND_IRQ_DEMUX(_name_, irq_base, prefix) \
81 static struct irq_chip _name_##_irq_chip = { \
83 .mask_ack = _name_##_mask_irq, \
84 .unmask = _name_##_unmask_irq, \
87 SECOND_IRQ_CHIP(pmic, IRQ_MMP2_PMIC_BASE, MMP2_ICU_INT4);
88 SECOND_IRQ_CHIP(rtc, IRQ_MMP2_RTC_BASE, MMP2_ICU_INT5);
89 SECOND_IRQ_CHIP(twsi, IRQ_MMP2_TWSI_BASE, MMP2_ICU_INT17);
90 SECOND_IRQ_CHIP(misc, IRQ_MMP2_MISC_BASE, MMP2_ICU_INT35);
91 SECOND_IRQ_CHIP(ssp, IRQ_MMP2_SSP_BASE, MMP2_ICU_INT51);
93 static void init_mux_irq(struct irq_chip *chip, int start, int num)
97 for (irq = start; num > 0; irq++, num--) {
99 set_irq_chip(irq, chip);
100 set_irq_flags(irq, IRQF_VALID);
101 set_irq_handler(irq, handle_level_irq);
105 void __init mmp2_init_irq(void)
109 for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) {
111 set_irq_chip(irq, &icu_irq_chip);
112 set_irq_flags(irq, IRQF_VALID);
115 case IRQ_MMP2_PMIC_MUX:
116 case IRQ_MMP2_RTC_MUX:
117 case IRQ_MMP2_TWSI_MUX:
118 case IRQ_MMP2_MISC_MUX:
119 case IRQ_MMP2_SSP_MUX:
122 set_irq_handler(irq, handle_level_irq);
127 init_mux_irq(&pmic_irq_chip, IRQ_MMP2_PMIC_BASE, 2);
128 init_mux_irq(&rtc_irq_chip, IRQ_MMP2_RTC_BASE, 2);
129 init_mux_irq(&twsi_irq_chip, IRQ_MMP2_TWSI_BASE, 5);
130 init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15);
131 init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2);
133 set_irq_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux);
134 set_irq_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux);
135 set_irq_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux);
136 set_irq_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux);
137 set_irq_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux);