SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/staging/rtl8187se/r8180_core.c

   1 /*
   2    This is part of rtl818x pci OpenSource driver - v 0.1
   3    Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
   4    Released under the terms of GPL (General Public License)
   5
   6    Parts of this driver are based on the GPL part of the official
   7    Realtek driver.
   8
   9    Parts of this driver are based on the rtl8180 driver skeleton
  10    from Patric Schenke & Andres Salomon.
  11
  12    Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  13
  14    Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
  15
  16    RSSI calc function from 'The Deuce'
  17
  18    Some ideas borrowed from the 8139too.c driver included in linux kernel.
  19
  20    We (I?) want to thanks the Authors of those projecs and also the
  21    Ndiswrapper's project Authors.
  22
  23    A big big thanks goes also to Realtek corp. for their help in my attempt to
  24    add RTL8185 and RTL8225 support, and to David Young also.
  25
  26    Power management interface routines.
  27    Written by Mariusz Matuszek.
  28 */
  29
  30 #undef RX_DONT_PASS_UL
  31 #undef DUMMY_RX
  32
  33 #include <linux/syscalls.h>
  34 //#include <linux/fcntl.h>
  35 //#include <asm/uaccess.h>
  36 #include "r8180_hw.h"
  37 #include "r8180.h"
  38 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
  39 #include "r8180_93cx6.h"   /* Card EEPROM */
  40 #include "r8180_wx.h"
  41 #include "r8180_dm.h"
  42
  43 #include "ieee80211/dot11d.h"
  44
  45 #ifndef PCI_VENDOR_ID_BELKIN
  46         #define PCI_VENDOR_ID_BELKIN 0x1799
  47 #endif
  48 #ifndef PCI_VENDOR_ID_DLINK
  49         #define PCI_VENDOR_ID_DLINK 0x1186
  50 #endif
  51
  52 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
  53         {
  54                 .vendor = PCI_VENDOR_ID_REALTEK,
  55 //                .device = 0x8180,
  56                 .device = 0x8199,
  57                 .subvendor = PCI_ANY_ID,
  58                 .subdevice = PCI_ANY_ID,
  59                 .driver_data = 0,
  60         },
  61         {
  62                 .vendor = 0,
  63                 .device = 0,
  64                 .subvendor = 0,
  65                 .subdevice = 0,
  66                 .driver_data = 0,
  67         }
  68 };
  69
  70
  71 static char* ifname = "wlan%d";
  72 static int hwseqnum = 0;
  73 //static char* ifname = "ath%d";
  74 static int hwwep = 0;
  75 static int channels = 0x3fff;
  76
  77 #define eqMacAddr(a,b)          ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
  78 #define cpMacAddr(des,src)            ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
  79 MODULE_LICENSE("GPL");
  80 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
  81 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  82 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
  83
  84
  85
  86 /*
  87 MODULE_PARM(ifname, "s");
  88 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
  89
  90 MODULE_PARM(hwseqnum,"i");
  91 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
  92
  93 MODULE_PARM(hwwep,"i");
  94 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
  95
  96 MODULE_PARM(channels,"i");
  97 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
  98 */
  99
 100 module_param(ifname, charp, S_IRUGO|S_IWUSR );
 101 module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
 102 module_param(hwwep,int, S_IRUGO|S_IWUSR);
 103 module_param(channels,int, S_IRUGO|S_IWUSR);
 104
 105 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
 106 //MODULE_PARM_DESC(devname," Net interface name, ath%d=default");
 107 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
 108 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
 109 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
 110
 111
 112 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
 113                                        const struct pci_device_id *id);
 114
 115 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
 116
 117 static void rtl8180_shutdown (struct pci_dev *pdev)
 118 {
 119         struct net_device *dev = pci_get_drvdata(pdev);
 120         if (dev->netdev_ops->ndo_stop)
 121                 dev->netdev_ops->ndo_stop(dev);
 122         pci_disable_device(pdev);
 123 }
 124
 125 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
 126 {
 127         struct net_device *dev = pci_get_drvdata(pdev);
 128
 129         if (!netif_running(dev))
 130                 goto out_pci_suspend;
 131
 132         if (dev->netdev_ops->ndo_stop)
 133                 dev->netdev_ops->ndo_stop(dev);
 134
 135         netif_device_detach(dev);
 136
 137 out_pci_suspend:
 138         pci_save_state(pdev);
 139         pci_disable_device(pdev);
 140         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 141         return 0;
 142 }
 143
 144 static int rtl8180_resume(struct pci_dev *pdev)
 145 {
 146         struct net_device *dev = pci_get_drvdata(pdev);
 147         int err;
 148         u32 val;
 149
 150         pci_set_power_state(pdev, PCI_D0);
 151
 152         err = pci_enable_device(pdev);
 153         if (err) {
 154                 printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
 155                                 dev->name);
 156
 157                 return err;
 158         }
 159
 160         pci_restore_state(pdev);
 161
 162         /*
 163          * Suspend/Resume resets the PCI configuration space, so we have to
 164          * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
 165          * from interfering with C3 CPU state. pci_restore_state won't help
 166          * here since it only restores the first 64 bytes pci config header.
 167          */
 168         pci_read_config_dword(pdev, 0x40, &val);
 169         if ((val & 0x0000ff00) != 0)
 170                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
 171
 172         if (!netif_running(dev))
 173                 goto out;
 174
 175         if (dev->netdev_ops->ndo_open)
 176                 dev->netdev_ops->ndo_open(dev);
 177
 178         netif_device_attach(dev);
 179 out:
 180         return 0;
 181 }
 182
 183 static struct pci_driver rtl8180_pci_driver = {
 184         .name           = RTL8180_MODULE_NAME,            /* Driver name   */
 185         .id_table       = rtl8180_pci_id_tbl,             /* PCI_ID table  */
 186         .probe          = rtl8180_pci_probe,              /* probe fn      */
 187         .remove         = __devexit_p(rtl8180_pci_remove),/* remove fn     */
 188         .suspend        = rtl8180_suspend,                /* PM suspend fn */
 189         .resume         = rtl8180_resume,                 /* PM resume fn  */
 190         .shutdown       = rtl8180_shutdown,
 191 };
 192
 193
 194
 195
 196 u8 read_nic_byte(struct net_device *dev, int x)
 197 {
 198         return 0xff&readb((u8*)dev->mem_start +x);
 199 }
 200
 201 u32 read_nic_dword(struct net_device *dev, int x)
 202 {
 203         return readl((u8*)dev->mem_start +x);
 204 }
 205
 206 u16 read_nic_word(struct net_device *dev, int x)
 207 {
 208         return readw((u8*)dev->mem_start +x);
 209 }
 210
 211 void write_nic_byte(struct net_device *dev, int x,u8 y)
 212 {
 213         writeb(y,(u8*)dev->mem_start +x);
 214         udelay(20);
 215 }
 216
 217 void write_nic_dword(struct net_device *dev, int x,u32 y)
 218 {
 219         writel(y,(u8*)dev->mem_start +x);
 220         udelay(20);
 221 }
 222
 223 void write_nic_word(struct net_device *dev, int x,u16 y)
 224 {
 225         writew(y,(u8*)dev->mem_start +x);
 226         udelay(20);
 227 }
 228
 229
 230
 231
 232
 233
 234 inline void force_pci_posting(struct net_device *dev)
 235 {
 236         read_nic_byte(dev,EPROM_CMD);
 237         mb();
 238 }
 239
 240
 241 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
 242 void set_nic_rxring(struct net_device *dev);
 243 void set_nic_txring(struct net_device *dev);
 244 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
 245 void rtl8180_commit(struct net_device *dev);
 246 void rtl8180_start_tx_beacon(struct net_device *dev);
 247
 248 /****************************************************************************
 249    -----------------------------PROCFS STUFF-------------------------
 250 *****************************************************************************/
 251
 252 static struct proc_dir_entry *rtl8180_proc = NULL;
 253
 254 static int proc_get_registers(char *page, char **start,
 255                           off_t offset, int count,
 256                           int *eof, void *data)
 257 {
 258         struct net_device *dev = data;
 259 //      struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 260
 261         int len = 0;
 262         int i,n;
 263
 264         int max=0xff;
 265
 266         /* This dump the current register page */
 267         for(n=0;n<=max;)
 268         {
 269                 //printk( "\nD: %2x> ", n);
 270                 len += snprintf(page + len, count - len,
 271                         "\nD:  %2x > ",n);
 272
 273                 for(i=0;i<16 && n<=max;i++,n++)
 274                 len += snprintf(page + len, count - len,
 275                         "%2x ",read_nic_byte(dev,n));
 276
 277                 //      printk("%2x ",read_nic_byte(dev,n));
 278         }
 279         len += snprintf(page + len, count - len,"\n");
 280
 281
 282
 283         *eof = 1;
 284         return len;
 285
 286 }
 287
 288 int get_curr_tx_free_desc(struct net_device *dev, int priority);
 289
 290 static int proc_get_stats_hw(char *page, char **start,
 291                           off_t offset, int count,
 292                           int *eof, void *data)
 293 {
 294         //struct net_device *dev = data;
 295         //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 296
 297         int len = 0;
 298
 299         *eof = 1;
 300         return len;
 301 }
 302
 303
 304 static int proc_get_stats_rx(char *page, char **start,
 305                           off_t offset, int count,
 306                           int *eof, void *data)
 307 {
 308         struct net_device *dev = data;
 309         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 310
 311         int len = 0;
 312
 313         len += snprintf(page + len, count - len,
 314         /*      "RX descriptor not available: %lu\n"
 315                 "RX incomplete (missing last descriptor): %lu\n"
 316                 "RX not data: %lu\n"
 317                 //"RX descriptor pointer reset: %lu\n"
 318                 "RX descriptor pointer lost: %lu\n"
 319                 //"RX pointer workaround: %lu\n"
 320                 "RX error int: %lu\n"
 321                 "RX fifo overflow: %lu\n"
 322                 "RX int: %lu\n"
 323                 "RX packet: %lu\n"
 324                 "RX bytes: %lu\n"
 325                 "RX DMA fail: %lu\n",
 326                 priv->stats.rxrdu,
 327                 priv->stats.rxnolast,
 328                 priv->stats.rxnodata,
 329                 //priv->stats.rxreset,
 330                 priv->stats.rxnopointer,
 331                 //priv->stats.rxwrkaround,
 332                 priv->stats.rxerr,
 333                 priv->stats.rxoverflow,
 334                 priv->stats.rxint,
 335                 priv->ieee80211->stats.rx_packets,
 336                 priv->ieee80211->stats.rx_bytes,
 337                 priv->stats.rxdmafail  */
 338                 "RX OK: %lu\n"
 339                 "RX Retry: %lu\n"
 340                 "RX CRC Error(0-500): %lu\n"
 341                 "RX CRC Error(500-1000): %lu\n"
 342                 "RX CRC Error(>1000): %lu\n"
 343                 "RX ICV Error: %lu\n",
 344                 priv->stats.rxint,
 345                 priv->stats.rxerr,
 346                 priv->stats.rxcrcerrmin,
 347                 priv->stats.rxcrcerrmid,
 348                 priv->stats.rxcrcerrmax,
 349                 priv->stats.rxicverr
 350                 );
 351
 352         *eof = 1;
 353         return len;
 354 }
 355
 356 static int proc_get_stats_tx(char *page, char **start,
 357                           off_t offset, int count,
 358                           int *eof, void *data)
 359 {
 360         struct net_device *dev = data;
 361         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 362
 363         int len = 0;
 364         unsigned long totalOK;
 365
 366         totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
 367         len += snprintf(page + len, count - len,
 368         /*      "TX normal priority ok int: %lu\n"
 369                 "TX normal priority error int: %lu\n"
 370                 "TX high priority ok int: %lu\n"
 371                 "TX high priority failed error int: %lu\n"
 372                 "TX low priority ok int: %lu\n"
 373                 "TX low priority failed error int: %lu\n"
 374                 "TX bytes: %lu\n"
 375                 "TX packets: %lu\n"
 376                 "TX queue resume: %lu\n"
 377                 "TX queue stopped?: %d\n"
 378                 "TX fifo overflow: %lu\n"
 379                 //"SW TX stop: %lu\n"
 380                 //"SW TX wake: %lu\n"
 381                 "TX beacon: %lu\n"
 382                 "TX beacon aborted: %lu\n",
 383                 priv->stats.txnpokint,
 384                 priv->stats.txnperr,
 385                 priv->stats.txhpokint,
 386                 priv->stats.txhperr,
 387                 priv->stats.txlpokint,
 388                 priv->stats.txlperr,
 389                 priv->ieee80211->stats.tx_bytes,
 390                 priv->ieee80211->stats.tx_packets,
 391                 priv->stats.txresumed,
 392                 netif_queue_stopped(dev),
 393                 priv->stats.txoverflow,
 394                 //priv->ieee80211->ieee_stats.swtxstop,
 395                 //priv->ieee80211->ieee_stats.swtxawake,
 396                 priv->stats.txbeacon,
 397                 priv->stats.txbeaconerr  */
 398                 "TX OK: %lu\n"
 399                 "TX Error: %lu\n"
 400                 "TX Retry: %lu\n"
 401                 "TX beacon OK: %lu\n"
 402                 "TX beacon error: %lu\n",
 403                 totalOK,
 404                 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
 405                 priv->stats.txretry,
 406                 priv->stats.txbeacon,
 407                 priv->stats.txbeaconerr
 408         );
 409
 410         *eof = 1;
 411         return len;
 412 }
 413
 414 void rtl8180_proc_module_init(void)
 415 {
 416         DMESG("Initializing proc filesystem");
 417         rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
 418 }
 419
 420
 421 void rtl8180_proc_module_remove(void)
 422 {
 423         remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
 424 }
 425
 426
 427 void rtl8180_proc_remove_one(struct net_device *dev)
 428 {
 429         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 430         if (priv->dir_dev) {
 431                 remove_proc_entry("stats-hw", priv->dir_dev);
 432                 remove_proc_entry("stats-tx", priv->dir_dev);
 433                 remove_proc_entry("stats-rx", priv->dir_dev);
 434 //              remove_proc_entry("stats-ieee", priv->dir_dev);
 435 //              remove_proc_entry("stats-ap", priv->dir_dev);
 436                 remove_proc_entry("registers", priv->dir_dev);
 437                 remove_proc_entry(dev->name, rtl8180_proc);
 438                 priv->dir_dev = NULL;
 439         }
 440 }
 441
 442
 443 void rtl8180_proc_init_one(struct net_device *dev)
 444 {
 445         struct proc_dir_entry *e;
 446         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 447         priv->dir_dev = rtl8180_proc;
 448         if (!priv->dir_dev) {
 449                 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
 450                       dev->name);
 451                 return;
 452         }
 453
 454         e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
 455                                    priv->dir_dev, proc_get_stats_hw, dev);
 456
 457         if (!e) {
 458                 DMESGE("Unable to initialize "
 459                       "/proc/net/r8180/%s/stats-hw\n",
 460                       dev->name);
 461         }
 462
 463         e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
 464                                    priv->dir_dev, proc_get_stats_rx, dev);
 465
 466         if (!e) {
 467                 DMESGE("Unable to initialize "
 468                       "/proc/net/r8180/%s/stats-rx\n",
 469                       dev->name);
 470         }
 471
 472
 473         e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
 474                                    priv->dir_dev, proc_get_stats_tx, dev);
 475
 476         if (!e) {
 477                 DMESGE("Unable to initialize "
 478                       "/proc/net/r8180/%s/stats-tx\n",
 479                       dev->name);
 480         }
 481
 482         e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
 483                                    priv->dir_dev, proc_get_registers, dev);
 484
 485         if (!e) {
 486                 DMESGE("Unable to initialize "
 487                       "/proc/net/r8180/%s/registers\n",
 488                       dev->name);
 489         }
 490 }
 491 /****************************************************************************
 492    -----------------------------MISC STUFF-------------------------
 493 *****************************************************************************/
 494 /*
 495   FIXME: check if we can use some standard already-existent
 496   data type+functions in kernel
 497 */
 498
 499 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
 500                 struct buffer **bufferhead)
 501 {
 502         struct buffer *tmp;
 503
 504         if(! *buffer){
 505
 506                 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL);
 507
 508                 if (*buffer == NULL) {
 509                         DMESGE("Failed to kmalloc head of TX/RX struct");
 510                         return -1;
 511                 }
 512                 (*buffer)->next=*buffer;
 513                 (*buffer)->buf=buf;
 514                 (*buffer)->dma=dma;
 515                 if(bufferhead !=NULL)
 516                         (*bufferhead) = (*buffer);
 517                 return 0;
 518         }
 519         tmp=*buffer;
 520
 521         while(tmp->next!=(*buffer)) tmp=tmp->next;
 522         if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){
 523                 DMESGE("Failed to kmalloc TX/RX struct");
 524                 return -1;
 525         }
 526         tmp->next->buf=buf;
 527         tmp->next->dma=dma;
 528         tmp->next->next=*buffer;
 529
 530         return 0;
 531 }
 532
 533
 534 void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short
 535 consistent)
 536 {
 537
 538         struct buffer *tmp,*next;
 539         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 540         struct pci_dev *pdev=priv->pdev;
 541         //int i;
 542
 543         if(! *buffer) return;
 544
 545         /*for(tmp=*buffer; tmp->next != *buffer; tmp=tmp->next)
 546
 547         */
 548         tmp=*buffer;
 549         do{
 550                 next=tmp->next;
 551                 if(consistent){
 552                         pci_free_consistent(pdev,len,
 553                                     tmp->buf,tmp->dma);
 554                 }else{
 555                         pci_unmap_single(pdev, tmp->dma,
 556                         len,PCI_DMA_FROMDEVICE);
 557                         kfree(tmp->buf);
 558                 }
 559                 kfree(tmp);
 560                 tmp = next;
 561         }
 562         while(next != *buffer);
 563
 564         *buffer=NULL;
 565 }
 566
 567
 568 void print_buffer(u32 *buffer, int len)
 569 {
 570         int i;
 571         u8 *buf =(u8*)buffer;
 572
 573         printk("ASCII BUFFER DUMP (len: %x):\n",len);
 574
 575         for(i=0;i<len;i++)
 576                 printk("%c",buf[i]);
 577
 578         printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
 579
 580         for(i=0;i<len;i++)
 581                 printk("%02x",buf[i]);
 582
 583         printk("\n");
 584 }
 585
 586
 587 int get_curr_tx_free_desc(struct net_device *dev, int priority)
 588 {
 589         struct r8180_priv *priv = ieee80211_priv(dev);
 590         u32* tail;
 591         u32* head;
 592         int ret;
 593
 594         switch (priority){
 595                 case MANAGE_PRIORITY:
 596                         head = priv->txmapringhead;
 597                         tail = priv->txmapringtail;
 598                         break;
 599                 case BK_PRIORITY:
 600                         head = priv->txbkpringhead;
 601                         tail = priv->txbkpringtail;
 602                         break;
 603                 case BE_PRIORITY:
 604                         head = priv->txbepringhead;
 605                         tail = priv->txbepringtail;
 606                         break;
 607                 case VI_PRIORITY:
 608                         head = priv->txvipringhead;
 609                         tail = priv->txvipringtail;
 610                         break;
 611                 case VO_PRIORITY:
 612                         head = priv->txvopringhead;
 613                         tail = priv->txvopringtail;
 614                         break;
 615                 case HI_PRIORITY:
 616                         head = priv->txhpringhead;
 617                         tail = priv->txhpringtail;
 618                         break;
 619                 default:
 620                         return -1;
 621         }
 622
 623         //DMESG("%x %x", head, tail);
 624
 625         /* FIXME FIXME FIXME FIXME */
 626
 627         if( head <= tail )
 628                 ret = priv->txringcount - (tail - head)/8;
 629         else
 630                 ret = (head - tail)/8;
 631
 632         if(ret > priv->txringcount ) DMESG("BUG");
 633         return ret;
 634 }
 635
 636
 637 short check_nic_enought_desc(struct net_device *dev, int priority)
 638 {
 639         struct r8180_priv *priv = ieee80211_priv(dev);
 640         struct ieee80211_device *ieee = netdev_priv(dev);
 641
 642         int requiredbyte, required;
 643         requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
 644
 645         if(ieee->current_network.QoS_Enable) {
 646                 requiredbyte += 2;
 647         };
 648
 649         required = requiredbyte / (priv->txbuffsize-4);
 650         if (requiredbyte % priv->txbuffsize) required++;
 651         /* for now we keep two free descriptor as a safety boundary
 652          * between the tail and the head
 653          */
 654
 655         return (required+2 < get_curr_tx_free_desc(dev,priority));
 656 }
 657
 658 void fix_tx_fifo(struct net_device *dev)
 659 {
 660         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 661         u32 *tmp;
 662         int i;
 663
 664         for (tmp=priv->txmapring, i=0;
 665              i < priv->txringcount;
 666              tmp+=8, i++){
 667                 *tmp = *tmp &~ (1<<31);
 668         }
 669
 670         for (tmp=priv->txbkpring, i=0;
 671              i < priv->txringcount;
 672              tmp+=8, i++) {
 673                 *tmp = *tmp &~ (1<<31);
 674         }
 675
 676         for (tmp=priv->txbepring, i=0;
 677              i < priv->txringcount;
 678              tmp+=8, i++){
 679                 *tmp = *tmp &~ (1<<31);
 680         }
 681         for (tmp=priv->txvipring, i=0;
 682              i < priv->txringcount;
 683              tmp+=8, i++) {
 684                 *tmp = *tmp &~ (1<<31);
 685         }
 686
 687         for (tmp=priv->txvopring, i=0;
 688              i < priv->txringcount;
 689              tmp+=8, i++){
 690                 *tmp = *tmp &~ (1<<31);
 691         }
 692
 693         for (tmp=priv->txhpring, i=0;
 694              i < priv->txringcount;
 695              tmp+=8,i++){
 696                 *tmp = *tmp &~ (1<<31);
 697         }
 698
 699         for (tmp=priv->txbeaconring, i=0;
 700              i < priv->txbeaconcount;
 701              tmp+=8, i++){
 702                 *tmp = *tmp &~ (1<<31);
 703         }
 704
 705         priv->txmapringtail = priv->txmapring;
 706         priv->txmapringhead = priv->txmapring;
 707         priv->txmapbufstail = priv->txmapbufs;
 708
 709         priv->txbkpringtail = priv->txbkpring;
 710         priv->txbkpringhead = priv->txbkpring;
 711         priv->txbkpbufstail = priv->txbkpbufs;
 712
 713         priv->txbepringtail = priv->txbepring;
 714         priv->txbepringhead = priv->txbepring;
 715         priv->txbepbufstail = priv->txbepbufs;
 716
 717         priv->txvipringtail = priv->txvipring;
 718         priv->txvipringhead = priv->txvipring;
 719         priv->txvipbufstail = priv->txvipbufs;
 720
 721         priv->txvopringtail = priv->txvopring;
 722         priv->txvopringhead = priv->txvopring;
 723         priv->txvopbufstail = priv->txvopbufs;
 724
 725         priv->txhpringtail = priv->txhpring;
 726         priv->txhpringhead = priv->txhpring;
 727         priv->txhpbufstail = priv->txhpbufs;
 728
 729         priv->txbeaconringtail = priv->txbeaconring;
 730         priv->txbeaconbufstail = priv->txbeaconbufs;
 731         set_nic_txring(dev);
 732
 733         ieee80211_reset_queue(priv->ieee80211);
 734         priv->ack_tx_to_ieee = 0;
 735 }
 736
 737
 738 void fix_rx_fifo(struct net_device *dev)
 739 {
 740         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 741         u32 *tmp;
 742         struct buffer *rxbuf;
 743         u8 rx_desc_size;
 744
 745         rx_desc_size = 8; // 4*8 = 32 bytes
 746
 747         for (tmp=priv->rxring, rxbuf=priv->rxbufferhead;
 748              (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
 749              tmp+=rx_desc_size,rxbuf=rxbuf->next){
 750                 *(tmp+2) = rxbuf->dma;
 751                 *tmp=*tmp &~ 0xfff;
 752                 *tmp=*tmp | priv->rxbuffersize;
 753                 *tmp |= (1<<31);
 754         }
 755
 756         priv->rxringtail=priv->rxring;
 757         priv->rxbuffer=priv->rxbufferhead;
 758         priv->rx_skb_complete=1;
 759         set_nic_rxring(dev);
 760 }
 761
 762
 763 /****************************************************************************
 764       ------------------------------HW STUFF---------------------------
 765 *****************************************************************************/
 766
 767 unsigned char QUALITY_MAP[] = {
 768   0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
 769   0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
 770   0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
 771   0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
 772   0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
 773   0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
 774   0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
 775   0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
 776   0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
 777   0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
 778 };
 779
 780 unsigned char STRENGTH_MAP[] = {
 781   0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
 782   0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
 783   0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
 784   0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
 785   0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
 786   0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
 787   0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
 788   0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
 789   0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
 790   0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
 791 };
 792
 793 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual){
 794         //void Mlme_UpdateRssiSQ(struct net_device *dev, u8 *rssi, u8 *qual){
 795         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 796         u32 temp;
 797         u32 temp2;
 798         u32 temp3;
 799         u32 lsb;
 800         u32 q;
 801         u32 orig_qual;
 802         u8  _rssi;
 803
 804         q = *qual;
 805         orig_qual = *qual;
 806         _rssi = 0; // avoid gcc complains..
 807
 808         if (q <= 0x4e) {
 809                 temp = QUALITY_MAP[q];
 810         } else {
 811                 if( q & 0x80 ) {
 812                         temp = 0x32;
 813                 } else {
 814                         temp = 1;
 815                 }
 816         }
 817
 818         *qual = temp;
 819         temp2 = *rssi;
 820
 821         switch(priv->rf_chip){
 822         case RFCHIPID_RFMD:
 823                 lsb = temp2 & 1;
 824                 temp2 &= 0x7e;
 825                 if ( !lsb || !(temp2 <= 0x3c) ) {
 826                         temp2 = 0x64;
 827                 } else {
 828                         temp2 = 100 * temp2 / 0x3c;
 829                 }
 830                 *rssi = temp2 & 0xff;
 831                 _rssi = temp2 & 0xff;
 832                 break;
 833         case RFCHIPID_INTERSIL:
 834                 lsb = temp2;
 835                 temp2 &= 0xfffffffe;
 836                 temp2 *= 251;
 837                 temp3 = temp2;
 838                 temp2 <<= 6;
 839                 temp3 += temp2;
 840                 temp3 <<= 1;
 841                 temp2 = 0x4950df;
 842                 temp2 -= temp3;
 843                 lsb &= 1;
 844                 if ( temp2 <= 0x3e0000 ) {
 845                         if ( temp2 < 0xffef0000 )
 846                                 temp2 = 0xffef0000;
 847                 } else {
 848                         temp2 = 0x3e0000;
 849                 }
 850                 if ( !lsb ) {
 851                         temp2 -= 0xf0000;
 852                 } else {
 853                         temp2 += 0xf0000;
 854                 }
 855
 856                 temp3 = 0x4d0000;
 857                 temp3 -= temp2;
 858                 temp3 *= 100;
 859                 temp3 = temp3 / 0x6d;
 860                 temp3 >>= 0x10;
 861                 _rssi = temp3 & 0xff;
 862                 *rssi = temp3 & 0xff;
 863                 break;
 864         case RFCHIPID_GCT:
 865                 lsb = temp2 & 1;
 866                 temp2 &= 0x7e;
 867                 if ( ! lsb || !(temp2 <= 0x3c) ){
 868                         temp2 = 0x64;
 869                 } else {
 870                         temp2 = (100 * temp2) / 0x3c;
 871                 }
 872                 *rssi = temp2 & 0xff;
 873                 _rssi = temp2 & 0xff;
 874                 break;
 875         case RFCHIPID_PHILIPS:
 876                 if( orig_qual <= 0x4e ){
 877                         _rssi = STRENGTH_MAP[orig_qual];
 878                         *rssi = _rssi;
 879                 } else {
 880                         orig_qual -= 0x80;
 881                         if ( !orig_qual ){
 882                                 _rssi = 1;
 883                                 *rssi = 1;
 884                         } else {
 885                                 _rssi = 0x32;
 886                                 *rssi = 0x32;
 887                         }
 888                 }
 889                 break;
 890
 891         /* case 4 */
 892         case RFCHIPID_MAXIM:
 893                 lsb = temp2 & 1;
 894                 temp2 &= 0x7e;
 895                 temp2 >>= 1;
 896                 temp2 += 0x42;
 897                 if( lsb != 0 ){
 898                         temp2 += 0xa;
 899                 }
 900                 *rssi = temp2 & 0xff;
 901                 _rssi = temp2 & 0xff;
 902                 break;
 903         }
 904
 905         if ( _rssi < 0x64 ){
 906                 if ( _rssi == 0 ) {
 907                         *rssi = 1;
 908                 }
 909         } else {
 910                 *rssi = 0x64;
 911         }
 912
 913         return;
 914 }
 915
 916
 917 void rtl8180_irq_enable(struct net_device *dev)
 918 {
 919         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 920         priv->irq_enabled = 1;
 921 /*
 922         write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\
 923         INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\
 924         INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\
 925         INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
 926 */
 927         write_nic_word(dev,INTA_MASK, priv->irq_mask);
 928 }
 929
 930
 931 void rtl8180_irq_disable(struct net_device *dev)
 932 {
 933         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 934
 935         write_nic_dword(dev,IMR,0);
 936         force_pci_posting(dev);
 937         priv->irq_enabled = 0;
 938 }
 939
 940
 941 void rtl8180_set_mode(struct net_device *dev,int mode)
 942 {
 943         u8 ecmd;
 944         ecmd=read_nic_byte(dev, EPROM_CMD);
 945         ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
 946         ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
 947         ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
 948         ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
 949         write_nic_byte(dev, EPROM_CMD, ecmd);
 950 }
 951
 952 void rtl8180_adapter_start(struct net_device *dev);
 953 void rtl8180_beacon_tx_enable(struct net_device *dev);
 954
 955 void rtl8180_update_msr(struct net_device *dev)
 956 {
 957         struct r8180_priv *priv = ieee80211_priv(dev);
 958         u8 msr;
 959         u32 rxconf;
 960
 961         msr  = read_nic_byte(dev, MSR);
 962         msr &= ~ MSR_LINK_MASK;
 963
 964         rxconf=read_nic_dword(dev,RX_CONF);
 965
 966         if(priv->ieee80211->state == IEEE80211_LINKED)
 967         {
 968                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
 969                         msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
 970                 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
 971                         msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
 972                 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
 973                         msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
 974                 else
 975                         msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 976                 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
 977
 978         }else {
 979                 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 980                 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
 981         }
 982
 983         write_nic_byte(dev, MSR, msr);
 984         write_nic_dword(dev, RX_CONF, rxconf);
 985
 986 }
 987
 988
 989
 990 void rtl8180_set_chan(struct net_device *dev,short ch)
 991 {
 992         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 993
 994         if((ch > 14) || (ch < 1))
 995         {
 996                 printk("In %s: Invalid chnanel %d\n", __func__, ch);
 997                 return;
 998         }
 999
1000         priv->chan=ch;
1001         //printk("in %s:channel is %d\n",__func__,ch);
1002         priv->rf_set_chan(dev,priv->chan);
1003
1004 }
1005
1006
1007 void rtl8180_rx_enable(struct net_device *dev)
1008 {
1009         u8 cmd;
1010         u32 rxconf;
1011         /* for now we accept data, management & ctl frame*/
1012         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1013
1014         rxconf=read_nic_dword(dev,RX_CONF);
1015         rxconf = rxconf &~ MAC_FILTER_MASK;
1016         rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
1017         rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
1018         rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
1019         rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
1020 //      rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1021         if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode");
1022
1023         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1024            dev->flags & IFF_PROMISC){
1025                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1026         }else{
1027                 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
1028                 if(priv->card_8185 == 0)
1029                         rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1030         }
1031
1032         /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1033                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1034                 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1035         }*/
1036
1037         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1038                 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
1039                 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
1040                 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
1041         }
1042
1043         if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1044                 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1045
1046         //if(!priv->card_8185){
1047                 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1048                 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1049         //}
1050
1051         rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1052         rxconf = rxconf &~ MAX_RX_DMA_MASK;
1053         rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
1054
1055         //if(!priv->card_8185)
1056                 rxconf = rxconf | RCR_ONLYERLPKT;
1057
1058         rxconf = rxconf &~ RCR_CS_MASK;
1059         if(!priv->card_8185)
1060                 rxconf |= (priv->rcr_csense<<RCR_CS_SHIFT);
1061 //      rxconf &=~ 0xfff00000;
1062 //      rxconf |= 0x90100000;//9014f76f;
1063         write_nic_dword(dev, RX_CONF, rxconf);
1064
1065         fix_rx_fifo(dev);
1066
1067         cmd=read_nic_byte(dev,CMD);
1068         write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
1069
1070         /* In rtl8139 driver seems that DMA threshold has to be written
1071          *  after enabling RX, so we rewrite RX_CONFIG register
1072          */
1073         //mdelay(100);
1074 //      write_nic_dword(dev, RX_CONF, rxconf);
1075
1076 }
1077
1078
1079 void set_nic_txring(struct net_device *dev)
1080 {
1081         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1082 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1083
1084         write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
1085 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1086         write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
1087 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1088         write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
1089 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1090         write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
1091 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1092         write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
1093 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1094         write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
1095 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1096
1097         write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
1098 }
1099
1100
1101 void rtl8180_conttx_enable(struct net_device *dev)
1102 {
1103         u32 txconf;
1104         txconf = read_nic_dword(dev,TX_CONF);
1105         txconf = txconf &~ TX_LOOPBACK_MASK;
1106         txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT);
1107         write_nic_dword(dev,TX_CONF,txconf);
1108 }
1109
1110
1111 void rtl8180_conttx_disable(struct net_device *dev)
1112 {
1113         u32 txconf;
1114         txconf = read_nic_dword(dev,TX_CONF);
1115         txconf = txconf &~ TX_LOOPBACK_MASK;
1116         txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1117         write_nic_dword(dev,TX_CONF,txconf);
1118 }
1119
1120
1121 void rtl8180_tx_enable(struct net_device *dev)
1122 {
1123         u8 cmd;
1124         u8 tx_agc_ctl;
1125         u8 byte;
1126         u32 txconf;
1127         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1128         txconf= read_nic_dword(dev,TX_CONF);
1129
1130
1131         if(priv->card_8185){
1132
1133
1134                 byte = read_nic_byte(dev,CW_CONF);
1135                 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
1136                 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
1137                 write_nic_byte(dev, CW_CONF, byte);
1138
1139                 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
1140                 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
1141                 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
1142                 tx_agc_ctl |=(1<<TX_AGC_CTL_FEEDBACK_ANT);
1143                 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
1144                 /*
1145                 write_nic_word(dev, 0x5e, 0x01);
1146                 force_pci_posting(dev);
1147                 mdelay(1);
1148                 write_nic_word(dev, 0xfe, 0x10);
1149                 force_pci_posting(dev);
1150                 mdelay(1);
1151                 write_nic_word(dev, 0x5e, 0x00);
1152                 force_pci_posting(dev);
1153                 mdelay(1);
1154                 */
1155                 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
1156         }
1157
1158         if(priv->card_8185){
1159
1160                 txconf = txconf &~ (1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
1161
1162         }else{
1163
1164                 if(hwseqnum)
1165                         txconf= txconf &~ (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1166                 else
1167                         txconf= txconf | (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1168         }
1169
1170         txconf = txconf &~ TX_LOOPBACK_MASK;
1171         txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1172         txconf = txconf &~ TCR_DPRETRY_MASK;
1173         txconf = txconf &~ TCR_RTSRETRY_MASK;
1174         txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
1175         txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
1176         txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
1177
1178         if(priv->card_8185){
1179                 if(priv->hw_plcp_len)
1180                         txconf = txconf &~ TCR_PLCP_LEN;
1181                 else
1182                         txconf = txconf | TCR_PLCP_LEN;
1183         }else{
1184                 txconf = txconf &~ TCR_SAT;
1185         }
1186         txconf = txconf &~ TCR_MXDMA_MASK;
1187         txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
1188         txconf = txconf | TCR_CWMIN;
1189         txconf = txconf | TCR_DISCW;
1190
1191 //      if(priv->ieee80211->hw_wep)
1192 //              txconf=txconf &~ (1<<TX_NOICV_SHIFT);
1193 //      else
1194                 txconf=txconf | (1<<TX_NOICV_SHIFT);
1195
1196         write_nic_dword(dev,TX_CONF,txconf);
1197
1198
1199         fix_tx_fifo(dev);
1200
1201         cmd=read_nic_byte(dev,CMD);
1202         write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
1203
1204 //      mdelay(100);
1205         write_nic_dword(dev,TX_CONF,txconf);
1206 //      #endif
1207 /*
1208         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1209         write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask);
1210         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1211         */
1212 }
1213
1214
1215 void rtl8180_beacon_tx_enable(struct net_device *dev)
1216 {
1217         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1218
1219         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1220         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
1221         write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
1222         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1223 }
1224
1225
1226 void rtl8180_beacon_tx_disable(struct net_device *dev)
1227 {
1228         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1229
1230         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1231         priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
1232         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1233         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1234
1235 }
1236
1237
1238 void rtl8180_rtx_disable(struct net_device *dev)
1239 {
1240         u8 cmd;
1241         struct r8180_priv *priv = ieee80211_priv(dev);
1242
1243         cmd=read_nic_byte(dev,CMD);
1244         write_nic_byte(dev, CMD, cmd &~ \
1245                        ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
1246         force_pci_posting(dev);
1247         mdelay(10);
1248         /*while (read_nic_byte(dev,CMD) & (1<<CMD_RX_ENABLE_SHIFT))
1249           udelay(10);
1250         */
1251
1252         if(!priv->rx_skb_complete)
1253                 dev_kfree_skb_any(priv->rx_skb);
1254 }
1255
1256 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
1257                          int addr)
1258 {
1259         int i;
1260         u32 *desc;
1261         u32 *tmp;
1262         dma_addr_t dma_desc, dma_tmp;
1263         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1264         struct pci_dev *pdev = priv->pdev;
1265         void *buf;
1266
1267         if((bufsize & 0xfff) != bufsize) {
1268                 DMESGE ("TX buffer allocation too large");
1269                 return 0;
1270         }
1271         desc = (u32*)pci_alloc_consistent(pdev,
1272                                           sizeof(u32)*8*count+256, &dma_desc);
1273         if(desc==NULL) return -1;
1274         if(dma_desc & 0xff){
1275
1276                 /*
1277                  * descriptor's buffer must be 256 byte aligned
1278                  * we shouldn't be here, since we set DMA mask !
1279                  */
1280                 WARN(1, "DMA buffer is not aligned\n");
1281         }
1282         tmp=desc;
1283         for (i=0;i<count;i++)
1284         {
1285                 buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1286                 if (buf == NULL) return -ENOMEM;
1287
1288                 switch(addr) {
1289                 case TX_MANAGEPRIORITY_RING_ADDR:
1290                         if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){
1291                                 DMESGE("Unable to allocate mem for buffer NP");
1292                                 return -ENOMEM;
1293                         }
1294                         break;
1295
1296                 case TX_BKPRIORITY_RING_ADDR:
1297                         if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){
1298                                 DMESGE("Unable to allocate mem for buffer LP");
1299                                 return -ENOMEM;
1300                         }
1301                         break;
1302                 case TX_BEPRIORITY_RING_ADDR:
1303                         if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){
1304                                 DMESGE("Unable to allocate mem for buffer NP");
1305                                 return -ENOMEM;
1306                         }
1307                         break;
1308
1309                 case TX_VIPRIORITY_RING_ADDR:
1310                         if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){
1311                                 DMESGE("Unable to allocate mem for buffer LP");
1312                                 return -ENOMEM;
1313                         }
1314                         break;
1315                 case TX_VOPRIORITY_RING_ADDR:
1316                         if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){
1317                                 DMESGE("Unable to allocate mem for buffer NP");
1318                                 return -ENOMEM;
1319                         }
1320                         break;
1321                 case TX_HIGHPRIORITY_RING_ADDR:
1322                         if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1323                                 DMESGE("Unable to allocate mem for buffer HP");
1324                                 return -ENOMEM;
1325                         }
1326                         break;
1327                 case TX_BEACON_RING_ADDR:
1328                         if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){
1329                         DMESGE("Unable to allocate mem for buffer BP");
1330                                 return -ENOMEM;
1331                         }
1332                         break;
1333                 }
1334                 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1335                 *(tmp+2) = (u32)dma_tmp;
1336                 *(tmp+3) = bufsize;
1337
1338                 if(i+1<count)
1339                         *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1340                 else
1341                         *(tmp+4) = (u32)dma_desc;
1342
1343                 tmp=tmp+8;
1344         }
1345
1346         switch(addr) {
1347         case TX_MANAGEPRIORITY_RING_ADDR:
1348                 priv->txmapringdma=dma_desc;
1349                 priv->txmapring=desc;
1350                 break;
1351
1352         case TX_BKPRIORITY_RING_ADDR:
1353                 priv->txbkpringdma=dma_desc;
1354                 priv->txbkpring=desc;
1355                 break;
1356
1357         case TX_BEPRIORITY_RING_ADDR:
1358                 priv->txbepringdma=dma_desc;
1359                 priv->txbepring=desc;
1360                 break;
1361
1362         case TX_VIPRIORITY_RING_ADDR:
1363                 priv->txvipringdma=dma_desc;
1364                 priv->txvipring=desc;
1365                 break;
1366
1367         case TX_VOPRIORITY_RING_ADDR:
1368                 priv->txvopringdma=dma_desc;
1369                 priv->txvopring=desc;
1370                 break;
1371
1372         case TX_HIGHPRIORITY_RING_ADDR:
1373                 priv->txhpringdma=dma_desc;
1374                 priv->txhpring=desc;
1375                 break;
1376
1377         case TX_BEACON_RING_ADDR:
1378                 priv->txbeaconringdma=dma_desc;
1379                 priv->txbeaconring=desc;
1380                 break;
1381
1382         }
1383
1384         return 0;
1385 }
1386
1387
1388 void free_tx_desc_rings(struct net_device *dev)
1389 {
1390
1391         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1392         struct pci_dev *pdev=priv->pdev;
1393         int count = priv->txringcount;
1394
1395         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1396                             priv->txmapring, priv->txmapringdma);
1397         buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1);
1398
1399         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1400                             priv->txbkpring, priv->txbkpringdma);
1401         buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1);
1402
1403         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1404                             priv->txbepring, priv->txbepringdma);
1405         buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1);
1406
1407         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1408                             priv->txvipring, priv->txvipringdma);
1409         buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1);
1410
1411         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1412                             priv->txvopring, priv->txvopringdma);
1413         buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1);
1414
1415         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1416                             priv->txhpring, priv->txhpringdma);
1417         buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1);
1418
1419         count = priv->txbeaconcount;
1420         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1421                             priv->txbeaconring, priv->txbeaconringdma);
1422         buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1);
1423 }
1424
1425 void free_rx_desc_ring(struct net_device *dev)
1426 {
1427         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1428         struct pci_dev *pdev = priv->pdev;
1429
1430         int count = priv->rxringcount;
1431
1432         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1433                             priv->rxring, priv->rxringdma);
1434
1435         buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0);
1436 }
1437
1438
1439 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1440 {
1441         int i;
1442         u32 *desc;
1443         u32 *tmp;
1444         dma_addr_t dma_desc,dma_tmp;
1445         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1446         struct pci_dev *pdev=priv->pdev;
1447         void *buf;
1448         u8 rx_desc_size;
1449
1450         rx_desc_size = 8; // 4*8 = 32 bytes
1451
1452         if((bufsize & 0xfff) != bufsize){
1453                 DMESGE ("RX buffer allocation too large");
1454                 return -1;
1455         }
1456
1457         desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256,
1458                                           &dma_desc);
1459
1460         if(dma_desc & 0xff){
1461
1462                 /*
1463                  * descriptor's buffer must be 256 byte aligned
1464                  * should never happen since we specify the DMA mask
1465                  */
1466                 WARN(1, "DMA buffer is not aligned\n");
1467         }
1468
1469         priv->rxring=desc;
1470         priv->rxringdma=dma_desc;
1471         tmp=desc;
1472
1473         for (i=0;i<count;i++){
1474
1475                 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){
1476                         DMESGE("Failed to kmalloc RX buffer");
1477                         return -1;
1478                 }
1479
1480                 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8),
1481                                          PCI_DMA_FROMDEVICE);
1482
1483                 //buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1484                 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp,
1485                            &(priv->rxbufferhead))){
1486                            DMESGE("Unable to allocate mem RX buf");
1487                            return -1;
1488                 }
1489                 *tmp = 0; //zero pads the header of the descriptor
1490                 *tmp = *tmp |( bufsize&0xfff);
1491                 *(tmp+2) = (u32)dma_tmp;
1492                 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC
1493
1494                 tmp=tmp+rx_desc_size;
1495         }
1496
1497         *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor
1498
1499         return 0;
1500 }
1501
1502
1503 void set_nic_rxring(struct net_device *dev)
1504 {
1505         u8 pgreg;
1506         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1507
1508         //rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1509
1510         pgreg=read_nic_byte(dev, PGSELECT);
1511         write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
1512
1513         //rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1514
1515         write_nic_dword(dev, RXRING_ADDR,priv->rxringdma);
1516 }
1517
1518
1519 void rtl8180_reset(struct net_device *dev)
1520 {
1521         //u32 txconf = 0x80e00707; //FIXME: Make me understandable
1522         u8 cr;
1523
1524         //write_nic_dword(dev,TX_CONF,txconf);
1525
1526         rtl8180_irq_disable(dev);
1527
1528         cr=read_nic_byte(dev,CMD);
1529         cr = cr & 2;
1530         cr = cr | (1<<CMD_RST_SHIFT);
1531         write_nic_byte(dev,CMD,cr);
1532
1533         force_pci_posting(dev);
1534
1535         mdelay(200);
1536
1537         if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
1538                 DMESGW("Card reset timeout!");
1539         else
1540                 DMESG("Card successfully reset");
1541
1542 //#ifndef CONFIG_RTL8185B
1543         rtl8180_set_mode(dev,EPROM_CMD_LOAD);
1544         force_pci_posting(dev);
1545         mdelay(200);
1546 //#endif
1547 }
1548
1549 inline u16 ieeerate2rtlrate(int rate)
1550 {
1551         switch(rate){
1552         case 10:
1553         return 0;
1554         case 20:
1555         return 1;
1556         case 55:
1557         return 2;
1558         case 110:
1559         return 3;
1560         case 60:
1561         return 4;
1562         case 90:
1563         return 5;
1564         case 120:
1565         return 6;
1566         case 180:
1567         return 7;
1568         case 240:
1569         return 8;
1570         case 360:
1571         return 9;
1572         case 480:
1573         return 10;
1574         case 540:
1575         return 11;
1576         default:
1577         return 3;
1578
1579         }
1580 }
1581
1582 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
1583 inline u16 rtl8180_rate2rate(short rate)
1584 {
1585         if (rate >12) return 10;
1586         return rtl_rate[rate];
1587 }
1588 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1589 {
1590         if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
1591                 return 1;
1592         else return 0;
1593 }
1594 u16 N_DBPSOfRate(u16 DataRate);
1595 u16 ComputeTxTime(
1596         u16             FrameLength,
1597         u16             DataRate,
1598         u8              bManagementFrame,
1599         u8              bShortPreamble
1600 )
1601 {
1602         u16     FrameTime;
1603         u16     N_DBPS;
1604         u16     Ceiling;
1605
1606         if( rtl8180_IsWirelessBMode(DataRate) )
1607         {
1608                 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
1609                 {       // long preamble
1610                         FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1611                 }
1612                 else
1613                 {       // Short preamble
1614                         FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1615                 }
1616                 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
1617                                 FrameTime ++;
1618         } else {        //802.11g DSSS-OFDM PLCP length field calculation.
1619                 N_DBPS = N_DBPSOfRate(DataRate);
1620                 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1621                                 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1622                 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1623         }
1624         return FrameTime;
1625 }
1626 u16 N_DBPSOfRate(u16 DataRate)
1627 {
1628          u16 N_DBPS = 24;
1629
1630          switch(DataRate)
1631          {
1632          case 60:
1633           N_DBPS = 24;
1634           break;
1635
1636          case 90:
1637           N_DBPS = 36;
1638           break;
1639
1640          case 120:
1641           N_DBPS = 48;
1642           break;
1643
1644          case 180:
1645           N_DBPS = 72;
1646           break;
1647
1648          case 240:
1649           N_DBPS = 96;
1650           break;
1651
1652          case 360:
1653           N_DBPS = 144;
1654           break;
1655
1656          case 480:
1657           N_DBPS = 192;
1658           break;
1659
1660          case 540:
1661           N_DBPS = 216;
1662           break;
1663
1664          default:
1665           break;
1666          }
1667
1668          return N_DBPS;
1669 }
1670
1671 //{by amy 080312
1672 //
1673 //      Description:
1674 //      For Netgear case, they want good-looking singal strength.
1675 //              2004.12.05, by rcnjko.
1676 //
1677 long
1678 NetgearSignalStrengthTranslate(
1679         long LastSS,
1680         long CurrSS
1681         )
1682 {
1683         long RetSS;
1684
1685         // Step 1. Scale mapping.
1686         if(CurrSS >= 71 && CurrSS <= 100)
1687         {
1688                 RetSS = 90 + ((CurrSS - 70) / 3);
1689         }
1690         else if(CurrSS >= 41 && CurrSS <= 70)
1691         {
1692                 RetSS = 78 + ((CurrSS - 40) / 3);
1693         }
1694         else if(CurrSS >= 31 && CurrSS <= 40)
1695         {
1696                 RetSS = 66 + (CurrSS - 30);
1697         }
1698         else if(CurrSS >= 21 && CurrSS <= 30)
1699         {
1700                 RetSS = 54 + (CurrSS - 20);
1701         }
1702         else if(CurrSS >= 5 && CurrSS <= 20)
1703         {
1704                 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1705         }
1706         else if(CurrSS == 4)
1707         {
1708                 RetSS = 36;
1709         }
1710         else if(CurrSS == 3)
1711         {
1712                 RetSS = 27;
1713         }
1714         else if(CurrSS == 2)
1715         {
1716                 RetSS = 18;
1717         }
1718         else if(CurrSS == 1)
1719         {
1720                 RetSS = 9;
1721         }
1722         else
1723         {
1724                 RetSS = CurrSS;
1725         }
1726         //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
1727
1728         // Step 2. Smoothing.
1729         if(LastSS > 0)
1730         {
1731                 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
1732         }
1733         //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
1734
1735         return RetSS;
1736 }
1737 //
1738 //      Description:
1739 //              Translate 0-100 signal strength index into dBm.
1740 //
1741 long
1742 TranslateToDbm8185(
1743         u8 SignalStrengthIndex  // 0-100 index.
1744         )
1745 {
1746         long    SignalPower; // in dBm.
1747
1748         // Translate to dBm (x=0.5y-95).
1749         SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1750         SignalPower -= 95;
1751
1752         return SignalPower;
1753 }
1754 //
1755 //      Description:
1756 //              Perform signal smoothing for dynamic mechanism.
1757 //              This is different with PerformSignalSmoothing8185 in smoothing fomula.
1758 //              No dramatic adjustion is apply because dynamic mechanism need some degree
1759 //              of correctness. Ported from 8187B.
1760 //      2007-02-26, by Bruce.
1761 //
1762 void
1763 PerformUndecoratedSignalSmoothing8185(
1764         struct r8180_priv *priv,
1765         bool    bCckRate
1766         )
1767 {
1768
1769
1770         // Determin the current packet is CCK rate.
1771         priv->bCurCCKPkt = bCckRate;
1772
1773         if(priv->UndecoratedSmoothedSS >= 0)
1774         {
1775                 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6;
1776         }
1777         else
1778         {
1779                 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1780         }
1781
1782         priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60;
1783
1784 //      printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", priv->SignalStrength, priv->UndecoratedSmoothedSS);
1785 //      printk("Sommthing RxPower (%d) => UndecoratedRxPower (%d)\n", priv->RxPower, priv->UndercorateSmoothedRxPower);
1786
1787         //if(priv->CurCCKRSSI >= 0 && bCckRate)
1788         if(bCckRate)
1789         {
1790                 priv->CurCCKRSSI = priv->RSSI;
1791         }
1792         else
1793         {
1794                 priv->CurCCKRSSI = 0;
1795         }
1796
1797         // Boundary checking.
1798         // TODO: The overflow condition does happen, if we want to fix,
1799         // we shall recalculate thresholds first.
1800         if(priv->UndecoratedSmoothedSS > 100)
1801         {
1802 //              printk("UndecoratedSmoothedSS(%d) overflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
1803         }
1804         if(priv->UndecoratedSmoothedSS < 0)
1805         {
1806 //              printk("UndecoratedSmoothedSS(%d) underflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
1807         }
1808
1809 }
1810
1811 //by amy 080312}
1812
1813 /* This is rough RX isr handling routine*/
1814 void rtl8180_rx(struct net_device *dev)
1815 {
1816         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1817         struct sk_buff *tmp_skb;
1818
1819         //struct sk_buff *skb;
1820         short first,last;
1821         u32 len;
1822         int lastlen;
1823         unsigned char quality, signal;
1824         u8 rate;
1825         //u32 *prism_hdr;
1826         u32 *tmp,*tmp2;
1827         u8 rx_desc_size;
1828         u8 padding;
1829         //u32 count=0;
1830         char rxpower = 0;
1831         u32 RXAGC = 0;
1832         long RxAGC_dBm = 0;
1833         u8      LNA=0, BB=0;
1834         u8      LNA_gain[4]={02, 17, 29, 39};
1835         u8  Antenna = 0;
1836         struct ieee80211_hdr *hdr;//by amy
1837         u16 fc,type;
1838         u8 bHwError = 0,bCRC = 0,bICV = 0;
1839         //bHwError = 0;
1840         //bCRC = 0;
1841         //bICV = 0;
1842         bool    bCckRate = false;
1843         u8     RSSI = 0;
1844         long    SignalStrengthIndex = 0;//+by amy 080312
1845 //      u8 SignalStrength = 0;
1846         struct ieee80211_rx_stats stats = {
1847                 .signal = 0,
1848                 .noise = -98,
1849                 .rate = 0,
1850         //      .mac_time = jiffies,
1851                 .freq = IEEE80211_24GHZ_BAND,
1852         };
1853
1854         stats.nic_type = NIC_8185B;
1855         rx_desc_size = 8;
1856
1857         //printk("receive frame!%d\n",count++);
1858         //if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!");
1859         //else {
1860
1861         if ((*(priv->rxringtail)) & (1<<31)) {
1862
1863                 /* we have got an RX int, but the descriptor
1864                  * we are pointing is empty*/
1865
1866                 priv->stats.rxnodata++;
1867                 priv->ieee80211->stats.rx_errors++;
1868
1869         /*      if (! *(priv->rxring) & (1<<31)) {
1870
1871                         priv->stats.rxreset++;
1872                         priv->rxringtail=priv->rxring;
1873                         priv->rxbuffer=priv->rxbufferhead;
1874
1875                 }else{*/
1876
1877                 tmp2 = NULL;
1878                 tmp = priv->rxringtail;
1879                 do{
1880                         if(tmp == priv->rxring)
1881                                 //tmp  = priv->rxring + (priv->rxringcount )*rx_desc_size; xiong-2006-11-15
1882                                 tmp  = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1883                         else
1884                                 tmp -= rx_desc_size;
1885
1886                         if(! (*tmp & (1<<31)))
1887                                 tmp2 = tmp;
1888                 }while(tmp != priv->rxring);
1889
1890                 if(tmp2) priv->rxringtail = tmp2;
1891                 //}
1892         }
1893
1894         /* while there are filled descriptors */
1895         while(!(*(priv->rxringtail) & (1<<31))){
1896                 if(*(priv->rxringtail) & (1<<26))
1897                         DMESGW("RX buffer overflow");
1898                 if(*(priv->rxringtail) & (1<<12))
1899                         priv->stats.rxicverr++;
1900
1901                 if(*(priv->rxringtail) & (1<<27)){
1902                         priv->stats.rxdmafail++;
1903                         //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail);
1904                         goto drop;
1905                 }
1906
1907                 pci_dma_sync_single_for_cpu(priv->pdev,
1908                                     priv->rxbuffer->dma,
1909                                     priv->rxbuffersize * \
1910                                     sizeof(u8),
1911                                     PCI_DMA_FROMDEVICE);
1912
1913                 first = *(priv->rxringtail) & (1<<29) ? 1:0;
1914                 if(first) priv->rx_prevlen=0;
1915
1916                 last = *(priv->rxringtail) & (1<<28) ? 1:0;
1917                 if(last){
1918                         lastlen=((*priv->rxringtail) &0xfff);
1919
1920                         /* if the last descriptor (that should
1921                          * tell us the total packet len) tell
1922                          * us something less than the descriptors
1923                          * len we had until now, then there is some
1924                          * problem..
1925                          * workaround to prevent kernel panic
1926                          */
1927                         if(lastlen < priv->rx_prevlen)
1928                                 len=0;
1929                         else
1930                                 len=lastlen-priv->rx_prevlen;
1931
1932                         if(*(priv->rxringtail) & (1<<13)) {
1933 //lastlen=((*priv->rxringtail) &0xfff);
1934                                 if ((*(priv->rxringtail) & 0xfff) <500)
1935                                         priv->stats.rxcrcerrmin++;
1936                                 else if ((*(priv->rxringtail) & 0x0fff) >1000)
1937                                         priv->stats.rxcrcerrmax++;
1938                                 else
1939                                         priv->stats.rxcrcerrmid++;
1940
1941                         }
1942
1943                 }else{
1944                         len = priv->rxbuffersize;
1945                 }
1946
1947                 if(first && last) {
1948                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1949                 }else if(first) {
1950                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1951                         if(padding) {
1952                                 len -= 2;
1953                         }
1954                 }else {
1955                         padding = 0;
1956                 }
1957                padding = 0;
1958                 priv->rx_prevlen+=len;
1959
1960                 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){
1961                         /* HW is probably passing several buggy frames
1962                         * without FD or LD flag set.
1963                         * Throw this garbage away to prevent skb
1964                         * memory exausting
1965                         */
1966                         if(!priv->rx_skb_complete)
1967                                 dev_kfree_skb_any(priv->rx_skb);
1968                         priv->rx_skb_complete = 1;
1969                 }
1970
1971                 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
1972                 signal=(signal&0xfe)>>1;        // Modify by hikaru 6.6
1973
1974                 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff));
1975
1976                 stats.mac_time[0] = *(priv->rxringtail+1);
1977                 stats.mac_time[1] = *(priv->rxringtail+2);
1978                 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42;
1979                 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f);
1980
1981                 rate=((*(priv->rxringtail)) &
1982                         ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1983
1984                 stats.rate = rtl8180_rate2rate(rate);
1985                 //DMESG("%d",rate);
1986                 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ;
1987 //              printk("in rtl8180_rx():Antenna is %d\n",Antenna);
1988 //by amy for antenna
1989                 if(!rtl8180_IsWirelessBMode(stats.rate))
1990                 { // OFDM rate.
1991
1992                         RxAGC_dBm = rxpower+1;  //bias
1993                 }
1994                 else
1995                 { // CCK rate.
1996                         RxAGC_dBm = signal;//bit 0 discard
1997
1998                         LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5
1999                         BB  = (u8) (RxAGC_dBm & 0x1F);  // bit 4 ~ bit 0
2000
2001                         RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm)
2002
2003                         RxAGC_dBm +=4; //bias
2004                 }
2005
2006                 if(RxAGC_dBm & 0x80) //absolute value
2007                         RXAGC= ~(RxAGC_dBm)+1;
2008                 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
2009                 // Translate RXAGC into 1-100.
2010                 if(!rtl8180_IsWirelessBMode(stats.rate))
2011                 { // OFDM rate.
2012                         if(RXAGC>90)
2013                                 RXAGC=90;
2014                         else if(RXAGC<25)
2015                                 RXAGC=25;
2016                         RXAGC=(90-RXAGC)*100/65;
2017                 }
2018                 else
2019                 { // CCK rate.
2020                         if(RXAGC>95)
2021                                 RXAGC=95;
2022                         else if(RXAGC<30)
2023                                 RXAGC=30;
2024                         RXAGC=(95-RXAGC)*100/65;
2025                 }
2026                 priv->SignalStrength = (u8)RXAGC;
2027                 priv->RecvSignalPower = RxAGC_dBm ;  // It can use directly by SD3 CMLin
2028                 priv->RxPower = rxpower;
2029                 priv->RSSI = RSSI;
2030 //{by amy 080312
2031                 // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko.
2032                 if(quality >= 127)
2033                         quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
2034                 else if(quality < 27)
2035                         quality = 100;
2036                 else
2037                         quality = 127 - quality;
2038                 priv->SignalQuality = quality;
2039                 if(!priv->card_8185)
2040                         printk("check your card type\n");
2041
2042                 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength;
2043                 stats.signalstrength = RXAGC;
2044                 if(stats.signalstrength > 100)
2045                         stats.signalstrength = 100;
2046                 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
2047         //      printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
2048                 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
2049                 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
2050 //by amy 080312}
2051                 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 )
2052                         | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 );
2053                 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
2054                 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
2055             hdr = (struct ieee80211_hdr *)priv->rxbuffer->buf;
2056                     fc = le16_to_cpu(hdr->frame_ctl);
2057                 type = WLAN_FC_GET_TYPE(fc);
2058
2059                         if((IEEE80211_FTYPE_CTL != type) &&
2060                                 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
2061                                  && (!bHwError) && (!bCRC)&& (!bICV))
2062                         {
2063 //by amy 080312
2064                                 // Perform signal smoothing for dynamic mechanism on demand.
2065                                 // This is different with PerformSignalSmoothing8185 in smoothing fomula.
2066                                 // No dramatic adjustion is apply because dynamic mechanism need some degree
2067                                 // of correctness. 2007.01.23, by shien chang.
2068                                 PerformUndecoratedSignalSmoothing8185(priv,bCckRate);
2069                                 //
2070                                 // For good-looking singal strength.
2071                                 //
2072                                 SignalStrengthIndex = NetgearSignalStrengthTranslate(
2073                                                                 priv->LastSignalStrengthInPercent,
2074                                                                 priv->SignalStrength);
2075
2076                                 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
2077                                 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
2078                 //
2079                 // We need more correct power of received packets and the  "SignalStrength" of RxStats is beautified,
2080                 // so we record the correct power here.
2081                 //
2082                                 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
2083                                 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6;
2084
2085                 // Figure out which antenna that received the lasted packet.
2086                                 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
2087 //by amy 080312
2088                             SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
2089                         }
2090
2091 //by amy for antenna
2092
2093
2094
2095
2096
2097
2098 #ifndef DUMMY_RX
2099                 if(first){
2100                         if(!priv->rx_skb_complete){
2101                                 /* seems that HW sometimes fails to reiceve and
2102                                    doesn't provide the last descriptor */
2103                                 dev_kfree_skb_any(priv->rx_skb);
2104                                 priv->stats.rxnolast++;
2105                         }
2106                         /* support for prism header has been originally added by Christian */
2107                         if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){
2108
2109                         }else{
2110                                 priv->rx_skb = dev_alloc_skb(len+2);
2111                                 if( !priv->rx_skb) goto drop;
2112                         }
2113
2114                         priv->rx_skb_complete=0;
2115                         priv->rx_skb->dev=dev;
2116                 }else{
2117                         /* if we are here we should  have already RXed
2118                         * the first frame.
2119                         * If we get here and the skb is not allocated then
2120                         * we have just throw out garbage (skb not allocated)
2121                         * and we are still rxing garbage....
2122                         */
2123                         if(!priv->rx_skb_complete){
2124
2125                                 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2);
2126
2127                                 if(!tmp_skb) goto drop;
2128
2129                                 tmp_skb->dev=dev;
2130
2131                                 memcpy(skb_put(tmp_skb,priv->rx_skb->len),
2132                                         priv->rx_skb->data,
2133                                         priv->rx_skb->len);
2134
2135                                 dev_kfree_skb_any(priv->rx_skb);
2136
2137                                 priv->rx_skb=tmp_skb;
2138                         }
2139                 }
2140
2141                 if(!priv->rx_skb_complete) {
2142                         if(padding) {
2143                                 memcpy(skb_put(priv->rx_skb,len),
2144                                         (((unsigned char *)priv->rxbuffer->buf) + 2),len);
2145                         } else {
2146                                 memcpy(skb_put(priv->rx_skb,len),
2147                                         priv->rxbuffer->buf,len);
2148                         }
2149                 }
2150
2151                 if(last && !priv->rx_skb_complete){
2152                         if(priv->rx_skb->len > 4)
2153                                 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
2154 #ifndef RX_DONT_PASS_UL
2155                         if(!ieee80211_rx(priv->ieee80211,
2156                                          priv->rx_skb, &stats)){
2157 #endif // RX_DONT_PASS_UL
2158
2159                                 dev_kfree_skb_any(priv->rx_skb);
2160 #ifndef RX_DONT_PASS_UL
2161                         }
2162 #endif
2163                         priv->rx_skb_complete=1;
2164                 }
2165
2166 #endif //DUMMY_RX
2167
2168                 pci_dma_sync_single_for_device(priv->pdev,
2169                                     priv->rxbuffer->dma,
2170                                     priv->rxbuffersize * \
2171                                     sizeof(u8),
2172                                     PCI_DMA_FROMDEVICE);
2173
2174
2175 drop: // this is used when we have not enought mem
2176
2177                 /* restore the descriptor */
2178                 *(priv->rxringtail+2)=priv->rxbuffer->dma;
2179                 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff;
2180                 *(priv->rxringtail)=
2181                         *(priv->rxringtail) | priv->rxbuffersize;
2182
2183                 *(priv->rxringtail)=
2184                         *(priv->rxringtail) | (1<<31);
2185                         //^empty descriptor
2186
2187                         //wmb();
2188
2189                 //unsigned long flags;
2190                 //spin_lock_irqsave(&priv->irq_lock,flags);
2191
2192                 priv->rxringtail+=rx_desc_size;
2193                 if(priv->rxringtail >=
2194                    (priv->rxring)+(priv->rxringcount )*rx_desc_size)
2195                         priv->rxringtail=priv->rxring;
2196
2197                 //spin_unlock_irqrestore(&priv->irq_lock,flags);
2198
2199
2200                 priv->rxbuffer=(priv->rxbuffer->next);
2201
2202         }
2203
2204
2205
2206 //      if(get_curr_tx_free_desc(dev,priority))
2207 //      ieee80211_sta_ps_sleep(priv->ieee80211, &tmp, &tmp2);
2208
2209
2210
2211 }
2212
2213
2214 void rtl8180_dma_kick(struct net_device *dev, int priority)
2215 {
2216         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2217
2218         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2219 /*
2220
2221         switch(priority){
2222
2223                 case LOW_PRIORITY:
2224
2225                 write_nic_byte(dev,TX_DMA_POLLING,
2226                        (1<< TX_DMA_POLLING_LOWPRIORITY_SHIFT) |
2227                                 priv->dma_poll_mask);
2228                 break;
2229
2230                 case NORM_PRIORITY:
2231
2232                 write_nic_byte(dev,TX_DMA_POLLING,
2233                        (1<< TX_DMA_POLLING_NORMPRIORITY_SHIFT) |
2234                                 priv->dma_poll_mask);
2235                 break;
2236
2237                 case HI_PRIORITY:
2238
2239                 write_nic_byte(dev,TX_DMA_POLLING,
2240                        (1<< TX_DMA_POLLING_HIPRIORITY_SHIFT) |
2241                                 priv->dma_poll_mask);
2242                 break;
2243
2244         }
2245 */
2246         write_nic_byte(dev, TX_DMA_POLLING,
2247                         (1 << (priority + 1)) | priv->dma_poll_mask);
2248         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2249
2250         force_pci_posting(dev);
2251 }
2252
2253 void rtl8180_data_hard_stop(struct net_device *dev)
2254 {
2255         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2256
2257         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2258         priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
2259         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2260         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2261 }
2262
2263
2264 void rtl8180_data_hard_resume(struct net_device *dev)
2265 {
2266         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2267
2268         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2269         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
2270         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2271         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2272 }
2273
2274
2275 /* this function TX data frames when the ieee80211 stack requires this.
2276  * It checks also if we need to stop the ieee tx queue, eventually do it
2277  */
2278 void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int
2279 rate)
2280 {
2281         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2282         int mode;
2283         struct ieee80211_hdr_3addr  *h = (struct ieee80211_hdr_3addr  *) skb->data;
2284         short morefrag = (h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS;
2285         unsigned long flags;
2286         int priority;
2287         //static int count = 0;
2288
2289         mode = priv->ieee80211->iw_mode;
2290
2291         rate = ieeerate2rtlrate(rate);
2292         /*
2293         * This function doesn't require lock because we make
2294         * sure it's called with the tx_lock already acquired.
2295         * this come from the kernel's hard_xmit callback (trought
2296         * the ieee stack, or from the try_wake_queue (again trought
2297         * the ieee stack.
2298         */
2299         priority = AC2Q(skb->priority);
2300         spin_lock_irqsave(&priv->tx_lock,flags);
2301
2302         if(priv->ieee80211->bHwRadioOff)
2303         {
2304                 spin_unlock_irqrestore(&priv->tx_lock,flags);
2305
2306                 return;
2307         }
2308
2309         //printk(KERN_WARNING "priority = %d@%d\n", priority, count++);
2310         if (!check_nic_enought_desc(dev, priority)){
2311                 //DMESG("Error: no descriptor left by previous TX (avail %d) ",
2312                 //      get_curr_tx_free_desc(dev, priority));
2313                 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
2314                         get_curr_tx_free_desc(dev, priority));
2315         //printk(KERN_WARNING "==============================================================> \n");
2316                 ieee80211_stop_queue(priv->ieee80211);
2317         }
2318         rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
2319         if (!check_nic_enought_desc(dev, priority))
2320                 ieee80211_stop_queue(priv->ieee80211);
2321
2322         //dev_kfree_skb_any(skb);
2323         spin_unlock_irqrestore(&priv->tx_lock,flags);
2324
2325 }
2326
2327 /* This is a rough attempt to TX a frame
2328  * This is called by the ieee 80211 stack to TX management frames.
2329  * If the ring is full packet are dropped (for data frame the queue
2330  * is stopped before this can happen). For this reason it is better
2331  * if the descriptors are larger than the largest management frame
2332  * we intend to TX: i'm unsure what the HW does if it will not found
2333  * the last fragment of a frame because it has been dropped...
2334  * Since queues for Management and Data frames are different we
2335  * might use a different lock than tx_lock (for example mgmt_tx_lock)
2336  */
2337 /* these function may loops if invoked with 0 descriptors or 0 len buffer*/
2338 int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
2339 {
2340         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2341
2342         unsigned long flags;
2343
2344         int priority;
2345
2346         priority = MANAGE_PRIORITY;
2347
2348         spin_lock_irqsave(&priv->tx_lock,flags);
2349
2350         if(priv->ieee80211->bHwRadioOff)
2351         {
2352                 spin_unlock_irqrestore(&priv->tx_lock,flags);
2353
2354                 dev_kfree_skb_any(skb);
2355                 return NETDEV_TX_OK;
2356         }
2357
2358         rtl8180_tx(dev, skb->data, skb->len, priority,
2359                 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
2360
2361         priv->ieee80211->stats.tx_bytes+=skb->len;
2362         priv->ieee80211->stats.tx_packets++;
2363         spin_unlock_irqrestore(&priv->tx_lock,flags);
2364
2365         dev_kfree_skb_any(skb);
2366         return NETDEV_TX_OK;
2367 }
2368
2369 // longpre 144+48 shortpre 72+24
2370 u16 rtl8180_len2duration(u32 len, short rate,short* ext)
2371 {
2372         u16 duration;
2373         u16 drift;
2374         *ext=0;
2375
2376         switch(rate){
2377         case 0://1mbps
2378                 *ext=0;
2379                 duration = ((len+4)<<4) /0x2;
2380                 drift = ((len+4)<<4) % 0x2;
2381                 if(drift ==0 ) break;
2382                 duration++;
2383                 break;
2384
2385         case 1://2mbps
2386                 *ext=0;
2387                 duration = ((len+4)<<4) /0x4;
2388                 drift = ((len+4)<<4) % 0x4;
2389                 if(drift ==0 ) break;
2390                 duration++;
2391                 break;
2392
2393         case 2: //5.5mbps
2394                 *ext=0;
2395                 duration = ((len+4)<<4) /0xb;
2396                 drift = ((len+4)<<4) % 0xb;
2397                 if(drift ==0 )
2398                         break;
2399                 duration++;
2400                 break;
2401
2402         default:
2403         case 3://11mbps
2404                 *ext=0;
2405                 duration = ((len+4)<<4) /0x16;
2406                 drift = ((len+4)<<4) % 0x16;
2407                 if(drift ==0 )
2408                         break;
2409                 duration++;
2410                 if(drift > 6)
2411                         break;
2412                 *ext=1;
2413                 break;
2414         }
2415
2416         return duration;
2417 }
2418
2419
2420 void rtl8180_prepare_beacon(struct net_device *dev)
2421 {
2422
2423         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2424
2425         struct sk_buff *skb;
2426
2427         u16 word  = read_nic_word(dev, BcnItv);
2428         word &= ~BcnItv_BcnItv; // clear Bcn_Itv
2429         word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64;
2430         write_nic_word(dev, BcnItv, word);
2431
2432
2433         skb = ieee80211_get_beacon(priv->ieee80211);
2434         if(skb){
2435                 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY,
2436                         0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
2437                 dev_kfree_skb_any(skb);
2438         }
2439 }
2440
2441 /* This function do the real dirty work: it enqueues a TX command
2442  * descriptor in the ring buffer, copyes the frame in a TX buffer
2443  * and kicks the NIC to ensure it does the DMA transfer.
2444  */
2445 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2446                  short morefrag, short descfrag, int rate)
2447 {
2448         struct r8180_priv *priv = ieee80211_priv(dev);
2449         u32 *tail,*temp_tail;
2450         u32 *begin;
2451         u32 *buf;
2452         int i;
2453         int remain;
2454         int buflen;
2455         int count;
2456         //u16   AckCtsTime;
2457         //u16   FrameTime;
2458         u16 duration;
2459         short ext;
2460         struct buffer* buflist;
2461         //unsigned long flags;
2462         struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
2463         u8 dest[ETH_ALEN];
2464         u8                      bUseShortPreamble = 0;
2465         u8                      bCTSEnable = 0;
2466         u8                      bRTSEnable = 0;
2467         //u16                   RTSRate = 22;
2468         //u8                    RetryLimit = 0;
2469         u16                     Duration = 0;
2470         u16                     RtsDur = 0;
2471         u16                     ThisFrameTime = 0;
2472         u16                     TxDescDuration = 0;
2473         u8                      ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14
2474
2475         switch(priority) {
2476         case MANAGE_PRIORITY:
2477                 tail=priv->txmapringtail;
2478                 begin=priv->txmapring;
2479                 buflist = priv->txmapbufstail;
2480                 count = priv->txringcount;
2481                 break;
2482
2483         case BK_PRIORITY:
2484                 tail=priv->txbkpringtail;
2485                 begin=priv->txbkpring;
2486                 buflist = priv->txbkpbufstail;
2487                 count = priv->txringcount;
2488                 break;
2489
2490         case BE_PRIORITY:
2491                 tail=priv->txbepringtail;
2492                 begin=priv->txbepring;
2493                 buflist = priv->txbepbufstail;
2494                 count = priv->txringcount;
2495                 break;
2496
2497         case VI_PRIORITY:
2498                 tail=priv->txvipringtail;
2499                 begin=priv->txvipring;
2500                 buflist = priv->txvipbufstail;
2501                 count = priv->txringcount;
2502                 break;
2503
2504         case VO_PRIORITY:
2505                 tail=priv->txvopringtail;
2506                 begin=priv->txvopring;
2507                 buflist = priv->txvopbufstail;
2508                 count = priv->txringcount;
2509                 break;
2510
2511         case HI_PRIORITY:
2512                 tail=priv->txhpringtail;
2513                 begin=priv->txhpring;
2514                 buflist = priv->txhpbufstail;
2515                 count = priv->txringcount;
2516                 break;
2517
2518         case BEACON_PRIORITY:
2519                 tail=priv->txbeaconringtail;
2520                 begin=priv->txbeaconring;
2521                 buflist = priv->txbeaconbufstail;
2522                 count = priv->txbeaconcount;
2523                 break;
2524
2525         default:
2526                 return -1;
2527                 break;
2528         }
2529
2530         //printk("in rtl8180_tx(): rate is %d\n",priv->ieee80211->rate);
2531 #if 1
2532                 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
2533                 if (is_multicast_ether_addr(dest) ||
2534                                 is_broadcast_ether_addr(dest))
2535                 {
2536                         Duration = 0;
2537                         RtsDur = 0;
2538                         bRTSEnable = 0;
2539                         bCTSEnable = 0;
2540
2541                         ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2542                         TxDescDuration = ThisFrameTime;
2543                 } else {// Unicast packet
2544                         //u8 AckRate;
2545                         u16 AckTime;
2546
2547                         //YJ,add,080828,for Keep alive
2548                         priv->NumTxUnicast++;
2549
2550                         // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko.
2551                         //AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) );
2552                         // Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko.
2553                         //AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE);
2554                         //For simplicity, just use the 1M basic rate
2555                         //AckTime = ComputeTxTime(14, 540,0, 0);        // AckCTSLng = 14 use 1M bps send
2556                         AckTime = ComputeTxTime(14, 10,0, 0);   // AckCTSLng = 14 use 1M bps send
2557                         //AckTime = ComputeTxTime(14, 2,false, false);  // AckCTSLng = 14 use 1M bps send
2558
2559                         if ( ((len + sCrcLng) > priv->rts) && priv->rts )
2560                         { // RTS/CTS.
2561                                 u16 RtsTime, CtsTime;
2562                                 //u16 CtsRate;
2563                                 bRTSEnable = 1;
2564                                 bCTSEnable = 0;
2565
2566                                 // Rate and time required for RTS.
2567                                 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0);
2568                                 // Rate and time required for CTS.
2569                                 CtsTime = ComputeTxTime(14, 10,0, 0);   // AckCTSLng = 14 use 1M bps send
2570
2571                                 // Figure out time required to transmit this frame.
2572                                 ThisFrameTime = ComputeTxTime(len + sCrcLng,
2573                                                 rtl8180_rate2rate(rate),
2574                                                 0,
2575                                                 bUseShortPreamble);
2576
2577                                 // RTS-CTS-ThisFrame-ACK.
2578                                 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
2579
2580                                 TxDescDuration = RtsTime + RtsDur;
2581                         }
2582                         else {// Normal case.
2583                                 bCTSEnable = 0;
2584                                 bRTSEnable = 0;
2585                                 RtsDur = 0;
2586
2587                                 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2588                                 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
2589                         }
2590
2591                         if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
2592                                 // ThisFrame-ACK.
2593                                 Duration = aSifsTime + AckTime;
2594                         } else { // One or more fragments remained.
2595                                 u16 NextFragTime;
2596                                 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
2597                                                 rtl8180_rate2rate(rate),
2598                                                 0,
2599                                                 bUseShortPreamble );
2600
2601                                 //ThisFrag-ACk-NextFrag-ACK.
2602                                 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
2603                         }
2604
2605                 } // End of Unicast packet
2606
2607                 frag_hdr->duration_id = Duration;
2608 #endif
2609
2610         buflen=priv->txbuffsize;
2611         remain=len;
2612         temp_tail = tail;
2613 //printk("================================>buflen = %d, remain = %d!\n", buflen,remain);
2614         while(remain!=0){
2615                 mb();
2616                 if(!buflist){
2617                         DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
2618                         //spin_unlock_irqrestore(&priv->tx_lock,flags);
2619                         return -1;
2620                 }
2621                 buf=buflist->buf;
2622
2623                 if( (*tail & (1<<31)) && (priority != BEACON_PRIORITY)){
2624
2625                                 DMESGW("No more TX desc, returning %x of %x",
2626                                 remain,len);
2627                                 priv->stats.txrdu++;
2628                         //      spin_unlock_irqrestore(&priv->tx_lock,flags);
2629
2630                         return remain;
2631
2632                 }
2633
2634                 *tail= 0; // zeroes header
2635                 *(tail+1) = 0;
2636                 *(tail+3) = 0;
2637                 *(tail+5) = 0;
2638                 *(tail+6) = 0;
2639                 *(tail+7) = 0;
2640
2641                 if(priv->card_8185){
2642                         //FIXME: this should be triggered by HW encryption parameters.
2643                         *tail |= (1<<15); //no encrypt
2644 //                      *tail |= (1<<30); //raise int when completed
2645                 }
2646         //      *tail = *tail | (1<<16);
2647                 if(remain==len && !descfrag) {
2648                         ownbit_flag = false;    //added by david woo,2007.12.14
2649                         *tail = *tail| (1<<29) ; //fist segment of the packet
2650                         *tail = *tail |(len);
2651                 } else {
2652                         ownbit_flag = true;
2653                 }
2654
2655                 for(i=0;i<buflen&& remain >0;i++,remain--){
2656                         ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer
2657                         if(remain == 4 && i+4 >= buflen) break;
2658                         /* ensure the last desc has at least 4 bytes payload */
2659
2660                 }
2661                 txbuf = txbuf + i;
2662                 *(tail+3)=*(tail+3) &~ 0xfff;
2663                 *(tail+3)=*(tail+3) | i; // buffer lenght
2664                 // Use short preamble or not
2665                 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
2666                         if (priv->plcp_preamble_mode==1 && rate!=0)     //  short mode now, not long!
2667                         //      *tail |= (1<<16);                               // enable short preamble mode.
2668
2669                 if(bCTSEnable) {
2670                         *tail |= (1<<18);
2671                 }
2672
2673                 if(bRTSEnable) //rts enable
2674                 {
2675                         *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
2676                         *tail |= (1<<23);//rts enable
2677                         *(tail+1) |=(RtsDur&0xffff);//RTS Duration
2678                 }
2679                 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
2680 //              *(tail+3) |= (0xe6<<16);
2681                 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
2682
2683                 *tail = *tail | ((rate&0xf) << 24);
2684                 //DMESG("rate %d",rate);
2685
2686                 if(priv->card_8185){
2687            //           *(tail+5) = 0;
2688                 }
2689
2690                 /* hw_plcp_len is not used for rtl8180 chip */
2691                 /* FIXME */
2692                 if(priv->card_8185 == 0 || !priv->hw_plcp_len){
2693
2694                         duration = rtl8180_len2duration(len,
2695                                 rate,&ext);
2696
2697                         *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
2698                         if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension
2699                 }
2700
2701                 if(morefrag) *tail = (*tail) | (1<<17); // more fragment
2702                 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame
2703
2704                *(tail+5) = *(tail+5)|(2<<27);
2705                 *(tail+7) = *(tail+7)|(1<<4);
2706
2707                 wmb();
2708                 if(ownbit_flag)
2709                 {
2710                         *tail = *tail | (1<<31); // descriptor ready to be txed
2711                 }
2712
2713                 if((tail - begin)/8 == count-1)
2714                         tail=begin;
2715
2716                 else
2717                         tail=tail+8;
2718
2719                 buflist=buflist->next;
2720
2721                 mb();
2722
2723                 switch(priority) {
2724                         case MANAGE_PRIORITY:
2725                                 priv->txmapringtail=tail;
2726                                 priv->txmapbufstail=buflist;
2727                                 break;
2728
2729                         case BK_PRIORITY:
2730                                 priv->txbkpringtail=tail;
2731                                 priv->txbkpbufstail=buflist;
2732                                 break;
2733
2734                         case BE_PRIORITY:
2735                                 priv->txbepringtail=tail;
2736                                 priv->txbepbufstail=buflist;
2737                                 break;
2738
2739                         case VI_PRIORITY:
2740                                 priv->txvipringtail=tail;
2741                                 priv->txvipbufstail=buflist;
2742                                 break;
2743
2744                         case VO_PRIORITY:
2745                                 priv->txvopringtail=tail;
2746                                 priv->txvopbufstail=buflist;
2747                                 break;
2748
2749                         case HI_PRIORITY:
2750                                 priv->txhpringtail=tail;
2751                                 priv->txhpbufstail = buflist;
2752                                 break;
2753
2754                         case BEACON_PRIORITY:
2755                                 /* the HW seems to be happy with the 1st
2756                                  * descriptor filled and the 2nd empty...
2757                                  * So always update descriptor 1 and never
2758                                  * touch 2nd
2759                                  */
2760                         //      priv->txbeaconringtail=tail;
2761                         //      priv->txbeaconbufstail=buflist;
2762
2763                                 break;
2764
2765                 }
2766
2767                 //rtl8180_dma_kick(dev,priority);
2768         }
2769         *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed
2770         rtl8180_dma_kick(dev,priority);
2771         //spin_unlock_irqrestore(&priv->tx_lock,flags);
2772
2773         return 0;
2774
2775 }
2776
2777
2778 void rtl8180_irq_rx_tasklet(struct r8180_priv * priv);
2779
2780
2781 void rtl8180_link_change(struct net_device *dev)
2782 {
2783         struct r8180_priv *priv = ieee80211_priv(dev);
2784         u16 beacon_interval;
2785
2786         struct ieee80211_network *net = &priv->ieee80211->current_network;
2787 //      rtl8180_adapter_start(dev);
2788         rtl8180_update_msr(dev);
2789
2790
2791         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2792
2793         write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
2794         write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
2795
2796
2797         beacon_interval  = read_nic_dword(dev,BEACON_INTERVAL);
2798         beacon_interval &= ~ BEACON_INTERVAL_MASK;
2799         beacon_interval |= net->beacon_interval;
2800         write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
2801
2802         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2803
2804
2805         /*
2806         u16 atim = read_nic_dword(dev,ATIM);
2807         u16 = u16 &~ ATIM_MASK;
2808         u16 = u16 | beacon->atim;
2809         */
2810
2811         if(priv->card_8185)
2812                 rtl8180_set_chan(dev, priv->chan);
2813
2814
2815 }
2816
2817 void rtl8180_rq_tx_ack(struct net_device *dev){
2818
2819         struct r8180_priv *priv = ieee80211_priv(dev);
2820 //      printk("====================>%s\n",__func__);
2821         write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT);
2822         priv->ack_tx_to_ieee = 1;
2823 }
2824
2825 short rtl8180_is_tx_queue_empty(struct net_device *dev){
2826
2827         struct r8180_priv *priv = ieee80211_priv(dev);
2828         u32* d;
2829
2830         for (d = priv->txmapring;
2831                 d < priv->txmapring + priv->txringcount;d+=8)
2832                         if(*d & (1<<31)) return 0;
2833
2834         for (d = priv->txbkpring;
2835                 d < priv->txbkpring + priv->txringcount;d+=8)
2836                         if(*d & (1<<31)) return 0;
2837
2838         for (d = priv->txbepring;
2839                 d < priv->txbepring + priv->txringcount;d+=8)
2840                         if(*d & (1<<31)) return 0;
2841
2842         for (d = priv->txvipring;
2843                 d < priv->txvipring + priv->txringcount;d+=8)
2844                         if(*d & (1<<31)) return 0;
2845
2846         for (d = priv->txvopring;
2847                 d < priv->txvopring + priv->txringcount;d+=8)
2848                         if(*d & (1<<31)) return 0;
2849
2850         for (d = priv->txhpring;
2851                 d < priv->txhpring + priv->txringcount;d+=8)
2852                         if(*d & (1<<31)) return 0;
2853         return 1;
2854 }
2855 /* FIXME FIXME 5msecs is random */
2856 #define HW_WAKE_DELAY 5
2857
2858 void rtl8180_hw_wakeup(struct net_device *dev)
2859 {
2860         unsigned long flags;
2861
2862         struct r8180_priv *priv = ieee80211_priv(dev);
2863
2864         spin_lock_irqsave(&priv->ps_lock,flags);
2865         //DMESG("Waken up!");
2866         write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT);
2867
2868         if(priv->rf_wakeup)
2869                 priv->rf_wakeup(dev);
2870 //      mdelay(HW_WAKE_DELAY);
2871         spin_unlock_irqrestore(&priv->ps_lock,flags);
2872 }
2873
2874 void rtl8180_hw_sleep_down(struct net_device *dev)
2875 {
2876         unsigned long flags;
2877
2878         struct r8180_priv *priv = ieee80211_priv(dev);
2879
2880         spin_lock_irqsave(&priv->ps_lock,flags);
2881        //DMESG("Sleep!");
2882
2883         if(priv->rf_sleep)
2884                 priv->rf_sleep(dev);
2885         spin_unlock_irqrestore(&priv->ps_lock,flags);
2886 }
2887
2888
2889 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2890 {
2891
2892         struct r8180_priv *priv = ieee80211_priv(dev);
2893
2894         u32 rb = jiffies;
2895         unsigned long flags;
2896
2897         spin_lock_irqsave(&priv->ps_lock,flags);
2898
2899         /* Writing HW register with 0 equals to disable
2900          * the timer, that is not really what we want
2901          */
2902         tl -= MSECS(4+16+7);
2903
2904         //if(tl == 0) tl = 1;
2905
2906         /* FIXME HACK FIXME HACK */
2907 //      force_pci_posting(dev);
2908         //mdelay(1);
2909
2910 //      rb = read_nic_dword(dev, TSFTR);
2911
2912         /* If the interval in witch we are requested to sleep is too
2913          * short then give up and remain awake
2914          */
2915         if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2916                 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2917                 spin_unlock_irqrestore(&priv->ps_lock,flags);
2918                 printk("too short to sleep\n");
2919                 return;
2920         }
2921
2922 //      write_nic_dword(dev, TimerInt, tl);
2923 //      rb = read_nic_dword(dev, TSFTR);
2924         {
2925                 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
2926         //      if (tl<rb)
2927
2928                 //lzm,add,080828
2929                 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2930
2931                 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
2932         }
2933         /* if we suspect the TimerInt is gone beyond tl
2934          * while setting it, then give up
2935          */
2936 #if 1
2937         if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
2938                 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2939                 spin_unlock_irqrestore(&priv->ps_lock,flags);
2940                 return;
2941         }
2942 #endif
2943 //      if(priv->rf_sleep)
2944 //              priv->rf_sleep(dev);
2945
2946         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2947         spin_unlock_irqrestore(&priv->ps_lock,flags);
2948 }
2949
2950
2951 //void rtl8180_wmm_param_update(struct net_device *dev,u8 *ac_param)
2952 void rtl8180_wmm_param_update(struct work_struct * work)
2953 {
2954         struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
2955         //struct r8180_priv *priv = (struct r8180_priv*)(ieee->priv);
2956         struct net_device *dev = ieee->dev;
2957         u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2958         u8 mode = ieee->current_network.mode;
2959         AC_CODING       eACI;
2960         AC_PARAM        AcParam;
2961         PAC_PARAM       pAcParam;
2962         u8 i;
2963
2964         if(!ieee->current_network.QoS_Enable){
2965                 //legacy ac_xx_param update
2966                 AcParam.longData = 0;
2967                 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
2968                 AcParam.f.AciAifsn.f.ACM = 0;
2969                 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
2970                 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
2971                 AcParam.f.TXOPLimit = 0;
2972                 for(eACI = 0; eACI < AC_MAX; eACI++){
2973                         AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2974                         {
2975                                 u8              u1bAIFS;
2976                                 u32             u4bAcParam;
2977                                 pAcParam = (PAC_PARAM)(&AcParam);
2978                                 // Retrive paramters to udpate.
2979                                 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
2980                                 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2981                                               (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2982                                               (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2983                                                (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2984                                 switch(eACI){
2985                                         case AC1_BK:
2986                                                 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2987                                                 break;
2988
2989                                         case AC0_BE:
2990                                                 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2991                                                 break;
2992
2993                                         case AC2_VI:
2994                                                 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2995                                                 break;
2996
2997                                         case AC3_VO:
2998                                                 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2999                                                 break;
3000
3001                                         default:
3002                                                 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
3003                                                 break;
3004                                 }
3005                         }
3006                 }
3007                 return;
3008         }
3009
3010         for(i = 0; i < AC_MAX; i++){
3011                 //AcParam.longData = 0;
3012                 pAcParam = (AC_PARAM * )ac_param;
3013                 {
3014                         AC_CODING       eACI;
3015                         u8              u1bAIFS;
3016                         u32             u4bAcParam;
3017
3018                         // Retrive paramters to udpate.
3019                         eACI = pAcParam->f.AciAifsn.f.ACI;
3020                         //Mode G/A: slotTimeTimer = 9; Mode B: 20
3021                         u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3022                         u4bAcParam = (  (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)  |
3023                                         (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)  |
3024                                         (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)  |
3025                                         (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3026
3027                         switch(eACI){
3028                                 case AC1_BK:
3029                                         write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3030                                         break;
3031
3032                                 case AC0_BE:
3033                                         write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3034                                         break;
3035
3036                                 case AC2_VI:
3037                                         write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3038                                         break;
3039
3040                                 case AC3_VO:
3041                                         write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3042                                         break;
3043
3044                                 default:
3045                                         printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
3046                                         break;
3047                         }
3048                 }
3049                 ac_param += (sizeof(AC_PARAM));
3050         }
3051 }
3052
3053 void rtl8180_tx_irq_wq(struct work_struct *work);
3054 void rtl8180_restart_wq(struct work_struct *work);
3055 //void rtl8180_rq_tx_ack(struct work_struct *work);
3056 void rtl8180_watch_dog_wq(struct work_struct *work);
3057 void rtl8180_hw_wakeup_wq(struct work_struct *work);
3058 void rtl8180_hw_sleep_wq(struct work_struct *work);
3059 void rtl8180_sw_antenna_wq(struct work_struct *work);
3060 void rtl8180_watch_dog(struct net_device *dev);
3061
3062 void watch_dog_adaptive(unsigned long data)
3063 {
3064     struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
3065 //      DMESG("---->watch_dog_adaptive()\n");
3066         if(!priv->up)
3067         {
3068                 DMESG("<----watch_dog_adaptive():driver is not up!\n");
3069                 return;
3070         }
3071
3072   //      queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq);
3073 //{by amy 080312
3074 #if 1
3075         // Tx High Power Mechanism.
3076 #ifdef HIGH_POWER
3077         if(CheckHighPower((struct net_device *)data))
3078         {
3079                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
3080         }
3081 #endif
3082
3083         // Tx Power Tracking on 87SE.
3084 #ifdef TX_TRACK
3085         //if( priv->bTxPowerTrack )     //lzm mod 080826
3086         if( CheckTxPwrTracking((struct net_device *)data));
3087                 TxPwrTracking87SE((struct net_device *)data);
3088 #endif
3089
3090         // Perform DIG immediately.
3091 #ifdef SW_DIG
3092         if(CheckDig((struct net_device *)data) == true)
3093         {
3094                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
3095         }
3096 #endif
3097 #endif
3098 //by amy 080312}
3099         rtl8180_watch_dog((struct net_device *)data);
3100
3101
3102         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
3103
3104         priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
3105         add_timer(&priv->watch_dog_timer);
3106 //        DMESG("<----watch_dog_adaptive()\n");
3107 }
3108
3109
3110 static CHANNEL_LIST ChannelPlan[] = {
3111         {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},                 //FCC
3112         {{1,2,3,4,5,6,7,8,9,10,11},11},                                                 //IC
3113         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //ETSI
3114         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},    //Spain. Change to ETSI.
3115         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //France. Change to ETSI.
3116         {{14,36,40,44,48,52,56,60,64},9},                                               //MKK
3117         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
3118         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //Israel.
3119         {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},                       // For 11a , TELEC
3120         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
3121         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826
3122 };
3123
3124 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
3125 {
3126         int i;
3127
3128         //lzm add 080826
3129         ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
3130         ieee->IbssStartChnl=0;
3131
3132         switch (channel_plan)
3133         {
3134                 case COUNTRY_CODE_FCC:
3135                 case COUNTRY_CODE_IC:
3136                 case COUNTRY_CODE_ETSI:
3137                 case COUNTRY_CODE_SPAIN:
3138                 case COUNTRY_CODE_FRANCE:
3139                 case COUNTRY_CODE_MKK:
3140                 case COUNTRY_CODE_MKK1:
3141                 case COUNTRY_CODE_ISRAEL:
3142                 case COUNTRY_CODE_TELEC:
3143                 {
3144                         Dot11d_Init(ieee);
3145                         ieee->bGlobalDomain = false;
3146                         if (ChannelPlan[channel_plan].Len != 0){
3147                                 // Clear old channel map
3148                                 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
3149                                 // Set new channel map
3150                                 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
3151                                 {
3152                                         if(ChannelPlan[channel_plan].Channel[i] <= 14)
3153                                                 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
3154                                 }
3155                         }
3156                         break;
3157                 }
3158                 case COUNTRY_CODE_GLOBAL_DOMAIN:
3159                 {
3160                         GET_DOT11D_INFO(ieee)->bEnabled = 0;
3161                         Dot11d_Reset(ieee);
3162                         ieee->bGlobalDomain = true;
3163                         break;
3164                 }
3165                 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826
3166                 {
3167                 ieee->MinPassiveChnlNum=12;
3168                 ieee->IbssStartChnl= 10;
3169                 break;
3170                 }
3171                 default:
3172                 {
3173                         Dot11d_Init(ieee);
3174                         ieee->bGlobalDomain = false;
3175                         memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
3176                         for (i=1;i<=14;i++)
3177                         {
3178                                 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
3179                         }
3180                         break;
3181                 }
3182         }
3183 }
3184
3185 //Add for RF power on power off by lizhaoming 080512
3186 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
3187
3188 //YJ,add,080828
3189 static void rtl8180_statistics_init(struct Stats *pstats)
3190 {
3191         memset(pstats, 0, sizeof(struct Stats));
3192 }
3193 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
3194 {
3195         memset(plink_detect, 0, sizeof(link_detect_t));
3196         plink_detect->SlotNum = DEFAULT_SLOT_NUM;
3197 }
3198 //YJ,add,080828,end
3199
3200 short rtl8180_init(struct net_device *dev)
3201 {
3202         struct r8180_priv *priv = ieee80211_priv(dev);
3203         u16 word;
3204         u16 version;
3205         u8 hw_version;
3206         //u8 config3;
3207         u32 usValue;
3208         u16 tmpu16;
3209         int i, j;
3210
3211         priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF;
3212         if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
3213                 printk("rtl8180_init:Error channel plan! Set to default.\n");
3214                 priv->channel_plan = 0;
3215         }
3216         //priv->channel_plan = 9;  //Global Domain
3217
3218         DMESG("Channel plan is %d\n",priv->channel_plan);
3219         rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
3220
3221         //memcpy(priv->stats,0,sizeof(struct Stats));
3222
3223         //FIXME: these constants are placed in a bad pleace.
3224         priv->txbuffsize = 2048;//1024;
3225         priv->txringcount = 32;//32;
3226         priv->rxbuffersize = 2048;//1024;
3227         priv->rxringcount = 64;//32;
3228         priv->txbeaconcount = 2;
3229         priv->rx_skb_complete = 1;
3230         //priv->txnp_pending.ispending=0;
3231         /* ^^ the SKB does not containt a partial RXed
3232          * packet (is empty)
3233          */
3234
3235         priv->RegThreeWireMode = HW_THREE_WIRE_SI;
3236
3237 //Add for RF power on power off by lizhaoming 080512
3238         priv->RFChangeInProgress = false;
3239         priv->SetRFPowerStateInProgress = false;
3240         priv->RFProgType = 0;
3241         priv->bInHctTest = false;
3242
3243         priv->irq_enabled=0;
3244
3245 //YJ,modified,080828
3246         rtl8180_statistics_init(&priv->stats);
3247         rtl8180_link_detect_init(&priv->link_detect);
3248 //YJ,modified,080828,end
3249
3250
3251         priv->ack_tx_to_ieee = 0;
3252         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3253         priv->ieee80211->iw_mode = IW_MODE_INFRA;
3254         priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
3255                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
3256                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
3257         priv->ieee80211->active_scan = 1;
3258         priv->ieee80211->rate = 110; //11 mbps
3259         priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
3260         priv->ieee80211->host_encrypt = 1;
3261         priv->ieee80211->host_decrypt = 1;
3262         priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
3263         priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
3264         priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
3265         priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
3266
3267         priv->hw_wep = hwwep;
3268         priv->prism_hdr=0;
3269         priv->dev=dev;
3270         priv->retry_rts = DEFAULT_RETRY_RTS;
3271         priv->retry_data = DEFAULT_RETRY_DATA;
3272         priv->RFChangeInProgress = false;
3273         priv->SetRFPowerStateInProgress = false;
3274         priv->RFProgType = 0;
3275         priv->bInHctTest = false;
3276         priv->bInactivePs = true;//false;
3277         priv->ieee80211->bInactivePs = priv->bInactivePs;
3278         priv->bSwRfProcessing = false;
3279         priv->eRFPowerState = eRfOff;
3280         priv->RfOffReason = 0;
3281         priv->LedStrategy = SW_LED_MODE0;
3282         //priv->NumRxOkInPeriod = 0;  //YJ,del,080828
3283         //priv->NumTxOkInPeriod = 0;  //YJ,del,080828
3284         priv->TxPollingTimes = 0;//lzm add 080826
3285         priv->bLeisurePs = true;
3286         priv->dot11PowerSaveMode = eActive;
3287 //by amy for antenna
3288         priv->AdMinCheckPeriod = 5;
3289         priv->AdMaxCheckPeriod = 10;
3290 // Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
3291         priv->AdMaxRxSsThreshold = 30;//60->30
3292         priv->AdRxSsThreshold = 20;//50->20
3293         priv->AdCheckPeriod = priv->AdMinCheckPeriod;
3294         priv->AdTickCount = 0;
3295         priv->AdRxSignalStrength = -1;
3296         priv->RegSwAntennaDiversityMechanism = 0;
3297         priv->RegDefaultAntenna = 0;
3298         priv->SignalStrength = 0;
3299         priv->AdRxOkCnt = 0;
3300         priv->CurrAntennaIndex = 0;
3301         priv->AdRxSsBeforeSwitched = 0;
3302         init_timer(&priv->SwAntennaDiversityTimer);
3303         priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
3304         priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
3305 //by amy for antenna
3306 //{by amy 080312
3307         priv->bDigMechanism = 1;
3308         priv->InitialGain = 6;
3309         priv->bXtalCalibration = false;
3310         priv->XtalCal_Xin = 0;
3311         priv->XtalCal_Xout = 0;
3312         priv->bTxPowerTrack = false;
3313         priv->ThermalMeter = 0;
3314         priv->FalseAlarmRegValue = 0;
3315         priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG.
3316         priv->DIG_NumberFallbackVote = 0;
3317         priv->DIG_NumberUpgradeVote = 0;
3318         priv->LastSignalStrengthInPercent = 0;
3319         priv->Stats_SignalStrength = 0;
3320         priv->LastRxPktAntenna = 0;
3321         priv->SignalQuality = 0; // in 0-100 index.
3322         priv->Stats_SignalQuality = 0;
3323         priv->RecvSignalPower = 0; // in dBm.
3324         priv->Stats_RecvSignalPower = 0;
3325         priv->AdMainAntennaRxOkCnt = 0;
3326         priv->AdAuxAntennaRxOkCnt = 0;
3327         priv->bHWAdSwitched = false;
3328         priv->bRegHighPowerMechanism = true;
3329         priv->RegHiPwrUpperTh = 77;
3330         priv->RegHiPwrLowerTh = 75;
3331         priv->RegRSSIHiPwrUpperTh = 70;
3332         priv->RegRSSIHiPwrLowerTh = 20;
3333         priv->bCurCCKPkt = false;
3334         priv->UndecoratedSmoothedSS = -1;
3335         priv->bToUpdateTxPwr = false;
3336         priv->CurCCKRSSI = 0;
3337         priv->RxPower = 0;
3338         priv->RSSI = 0;
3339         //YJ,add,080828
3340         priv->NumTxOkTotal = 0;
3341         priv->NumTxUnicast = 0;
3342         priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
3343         priv->PowerProfile = POWER_PROFILE_AC;
3344         //YJ,add,080828,end
3345 //by amy for rate adaptive
3346     priv->CurrRetryCnt=0;
3347     priv->LastRetryCnt=0;
3348     priv->LastTxokCnt=0;
3349     priv->LastRxokCnt=0;
3350     priv->LastRetryRate=0;
3351     priv->bTryuping=0;
3352     priv->CurrTxRate=0;
3353     priv->CurrRetryRate=0;
3354     priv->TryupingCount=0;
3355     priv->TryupingCountNoData=0;
3356     priv->TryDownCountLowData=0;
3357     priv->LastTxOKBytes=0;
3358     priv->LastFailTxRate=0;
3359     priv->LastFailTxRateSS=0;
3360     priv->FailTxRateCount=0;
3361     priv->LastTxThroughput=0;
3362     priv->NumTxOkBytesTotal=0;
3363         priv->ForcedDataRate = 0;
3364         priv->RegBModeGainStage = 1;
3365
3366 //by amy for rate adaptive
3367 //by amy 080312}
3368         priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
3369         spin_lock_init(&priv->irq_lock);
3370         spin_lock_init(&priv->irq_th_lock);
3371         spin_lock_init(&priv->tx_lock);
3372         spin_lock_init(&priv->ps_lock);
3373         spin_lock_init(&priv->rf_ps_lock);
3374         sema_init(&priv->wx_sem,1);
3375         sema_init(&priv->rf_state,1);
3376         INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq);
3377         INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq);
3378         INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq);
3379         INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq);
3380         //INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq);
3381         //INIT_DELAYED_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq);
3382         INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update);
3383         INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312
3384         INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312
3385         INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312
3386
3387         //add for RF power on power off by lizhaoming 080512
3388         INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack);
3389         //INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
3390
3391         tasklet_init(&priv->irq_rx_tasklet,
3392                      (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
3393                      (unsigned long)priv);
3394 //by amy
3395     init_timer(&priv->watch_dog_timer);
3396         priv->watch_dog_timer.data = (unsigned long)dev;
3397         priv->watch_dog_timer.function = watch_dog_adaptive;
3398 //by amy
3399
3400 //{by amy 080312
3401 //by amy for rate adaptive
3402     init_timer(&priv->rateadapter_timer);
3403         priv->rateadapter_timer.data = (unsigned long)dev;
3404         priv->rateadapter_timer.function = timer_rate_adaptive;
3405                 priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD;
3406                 priv->bEnhanceTxPwr=false;
3407 //by amy for rate adaptive
3408 //by amy 080312}
3409         //priv->ieee80211->func =
3410         //      kmalloc(sizeof(struct ieee80211_helper_functions),GFP_KERNEL);
3411         //memset(priv->ieee80211->func, 0,
3412           //     sizeof(struct ieee80211_helper_functions));
3413
3414         priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
3415         priv->ieee80211->set_chan = rtl8180_set_chan;
3416         priv->ieee80211->link_change = rtl8180_link_change;
3417         priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
3418         priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
3419         priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
3420
3421         priv->ieee80211->init_wmmparam_flag = 0;
3422
3423         priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
3424         priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
3425         priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
3426
3427         priv->MWIEnable = 0;
3428
3429         priv->ShortRetryLimit = 7;
3430         priv->LongRetryLimit = 7;
3431         priv->EarlyRxThreshold = 7;
3432
3433         priv->CSMethod = (0x01 << 29);
3434
3435         priv->TransmitConfig    =
3436                                                                         1<<TCR_DurProcMode_OFFSET |             //for RTL8185B, duration setting by HW
3437                                                                         (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
3438                                                                         (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |       // Short retry limit
3439                                                                         (priv->LongRetryLimit<<TCR_LRL_OFFSET) |        // Long retry limit
3440                                                                         (0 ? TCR_SAT : 0);      // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
3441
3442         priv->ReceiveConfig     =
3443 //                                                              RCR_ENMARP |
3444                                                                 RCR_AMF | RCR_ADF |                             //accept management/data
3445                                                                 RCR_ACF |                                               //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
3446                                                                 RCR_AB | RCR_AM | RCR_APM |             //accept BC/MC/UC
3447                                                                 //RCR_AICV | RCR_ACRC32 |               //accept ICV/CRC error packet
3448                                                                 (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
3449                                                                 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
3450                                                                 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
3451
3452         priv->IntrMask          = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
3453                                                                 IMR_THPDER | IMR_THPDOK |
3454                                                                 IMR_TVODER | IMR_TVODOK |
3455                                                                 IMR_TVIDER | IMR_TVIDOK |
3456                                                                 IMR_TBEDER | IMR_TBEDOK |
3457                                                                 IMR_TBKDER | IMR_TBKDOK |
3458                                                                 IMR_RDU |                                               // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27.
3459                                                                 IMR_RER | IMR_ROK |
3460                                                                 IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko.
3461
3462         priv->InitialGain = 6;
3463
3464         hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
3465
3466         switch (hw_version){
3467                 case HW_VERID_R8185B_B:
3468                         priv->card_8185 = VERSION_8187S_C;
3469                         DMESG("MAC controller is a RTL8187SE b/g");
3470                         priv->phy_ver = 2;
3471                         break;
3472                 case HW_VERID_R8185_ABC:
3473                         DMESG("MAC controller is a RTL8185 b/g");
3474                         priv->card_8185 = 1;
3475                         /* you should not find a card with 8225 PHY ver < C*/
3476                         priv->phy_ver = 2;
3477                         break;
3478
3479                 case HW_VERID_R8185_D:
3480                         DMESG("MAC controller is a RTL8185 b/g (V. D)");
3481                         priv->card_8185 = 2;
3482                         /* you should not find a card with 8225 PHY ver < C*/
3483                         priv->phy_ver = 2;
3484                         break;
3485
3486                 case HW_VERID_R8180_ABCD:
3487                         DMESG("MAC controller is a RTL8180");
3488                         priv->card_8185 = 0;
3489                         break;
3490
3491                 case HW_VERID_R8180_F:
3492                         DMESG("MAC controller is a RTL8180 (v. F)");
3493                         priv->card_8185 = 0;
3494                         break;
3495
3496                 default:
3497                         DMESGW("MAC chip not recognized: version %x. Assuming RTL8180",hw_version);
3498                         priv->card_8185 = 0;
3499                         break;
3500         }
3501
3502         if(priv->card_8185){
3503                 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
3504                 priv->ieee80211->short_slot = 1;
3505         }
3506         /* you should not found any 8185 Ver B Card */
3507         priv->card_8185_Bversion = 0;
3508
3509         // just for sync 85
3510         priv->card_type = PCI;
3511         DMESG("This is a PCI NIC");
3512         priv->enable_gpio0 = 0;
3513
3514 //by amy for antenna
3515         usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
3516         DMESG("usValue is 0x%x\n",usValue);
3517         //3Read AntennaDiversity
3518         // SW Antenna Diversity.
3519         if(     (usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE )
3520         {
3521                 priv->EEPROMSwAntennaDiversity = false;
3522                 //printk("EEPROM Disable SW Antenna Diversity\n");
3523         }
3524         else
3525         {
3526                 priv->EEPROMSwAntennaDiversity = true;
3527                 //printk("EEPROM Enable SW Antenna Diversity\n");
3528         }
3529         // Default Antenna to use.
3530         if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 )
3531         {
3532                 priv->EEPROMDefaultAntenna1 = false;
3533                 //printk("EEPROM Default Antenna 0\n");
3534         }
3535         else
3536         {
3537                 priv->EEPROMDefaultAntenna1 = true;
3538                 //printk("EEPROM Default Antenna 1\n");
3539         }
3540
3541         //
3542         // Antenna diversity mechanism. Added by Roger, 2007.11.05.
3543         //
3544         if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto
3545         {// 0: default from EEPROM.
3546                 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
3547         }
3548         else
3549         {// 1:disable antenna diversity, 2: enable antenna diversity.
3550                 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
3551         }
3552         //printk("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity);
3553
3554
3555         //
3556         // Default antenna settings. Added by Roger, 2007.11.05.
3557         //
3558         if( priv->RegDefaultAntenna == 0)
3559         {// 0: default from EEPROM.
3560                 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
3561         }
3562         else
3563         {// 1: main, 2: aux.
3564                 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
3565         }
3566         //printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);
3567 //by amy for antenna
3568         /* rtl8185 can calc plcp len in HW.*/
3569         priv->hw_plcp_len = 1;
3570
3571         priv->plcp_preamble_mode = 2;
3572         /*the eeprom type is stored in RCR register bit #6 */
3573         if (RCR_9356SEL & read_nic_dword(dev, RCR)){
3574                 priv->epromtype=EPROM_93c56;
3575                 //DMESG("Reported EEPROM chip is a 93c56 (2Kbit)");
3576         }else{
3577                 priv->epromtype=EPROM_93c46;
3578                 //DMESG("Reported EEPROM chip is a 93c46 (1Kbit)");
3579         }
3580
3581         dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
3582         dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
3583         dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
3584         dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
3585         dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
3586         dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
3587         //DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr));
3588
3589
3590         for(i=1,j=0; i<14; i+=2,j++){
3591
3592                 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j);
3593                 priv->chtxpwr[i]=word & 0xff;
3594                 priv->chtxpwr[i+1]=(word & 0xff00)>>8;
3595         }
3596         if(priv->card_8185){
3597                 for(i=1,j=0; i<14; i+=2,j++){
3598
3599                         word = eprom_read(dev,EPROM_TXPW_OFDM_CH1_2 + j);
3600                         priv->chtxpwr_ofdm[i]=word & 0xff;
3601                         priv->chtxpwr_ofdm[i+1]=(word & 0xff00)>>8;
3602                 }
3603         }
3604 //{by amy 080312
3605         //3Read crystal calibtration and thermal meter indication on 87SE.
3606
3607         // By SD3 SY's request. Added by Roger, 2007.12.11.
3608
3609         tmpu16 = eprom_read(dev, EEPROM_RSV>>1);
3610
3611         //printk("ReadAdapterInfo8185(): EEPROM_RSV(%04x)\n", tmpu16);
3612
3613                 // Crystal calibration for Xin and Xout resp.
3614                 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF
3615                 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF
3616                 if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12)
3617                         priv->bXtalCalibration = true;
3618
3619                 // Thermal meter reference indication.
3620                 priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8);
3621                 if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13)
3622                         priv->bTxPowerTrack = true;
3623
3624 //by amy 080312}
3625         word = eprom_read(dev,EPROM_TXPW_BASE);
3626         priv->cck_txpwr_base = word & 0xf;
3627         priv->ofdm_txpwr_base = (word>>4) & 0xf;
3628
3629         version = eprom_read(dev,EPROM_VERSION);
3630         DMESG("EEPROM version %x",version);
3631         if( (!priv->card_8185) && version < 0x0101){
3632                 DMESG ("EEPROM version too old, assuming defaults");
3633                 DMESG ("If you see this message *plase* send your \
3634 DMESG output to andreamrl@tiscali.it THANKS");
3635                 priv->digphy=1;
3636                 priv->antb=0;
3637                 priv->diversity=1;
3638                 priv->cs_treshold=0xc;
3639                 priv->rcr_csense=1;
3640                 priv->rf_chip=RFCHIPID_PHILIPS;
3641         }else{
3642                 if(!priv->card_8185){
3643                         u8 rfparam = eprom_read(dev,RF_PARAM);
3644                         DMESG("RfParam: %x",rfparam);
3645
3646                         priv->digphy = rfparam & (1<<RF_PARAM_DIGPHY_SHIFT) ? 0:1;
3647                         priv->antb =  rfparam & (1<<RF_PARAM_ANTBDEFAULT_SHIFT) ? 1:0;
3648
3649                         priv->rcr_csense = (rfparam & RF_PARAM_CARRIERSENSE_MASK) >>
3650                                         RF_PARAM_CARRIERSENSE_SHIFT;
3651
3652                         priv->diversity =
3653                                 (read_nic_byte(dev,CONFIG2)&(1<<CONFIG2_ANTENNA_SHIFT)) ? 1:0;
3654                 }else{
3655                         priv->rcr_csense = 3;
3656                 }
3657
3658                 priv->cs_treshold = (eprom_read(dev,ENERGY_TRESHOLD)&0xff00) >>8;
3659
3660                 priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID);
3661         }
3662
3663         priv->rf_chip = RF_ZEBRA4;
3664         priv->rf_sleep = rtl8225z4_rf_sleep;
3665         priv->rf_wakeup = rtl8225z4_rf_wakeup;
3666         //DMESG("Card reports RF frontend Realtek 8225z2");
3667         //DMESGW("This driver has EXPERIMENTAL support for this chipset.");
3668         //DMESGW("use it with care and at your own risk and");
3669         DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
3670
3671         priv->rf_close = rtl8225z2_rf_close;
3672         priv->rf_init = rtl8225z2_rf_init;
3673         priv->rf_set_chan = rtl8225z2_rf_set_chan;
3674         priv->rf_set_sens = NULL;
3675
3676         if(!priv->card_8185){
3677                 if(priv->antb)
3678                         DMESG ("Antenna B is default antenna");
3679                 else
3680                         DMESG ("Antenna A is default antenna");
3681
3682                 if(priv->diversity)
3683                         DMESG ("Antenna diversity is enabled");
3684                 else
3685                         DMESG("Antenna diversity is disabled");
3686
3687                 DMESG("Carrier sense %d",priv->rcr_csense);
3688         }
3689
3690         if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
3691                 return -ENOMEM;
3692
3693         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3694                                   TX_MANAGEPRIORITY_RING_ADDR))
3695                 return -ENOMEM;
3696
3697         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3698                                  TX_BKPRIORITY_RING_ADDR))
3699                 return -ENOMEM;
3700
3701         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3702                                  TX_BEPRIORITY_RING_ADDR))
3703                 return -ENOMEM;
3704
3705         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3706                                   TX_VIPRIORITY_RING_ADDR))
3707                 return -ENOMEM;
3708
3709         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3710                                   TX_VOPRIORITY_RING_ADDR))
3711                 return -ENOMEM;
3712
3713         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3714                                   TX_HIGHPRIORITY_RING_ADDR))
3715                 return -ENOMEM;
3716
3717         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
3718                                   TX_BEACON_RING_ADDR))
3719                 return -ENOMEM;
3720
3721
3722         //priv->beacon_buf=NULL;
3723
3724         if(!priv->card_8185){
3725
3726                 if(read_nic_byte(dev, CONFIG0) & (1<<CONFIG0_WEP40_SHIFT))
3727                         DMESG ("40-bit WEP is supported in hardware");
3728                 else
3729                         DMESG ("40-bit WEP is NOT supported in hardware");
3730
3731                 if(read_nic_byte(dev,CONFIG0) & (1<<CONFIG0_WEP104_SHIFT))
3732                         DMESG ("104-bit WEP is supported in hardware");
3733                 else
3734                         DMESG ("104-bit WEP is NOT supported in hardware");
3735         }
3736 #if !defined(SA_SHIRQ)
3737         if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){
3738 #else
3739         if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){
3740 #endif
3741                 DMESGE("Error allocating IRQ %d",dev->irq);
3742                 return -1;
3743         }else{
3744                 priv->irq=dev->irq;
3745                 DMESG("IRQ %d",dev->irq);
3746         }
3747
3748         return 0;
3749
3750 }
3751
3752
3753 void rtl8180_no_hw_wep(struct net_device *dev)
3754 {
3755         struct r8180_priv *priv = ieee80211_priv(dev);
3756
3757         if(!priv->card_8185)
3758         {
3759                 u8 security;
3760
3761                 security  = read_nic_byte(dev, SECURITY);
3762                 security &=~(1<<SECURITY_WEP_TX_ENABLE_SHIFT);
3763                 security &=~(1<<SECURITY_WEP_RX_ENABLE_SHIFT);
3764
3765                 write_nic_byte(dev, SECURITY, security);
3766
3767         }else{
3768
3769                 //FIXME!!!
3770         }
3771         /*
3772           write_nic_dword(dev,TX_CONF,read_nic_dword(dev,TX_CONF) |
3773           (1<<TX_NOICV_SHIFT) );
3774         */
3775 //      priv->ieee80211->hw_wep=0;
3776 }
3777
3778
3779 void rtl8180_set_hw_wep(struct net_device *dev)
3780 {
3781         struct r8180_priv *priv = ieee80211_priv(dev);
3782         u8 pgreg;
3783         u8 security;
3784         u32 key0_word4;
3785
3786         pgreg=read_nic_byte(dev, PGSELECT);
3787         write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
3788
3789         key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
3790         key0_word4 &= ~ 0xff;
3791         key0_word4 |= priv->key0[3]& 0xff;
3792         write_nic_dword(dev,KEY0,(priv->key0[0]));
3793         write_nic_dword(dev,KEY0+4,(priv->key0[1]));
3794         write_nic_dword(dev,KEY0+4+4,(priv->key0[2]));
3795         write_nic_dword(dev,KEY0+4+4+4,(key0_word4));
3796
3797         /*
3798           TX_CONF,read_nic_dword(dev,TX_CONF) &~(1<<TX_NOICV_SHIFT));
3799         */
3800
3801         security  = read_nic_byte(dev,SECURITY);
3802         security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
3803         security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
3804         security &= ~ SECURITY_ENCRYP_MASK;
3805         security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
3806
3807         write_nic_byte(dev, SECURITY, security);
3808
3809         DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4),
3810               read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4),
3811               read_nic_dword(dev,KEY0));
3812
3813         //priv->ieee80211->hw_wep=1;
3814 }
3815
3816
3817 void rtl8185_rf_pins_enable(struct net_device *dev)
3818 {
3819 //      u16 tmp;
3820 //      tmp = read_nic_word(dev, RFPinsEnable);
3821         write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp);
3822 //      write_nic_word(dev, RFPinsEnable,7 | tmp);
3823 }
3824
3825
3826 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
3827 {
3828         u8 conf3;
3829
3830         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3831
3832         conf3 = read_nic_byte(dev, CONFIG3);
3833         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3834         write_nic_dword(dev, ANAPARAM2, a);
3835
3836         conf3 = read_nic_byte(dev, CONFIG3);
3837         write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3838         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3839
3840 }
3841
3842
3843 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
3844 {
3845         u8 conf3;
3846
3847         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3848
3849         conf3 = read_nic_byte(dev, CONFIG3);
3850         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3851         write_nic_dword(dev, ANAPARAM, a);
3852
3853         conf3 = read_nic_byte(dev, CONFIG3);
3854         write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3855         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3856 }
3857
3858
3859 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
3860 {
3861         write_nic_byte(dev, TX_ANTENNA, ant);
3862         force_pci_posting(dev);
3863         mdelay(1);
3864 }
3865
3866
3867 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
3868 {
3869         //u8 phyr;
3870         u32 phyw;
3871         //int i;
3872
3873         adr |= 0x80;
3874
3875         phyw= ((data<<8) | adr);
3876
3877         // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
3878         write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
3879         write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
3880         write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
3881         write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
3882
3883         /* this is ok to fail when we write AGC table. check for AGC table might be
3884          * done by masking with 0x7f instead of 0xff
3885          */
3886         //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr);
3887 }
3888
3889
3890 inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
3891 {
3892         data = data & 0xff;
3893         rtl8185_write_phy(dev, adr, data);
3894 }
3895
3896
3897 void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
3898 {
3899         data = data & 0xff;
3900         rtl8185_write_phy(dev, adr, data | 0x10000);
3901 }
3902
3903
3904 /* 70*3 = 210 ms
3905  * I hope this is enougth
3906  */
3907 #define MAX_PHY 70
3908 void write_phy(struct net_device *dev, u8 adr, u8 data)
3909 {
3910         u32 phy;
3911         int i;
3912
3913         phy = 0xff0000;
3914         phy |= adr;
3915         phy |= 0x80; /* this should enable writing */
3916         phy |= (data<<8);
3917
3918         //PHY_ADR, PHY_R and PHY_W  are contig and treated as one dword
3919         write_nic_dword(dev,PHY_ADR, phy);
3920
3921         phy= 0xffff00;
3922         phy |= adr;
3923
3924         write_nic_dword(dev,PHY_ADR, phy);
3925         for(i=0;i<MAX_PHY;i++){
3926                 phy=read_nic_dword(dev,PHY_ADR);
3927                 phy= phy & 0xff0000;
3928                 phy= phy >> 16;
3929                 if(phy == data){ //SUCCESS!
3930                         force_pci_posting(dev);
3931                         mdelay(3); //random value
3932                         return;
3933                 }else{
3934                         force_pci_posting(dev);
3935                         mdelay(3); //random value
3936                 }
3937         }
3938         DMESGW ("Phy writing %x %x failed!", adr,data);
3939 }
3940
3941 void rtl8185_set_rate(struct net_device *dev)
3942 {
3943         int i;
3944         u16 word;
3945         int basic_rate,min_rr_rate,max_rr_rate;
3946
3947 //      struct r8180_priv *priv = ieee80211_priv(dev);
3948
3949         //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
3950 //              priv->ieee80211->state == IEEE80211_LINKED){
3951         basic_rate = ieeerate2rtlrate(240);
3952         min_rr_rate = ieeerate2rtlrate(60);
3953         max_rr_rate = ieeerate2rtlrate(240);
3954
3955 //
3956 //      }else{
3957 //              basic_rate = ieeerate2rtlrate(20);
3958 //              min_rr_rate = ieeerate2rtlrate(10);
3959 //              max_rr_rate = ieeerate2rtlrate(110);
3960 //      }
3961
3962         write_nic_byte(dev, RESP_RATE,
3963                         max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
3964
3965         word  = read_nic_word(dev, BRSR);
3966         word &= ~BRSR_MBR_8185;
3967
3968
3969         for(i=0;i<=basic_rate;i++)
3970                 word |= (1<<i);
3971
3972         write_nic_word(dev, BRSR, word);
3973         //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE),read_nic_word(dev,BRSR));
3974 }
3975
3976
3977
3978 void rtl8180_adapter_start(struct net_device *dev)
3979 {
3980         struct r8180_priv *priv = ieee80211_priv(dev);
3981         u32 anaparam;
3982         u16 word;
3983         u8 config3;
3984 //      int i;
3985
3986         rtl8180_rtx_disable(dev);
3987         rtl8180_reset(dev);
3988
3989         /* seems that 0xffff or 0xafff will cause
3990          * HW interrupt line crash
3991          */
3992
3993         //priv->irq_mask = 0xafff;
3994 //      priv->irq_mask = 0x4fcf;
3995
3996         /* enable beacon timeout, beacon TX ok and err
3997          * LP tx ok and err, HP TX ok and err, NP TX ok and err,
3998          * RX ok and ERR, and GP timer */
3999         priv->irq_mask = 0x6fcf;
4000
4001         priv->dma_poll_mask = 0;
4002
4003         rtl8180_beacon_tx_disable(dev);
4004
4005         if(priv->card_type == CARDBUS ){
4006                 config3=read_nic_byte(dev, CONFIG3);
4007                 write_nic_byte(dev,CONFIG3,config3 | CONFIG3_FuncRegEn);
4008                 write_nic_word(dev,FEMR, FEMR_INTR | FEMR_WKUP | FEMR_GWAKE |
4009                         read_nic_word(dev, FEMR));
4010         }
4011         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4012         write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
4013         write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
4014         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4015
4016         rtl8180_update_msr(dev);
4017
4018         if(!priv->card_8185){
4019                 anaparam  = eprom_read(dev,EPROM_ANAPARAM_ADDRLWORD);
4020                 anaparam |= eprom_read(dev,EPROM_ANAPARAM_ADDRHWORD)<<16;
4021
4022                 rtl8180_set_anaparam(dev,anaparam);
4023         }
4024         /* These might be unnecessary since we do in rx_enable / tx_enable */
4025         fix_rx_fifo(dev);
4026         fix_tx_fifo(dev);
4027         /*set_nic_rxring(dev);
4028           set_nic_txring(dev);*/
4029
4030         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4031
4032         /*
4033            The following is very strange. seems to be that 1 means test mode,
4034            but we need to acknolwledges the nic when a packet is ready
4035            altought we set it to 0
4036         */
4037
4038         write_nic_byte(dev,
4039                        CONFIG2, read_nic_byte(dev,CONFIG2) &~\
4040                        (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
4041         //^the nic isn't in test mode
4042         if(priv->card_8185)
4043                         write_nic_byte(dev,
4044                        CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4));
4045
4046         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
4047
4048         write_nic_dword(dev,INT_TIMEOUT,0);
4049
4050         if(!priv->card_8185)
4051         {
4052                 /*
4053                 experimental - this might be needed to calibrate AGC,
4054                 anyway it shouldn't hurt
4055                 */
4056                 write_nic_byte(dev, CONFIG5,
4057                         read_nic_byte(dev, CONFIG5) | (1<<AGCRESET_SHIFT));
4058                 read_nic_byte(dev, CONFIG5);
4059                 udelay(15);
4060                 write_nic_byte(dev, CONFIG5,
4061                         read_nic_byte(dev, CONFIG5) &~ (1<<AGCRESET_SHIFT));
4062         }else{
4063
4064                 write_nic_byte(dev, WPA_CONFIG, 0);
4065                 //write_nic_byte(dev, TESTR, 0xd);
4066         }
4067
4068         rtl8180_no_hw_wep(dev);
4069
4070         if(priv->card_8185){
4071                 rtl8185_set_rate(dev);
4072                 write_nic_byte(dev, RATE_FALLBACK, 0x81);
4073         //      write_nic_byte(dev, 0xdf, 0x15);
4074         }else{
4075                 word  = read_nic_word(dev, BRSR);
4076                 word &= ~BRSR_MBR;
4077                 word &= ~BRSR_BPLCP;
4078                 word |= ieeerate2rtlrate(priv->ieee80211->basic_rate);
4079 //by amy
4080               word |= 0x0f;
4081 //by amy
4082                 write_nic_word(dev, BRSR, word);
4083         }
4084
4085
4086         if(priv->card_8185){
4087                 write_nic_byte(dev, GP_ENABLE,read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
4088
4089                 //FIXME cfg 3 ClkRun enable - isn't it ReadOnly ?
4090                 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4091                 write_nic_byte(dev,CONFIG3, read_nic_byte(dev, CONFIG3)
4092 |(1<<CONFIG3_CLKRUN_SHIFT));
4093                 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4094
4095         }
4096
4097         priv->rf_init(dev);
4098
4099         if(priv->rf_set_sens != NULL)
4100                 priv->rf_set_sens(dev,priv->sens);
4101         rtl8180_irq_enable(dev);
4102
4103         netif_start_queue(dev);
4104         /*DMESG ("lfree %d",get_curr_tx_free_desc(dev,LOW_PRIORITY));
4105
4106         DMESG ("nfree %d",get_curr_tx_free_desc(dev,NORM_PRIORITY));
4107
4108         DMESG ("hfree %d",get_curr_tx_free_desc(dev,HI_PRIORITY));
4109         if(check_nic_enought_desc(dev,NORM_PRIORITY)) DMESG("NORM OK");
4110         if(check_nic_enought_desc(dev,HI_PRIORITY)) DMESG("HI OK");
4111         if(check_nic_enought_desc(dev,LOW_PRIORITY)) DMESG("LOW OK");*/
4112 }
4113
4114
4115
4116 /* this configures registers for beacon tx and enables it via
4117  * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
4118  * be used to stop beacon transmission
4119  */
4120 void rtl8180_start_tx_beacon(struct net_device *dev)
4121 {
4122 //      struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
4123         u16 word;
4124 //      DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
4125
4126         DMESG("Enabling beacon TX");
4127         //write_nic_byte(dev, 0x42,0xe6);// TCR
4128 //      set_nic_txring(dev);
4129 //      fix_tx_fifo(dev);
4130         rtl8180_prepare_beacon(dev);
4131         rtl8180_irq_disable(dev);
4132         rtl8180_beacon_tx_enable(dev);
4133
4134         word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd;
4135         write_nic_word(dev, AtimWnd,word);// word |=
4136 //priv->ieee80211->current_network.atim_window);
4137
4138         word  = read_nic_word(dev, BintrItv);
4139         word &= ~BintrItv_BintrItv;
4140         word |= 1000;/*priv->ieee80211->current_network.beacon_interval *
4141                 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
4142         // FIXME: check if correct ^^ worked with 0x3e8;
4143         */
4144         write_nic_word(dev, BintrItv, word);
4145
4146
4147         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4148
4149 //      rtl8180_beacon_tx_enable(dev);
4150         rtl8185b_irq_enable(dev);
4151         /* VV !!!!!!!!!! VV*/
4152         /*
4153         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
4154         write_nic_byte(dev,0x9d,0x00);
4155         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
4156 */
4157 //      DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
4158
4159 }
4160
4161
4162
4163 /***************************************************************************
4164     -------------------------------NET STUFF---------------------------
4165 ***************************************************************************/
4166 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
4167 {
4168         struct r8180_priv *priv = ieee80211_priv(dev);
4169
4170         return &priv->ieee80211->stats;
4171 }
4172 //
4173 // Change current and default preamble mode.
4174 // 2005.01.06, by rcnjko.
4175 //
4176 bool
4177 MgntActSet_802_11_PowerSaveMode(
4178         struct r8180_priv *priv,
4179         RT_PS_MODE              rtPsMode
4180 )
4181 {
4182
4183         // Currently, we do not change power save mode on IBSS mode.
4184         if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4185         {
4186                 return false;
4187         }
4188
4189         //
4190         // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
4191         // some AP will not response to our mgnt frames with PwrMgt bit set,
4192         // e.g. cannot associate the AP.
4193         // So I commented out it. 2005.02.16, by rcnjko.
4194         //
4195 //      // Change device's power save mode.
4196 //      Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
4197
4198         // Update power save mode configured.
4199 //      priv->dot11PowerSaveMode = rtPsMode;
4200         priv->ieee80211->ps = rtPsMode;
4201         // Determine ListenInterval.
4202
4203         return true;
4204 }
4205
4206 //================================================================================
4207 // Leisure Power Save in linked state.
4208 //================================================================================
4209
4210 //
4211 //      Description:
4212 //              Enter the leisure power save mode.
4213 //
4214 void
4215 LeisurePSEnter(
4216         struct r8180_priv *priv
4217         )
4218 {
4219         if (priv->bLeisurePs)
4220         {
4221                 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
4222                 {
4223                         //printk("----Enter PS\n");
4224                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE
4225                 }
4226         }
4227 }
4228
4229
4230 //
4231 //      Description:
4232 //              Leave the leisure power save mode.
4233 //
4234 void
4235 LeisurePSLeave(
4236         struct r8180_priv *priv
4237         )
4238 {
4239         if (priv->bLeisurePs)
4240         {
4241                 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
4242                 {
4243                         //printk("----Leave PS\n");
4244                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
4245                 }
4246         }
4247 }
4248
4249 void rtl8180_hw_wakeup_wq (struct work_struct *work)
4250 {
4251 //      struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
4252 //      struct ieee80211_device * ieee = (struct ieee80211_device*)
4253 //                                             container_of(work, struct ieee80211_device, watch_dog_wq);
4254         struct delayed_work *dwork = to_delayed_work(work);
4255         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
4256         struct net_device *dev = ieee->dev;
4257
4258 //      printk("dev is %d\n",dev);
4259 //      printk("&*&(^*(&(&=========>%s()\n", __func__);
4260         rtl8180_hw_wakeup(dev);
4261
4262 }
4263
4264 void rtl8180_hw_sleep_wq (struct work_struct *work)
4265 {
4266 //      struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
4267 //      struct ieee80211_device * ieee = (struct ieee80211_device*)
4268 //                                             container_of(work, struct ieee80211_device, watch_dog_wq);
4269         struct delayed_work *dwork = to_delayed_work(work);
4270         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
4271         struct net_device *dev = ieee->dev;
4272
4273         rtl8180_hw_sleep_down(dev);
4274 }
4275
4276 //YJ,add,080828,for KeepAlive
4277 static void MgntLinkKeepAlive(struct r8180_priv *priv )
4278 {
4279         if (priv->keepAliveLevel == 0)
4280                 return;
4281
4282         if(priv->ieee80211->state == IEEE80211_LINKED)
4283         {
4284                 //
4285                 // Keep-Alive.
4286                 //
4287                 //printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount);
4288
4289                 if ( (priv->keepAliveLevel== 2) ||
4290                         (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
4291                         priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
4292                         )
4293                 {
4294                         priv->link_detect.IdleCount++;
4295
4296                         //
4297                         // Send a Keep-Alive packet packet to AP if we had been idle for a while.
4298                         //
4299                         if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
4300                         {
4301                                 priv->link_detect.IdleCount = 0;
4302                                 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
4303                         }
4304                 }
4305                 else
4306                 {
4307                         priv->link_detect.IdleCount = 0;
4308                 }
4309                 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
4310                 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
4311         }
4312 }
4313 //YJ,add,080828,for KeepAlive,end
4314
4315 static u8 read_acadapter_file(char *filename);
4316 void rtl8180_watch_dog(struct net_device *dev)
4317 {
4318         struct r8180_priv *priv = ieee80211_priv(dev);
4319         bool bEnterPS = false;
4320         bool bBusyTraffic = false;
4321         u32 TotalRxNum = 0;
4322         u16 SlotIndex = 0;
4323         u16 i = 0;
4324 #ifdef ENABLE_IPS
4325         if(priv->ieee80211->actscanning == false){
4326                 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){
4327                         IPSEnter(dev);
4328                 }
4329         }
4330 #endif
4331         //YJ,add,080828,for link state check
4332         if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
4333                 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
4334                 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
4335                 for( i=0; i<priv->link_detect.SlotNum; i++ )
4336                         TotalRxNum+= priv->link_detect.RxFrameNum[i];
4337                 //printk("&&&&&=== TotalRxNum = %d\n", TotalRxNum);
4338                 if(TotalRxNum == 0){
4339                         priv->ieee80211->state = IEEE80211_ASSOCIATING;
4340                         queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
4341                 }
4342         }
4343
4344         //YJ,add,080828,for KeepAlive
4345         MgntLinkKeepAlive(priv);
4346
4347         //YJ,add,080828,for LPS
4348 #ifdef ENABLE_LPS
4349         if(priv->PowerProfile == POWER_PROFILE_BATTERY )
4350         {
4351                 //Turn on LeisurePS on battery power
4352                 //printk("!!!!!On battery power\n");
4353                 priv->bLeisurePs = true;
4354         }
4355         else if(priv->PowerProfile == POWER_PROFILE_AC )
4356         {
4357                 // Turn off LeisurePS on AC power
4358                 //printk("----On AC power\n");
4359                 LeisurePSLeave(priv);
4360                 priv->bLeisurePs= false;
4361         }
4362 #endif
4363
4364 #ifdef ENABLE_LPS
4365         if(priv->ieee80211->state == IEEE80211_LINKED){
4366                 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
4367                 //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod);
4368                 if(     priv->link_detect.NumRxOkInPeriod> 666 ||
4369                         priv->link_detect.NumTxOkInPeriod> 666 ) {
4370                         bBusyTraffic = true;
4371                 }
4372                 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
4373                         || (priv->link_detect.NumRxOkInPeriod > 2)) {
4374                         bEnterPS= false;
4375                 }
4376                 else {
4377                         bEnterPS= true;
4378                 }
4379
4380                 if(bEnterPS) {
4381                         LeisurePSEnter(priv);
4382                 }
4383                 else {
4384                         LeisurePSLeave(priv);
4385                 }
4386         }
4387         else{
4388                 LeisurePSLeave(priv);
4389         }
4390 #endif
4391         priv->link_detect.bBusyTraffic = bBusyTraffic;
4392         priv->link_detect.NumRxOkInPeriod = 0;
4393         priv->link_detect.NumTxOkInPeriod = 0;
4394         priv->ieee80211->NumRxDataInPeriod = 0;
4395         priv->ieee80211->NumRxBcnInPeriod = 0;
4396 }
4397 int _rtl8180_up(struct net_device *dev)
4398 {
4399         struct r8180_priv *priv = ieee80211_priv(dev);
4400         //int i;
4401
4402         priv->up=1;
4403
4404         DMESG("Bringing up iface");
4405         rtl8185b_adapter_start(dev);
4406         rtl8185b_rx_enable(dev);
4407         rtl8185b_tx_enable(dev);
4408 #ifdef ENABLE_IPS
4409         if(priv->bInactivePs){
4410                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4411                         IPSLeave(dev);
4412         }
4413 #endif
4414 //by amy 080312
4415 #ifdef RATE_ADAPT
4416        timer_rate_adaptive((unsigned long)dev);
4417 #endif
4418 //by amy 080312
4419         watch_dog_adaptive((unsigned long)dev);
4420 #ifdef SW_ANTE
4421         if(priv->bSwAntennaDiverity)
4422                         SwAntennaDiversityTimerCallback(dev);
4423 #endif
4424 //      IPSEnter(dev);
4425         ieee80211_softmac_start_protocol(priv->ieee80211);
4426
4427 //Add for RF power on power off by lizhaoming 080512
4428 //      priv->eRFPowerState = eRfOn;
4429 //      printk("\n--------Start queue_work:GPIOChangeRFWorkItem");
4430 //      queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,1000);
4431
4432         return 0;
4433 }
4434
4435
4436 int rtl8180_open(struct net_device *dev)
4437 {
4438         struct r8180_priv *priv = ieee80211_priv(dev);
4439         int ret;
4440
4441         down(&priv->wx_sem);
4442         ret = rtl8180_up(dev);
4443         up(&priv->wx_sem);
4444         return ret;
4445
4446 }
4447
4448
4449 int rtl8180_up(struct net_device *dev)
4450 {
4451         struct r8180_priv *priv = ieee80211_priv(dev);
4452
4453         if (priv->up == 1) return -1;
4454
4455         return _rtl8180_up(dev);
4456 }
4457
4458
4459 int rtl8180_close(struct net_device *dev)
4460 {
4461         struct r8180_priv *priv = ieee80211_priv(dev);
4462         int ret;
4463
4464         down(&priv->wx_sem);
4465         ret = rtl8180_down(dev);
4466         up(&priv->wx_sem);
4467
4468         return ret;
4469
4470 }
4471
4472 int rtl8180_down(struct net_device *dev)
4473 {
4474         struct r8180_priv *priv = ieee80211_priv(dev);
4475
4476         if (priv->up == 0) return -1;
4477
4478         priv->up=0;
4479
4480         ieee80211_softmac_stop_protocol(priv->ieee80211);
4481         /* FIXME */
4482         if (!netif_queue_stopped(dev))
4483                 netif_stop_queue(dev);
4484         rtl8180_rtx_disable(dev);
4485         rtl8180_irq_disable(dev);
4486         del_timer_sync(&priv->watch_dog_timer);
4487         //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
4488 //{by amy 080312
4489     del_timer_sync(&priv->rateadapter_timer);
4490     cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
4491 //by amy 080312}
4492         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
4493         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
4494         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
4495         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
4496         del_timer_sync(&priv->SwAntennaDiversityTimer);
4497         SetZebraRFPowerState8185(dev,eRfOff);
4498         //ieee80211_softmac_stop_protocol(priv->ieee80211);
4499         memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
4500         priv->ieee80211->state = IEEE80211_NOLINK;
4501         return 0;
4502 }
4503
4504 void rtl8180_restart_wq(struct work_struct *work)
4505 {
4506         struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
4507         struct net_device *dev = priv->dev;
4508
4509         down(&priv->wx_sem);
4510
4511         rtl8180_commit(dev);
4512
4513         up(&priv->wx_sem);
4514 }
4515
4516 void rtl8180_restart(struct net_device *dev)
4517 {
4518         struct r8180_priv *priv = ieee80211_priv(dev);
4519         //rtl8180_commit(dev);
4520         schedule_work(&priv->reset_wq);
4521         //DMESG("TXTIMEOUT");
4522 }
4523
4524
4525 void rtl8180_commit(struct net_device *dev)
4526 {
4527         struct r8180_priv *priv = ieee80211_priv(dev);
4528
4529         if (priv->up == 0) return ;
4530 //+by amy 080312
4531         del_timer_sync(&priv->watch_dog_timer);
4532         //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
4533 //{by amy 080312
4534 //by amy for rate adaptive
4535     del_timer_sync(&priv->rateadapter_timer);
4536     cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
4537 //by amy for rate adaptive
4538 //by amy 080312}
4539         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
4540         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
4541         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
4542         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
4543         del_timer_sync(&priv->SwAntennaDiversityTimer);
4544         ieee80211_softmac_stop_protocol(priv->ieee80211);
4545         rtl8180_irq_disable(dev);
4546         rtl8180_rtx_disable(dev);
4547         _rtl8180_up(dev);
4548 }
4549
4550
4551 static void r8180_set_multicast(struct net_device *dev)
4552 {
4553         struct r8180_priv *priv = ieee80211_priv(dev);
4554         short promisc;
4555
4556         //down(&priv->wx_sem);
4557
4558         promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4559
4560         if (promisc != priv->promisc)
4561                 rtl8180_restart(dev);
4562
4563         priv->promisc = promisc;
4564
4565         //up(&priv->wx_sem);
4566 }
4567
4568 int r8180_set_mac_adr(struct net_device *dev, void *mac)
4569 {
4570         struct r8180_priv *priv = ieee80211_priv(dev);
4571         struct sockaddr *addr = mac;
4572
4573         down(&priv->wx_sem);
4574
4575         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
4576
4577         if(priv->ieee80211->iw_mode == IW_MODE_MASTER)
4578                 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
4579
4580         if (priv->up) {
4581                 rtl8180_down(dev);
4582                 rtl8180_up(dev);
4583         }
4584
4585         up(&priv->wx_sem);
4586
4587         return 0;
4588 }
4589
4590 /* based on ipw2200 driver */
4591 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
4592 {
4593         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
4594
4595         struct iwreq *wrq = (struct iwreq *) rq;
4596         int ret=-1;
4597         switch (cmd) {
4598             case RTL_IOCTL_WPA_SUPPLICANT:
4599                 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
4600                 return ret;
4601
4602             default:
4603                 return -EOPNOTSUPP;
4604         }
4605
4606         return -EOPNOTSUPP;
4607 }
4608
4609
4610
4611 /****************************************************************************
4612      -----------------------------PCI STUFF---------------------------
4613 *****************************************************************************/
4614
4615 static const struct net_device_ops rtl8180_netdev_ops = {
4616         .ndo_open               = rtl8180_open,
4617         .ndo_stop               = rtl8180_close,
4618         .ndo_get_stats          = rtl8180_stats,
4619         .ndo_tx_timeout         = rtl8180_restart,
4620         .ndo_do_ioctl           = rtl8180_ioctl,
4621         .ndo_set_multicast_list = r8180_set_multicast,
4622         .ndo_set_mac_address    = r8180_set_mac_adr,
4623         .ndo_validate_addr      = eth_validate_addr,
4624         .ndo_change_mtu         = eth_change_mtu,
4625         .ndo_start_xmit         = ieee80211_xmit,
4626 };
4627
4628 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
4629                                        const struct pci_device_id *id)
4630 {
4631         unsigned long ioaddr = 0;
4632         struct net_device *dev = NULL;
4633         struct r8180_priv *priv= NULL;
4634         //u8 *ptr;
4635         u8 unit = 0;
4636
4637         unsigned long pmem_start, pmem_len, pmem_flags;
4638
4639         DMESG("Configuring chip resources");
4640
4641         if( pci_enable_device (pdev) ){
4642                 DMESG("Failed to enable PCI device");
4643                 return -EIO;
4644         }
4645
4646         pci_set_master(pdev);
4647         //pci_set_wmi(pdev);
4648         pci_set_dma_mask(pdev, 0xffffff00ULL);
4649         pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
4650         dev = alloc_ieee80211(sizeof(struct r8180_priv));
4651         if (!dev)
4652                 return -ENOMEM;
4653         priv = ieee80211_priv(dev);
4654         priv->ieee80211 = netdev_priv(dev);
4655
4656         pci_set_drvdata(pdev, dev);
4657         SET_NETDEV_DEV(dev, &pdev->dev);
4658
4659         priv = ieee80211_priv(dev);
4660 //      memset(priv,0,sizeof(struct r8180_priv));
4661         priv->pdev=pdev;
4662
4663
4664
4665         pmem_start = pci_resource_start(pdev, 1);
4666         pmem_len = pci_resource_len(pdev, 1);
4667         pmem_flags = pci_resource_flags (pdev, 1);
4668
4669         if (!(pmem_flags & IORESOURCE_MEM)) {
4670                 DMESG("region #1 not a MMIO resource, aborting");
4671                 goto fail;
4672         }
4673
4674         //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
4675         if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
4676                 DMESG("request_mem_region failed!");
4677                 goto fail;
4678         }
4679
4680
4681         ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
4682         if( ioaddr == (unsigned long)NULL ){
4683                 DMESG("ioremap failed!");
4684                // release_mem_region( pmem_start, pmem_len );
4685                 goto fail1;
4686         }
4687
4688         dev->mem_start = ioaddr; // shared mem start
4689         dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
4690
4691
4692         //pci_read_config_byte(pdev, 0x05, ptr);
4693         //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04));
4694         pci_read_config_byte(pdev, 0x05, &unit);
4695         pci_write_config_byte(pdev, 0x05, unit & (~0x04));
4696
4697         dev->irq = pdev->irq;
4698         priv->irq = 0;
4699
4700         dev->netdev_ops = &rtl8180_netdev_ops;
4701         dev->wireless_handlers = &r8180_wx_handlers_def;
4702
4703         dev->type=ARPHRD_ETHER;
4704         dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13
4705
4706         if (dev_alloc_name(dev, ifname) < 0){
4707                 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
4708                 ifname = "wlan%d";
4709         //      ifname = "ath%d";
4710                 dev_alloc_name(dev, ifname);
4711         }
4712
4713
4714         if(rtl8180_init(dev)!=0){
4715                 DMESG("Initialization failed");
4716                 goto fail1;
4717         }
4718
4719         netif_carrier_off(dev);
4720
4721         register_netdev(dev);
4722
4723         rtl8180_proc_init_one(dev);
4724
4725         DMESG("Driver probe completed\n");
4726         return 0;
4727
4728 fail1:
4729
4730         if( dev->mem_start != (unsigned long)NULL ){
4731                 iounmap( (void *)dev->mem_start );
4732                 release_mem_region( pci_resource_start(pdev, 1),
4733                                     pci_resource_len(pdev, 1) );
4734         }
4735
4736
4737 fail:
4738         if(dev){
4739
4740                 if (priv->irq) {
4741                         free_irq(dev->irq, dev);
4742                         dev->irq=0;
4743                 }
4744                 free_ieee80211(dev);
4745         }
4746
4747         pci_disable_device(pdev);
4748
4749         DMESG("wlan driver load failed\n");
4750         pci_set_drvdata(pdev, NULL);
4751         return -ENODEV;
4752
4753 }
4754
4755
4756 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
4757 {
4758         struct r8180_priv *priv;
4759         struct net_device *dev = pci_get_drvdata(pdev);
4760         if(dev){
4761
4762                 unregister_netdev(dev);
4763
4764                 priv=ieee80211_priv(dev);
4765
4766                 rtl8180_proc_remove_one(dev);
4767                 rtl8180_down(dev);
4768                 priv->rf_close(dev);
4769                 rtl8180_reset(dev);
4770                 //rtl8180_rtx_disable(dev);
4771                 //rtl8180_irq_disable(dev);
4772                 mdelay(10);
4773                 //write_nic_word(dev,INTA,read_nic_word(dev,INTA));
4774                 //force_pci_posting(dev);
4775                 //mdelay(10);
4776
4777                 if(priv->irq){
4778
4779                         DMESG("Freeing irq %d",dev->irq);
4780                         free_irq(dev->irq, dev);
4781                         priv->irq=0;
4782
4783                 }
4784
4785                 free_rx_desc_ring(dev);
4786                 free_tx_desc_rings(dev);
4787         //      free_beacon_desc_ring(dev,priv->txbeaconcount);
4788
4789                 if( dev->mem_start != (unsigned long)NULL ){
4790                         iounmap( (void *)dev->mem_start );
4791                         release_mem_region( pci_resource_start(pdev, 1),
4792                                             pci_resource_len(pdev, 1) );
4793                 }
4794
4795                 free_ieee80211(dev);
4796         }
4797         pci_disable_device(pdev);
4798
4799         DMESG("wlan driver removed\n");
4800 }
4801
4802
4803 /* fun with the built-in ieee80211 stack... */
4804 extern int ieee80211_crypto_init(void);
4805 extern void ieee80211_crypto_deinit(void);
4806 extern int ieee80211_crypto_tkip_init(void);
4807 extern void ieee80211_crypto_tkip_exit(void);
4808 extern int ieee80211_crypto_ccmp_init(void);
4809 extern void ieee80211_crypto_ccmp_exit(void);
4810 extern int ieee80211_crypto_wep_init(void);
4811 extern void ieee80211_crypto_wep_exit(void);
4812
4813 static int __init rtl8180_pci_module_init(void)
4814 {
4815         int ret;
4816
4817         ret = ieee80211_crypto_init();
4818         if (ret) {
4819                 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
4820                 return ret;
4821         }
4822         ret = ieee80211_crypto_tkip_init();
4823         if (ret) {
4824                 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
4825                 return ret;
4826         }
4827         ret = ieee80211_crypto_ccmp_init();
4828         if (ret) {
4829                 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
4830                 return ret;
4831         }
4832         ret = ieee80211_crypto_wep_init();
4833         if (ret) {
4834                 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
4835                 return ret;
4836         }
4837
4838         printk(KERN_INFO "\nLinux kernel driver for RTL8180 \
4839 / RTL8185 based WLAN cards\n");
4840         printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
4841         DMESG("Initializing module");
4842         DMESG("Wireless extensions version %d", WIRELESS_EXT);
4843         rtl8180_proc_module_init();
4844
4845       if(0!=pci_register_driver(&rtl8180_pci_driver))
4846         //if(0!=pci_module_init(&rtl8180_pci_driver))
4847         {
4848                 DMESG("No device found");
4849                 /*pci_unregister_driver (&rtl8180_pci_driver);*/
4850                 return -ENODEV;
4851         }
4852         return 0;
4853 }
4854
4855
4856 static void __exit rtl8180_pci_module_exit(void)
4857 {
4858         pci_unregister_driver (&rtl8180_pci_driver);
4859         rtl8180_proc_module_remove();
4860         ieee80211_crypto_tkip_exit();
4861         ieee80211_crypto_ccmp_exit();
4862         ieee80211_crypto_wep_exit();
4863         ieee80211_crypto_deinit();
4864         DMESG("Exiting");
4865 }
4866
4867
4868 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
4869 {
4870         unsigned long flags;
4871         short enough_desc;
4872         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
4873
4874         spin_lock_irqsave(&priv->tx_lock,flags);
4875         enough_desc = check_nic_enought_desc(dev,pri);
4876         spin_unlock_irqrestore(&priv->tx_lock,flags);
4877
4878         if(enough_desc)
4879                 ieee80211_wake_queue(priv->ieee80211);
4880 }
4881
4882 /*****************************************************************************
4883       -----------------------------IRQ STUFF---------------------------
4884 ******************************************************************************/
4885
4886 void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
4887 {
4888         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
4889
4890         u32 *tail; //tail virtual addr
4891         u32 *head; //head virtual addr
4892         u32 *begin;//start of ring virtual addr
4893         u32 *nicv; //nic pointer virtual addr
4894 //      u32 *txdv; //packet just TXed
4895         u32 nic; //nic pointer physical addr
4896         u32 nicbegin;// start of ring physical addr
4897 //      short txed;
4898         unsigned long flag;
4899         /* physical addr are ok on 32 bits since we set DMA mask*/
4900
4901         int offs;
4902         int j,i;
4903         int hd;
4904         if (error) priv->stats.txretry++; //tony 20060601
4905         spin_lock_irqsave(&priv->tx_lock,flag);
4906         switch(pri) {
4907         case MANAGE_PRIORITY:
4908                 tail = priv->txmapringtail;
4909                 begin = priv->txmapring;
4910                 head = priv->txmapringhead;
4911                 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
4912                 nicbegin = priv->txmapringdma;
4913                 break;
4914
4915         case BK_PRIORITY:
4916                 tail = priv->txbkpringtail;
4917                 begin = priv->txbkpring;
4918                 head = priv->txbkpringhead;
4919                 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
4920                 nicbegin = priv->txbkpringdma;
4921                 break;
4922
4923         case BE_PRIORITY:
4924                 tail = priv->txbepringtail;
4925                 begin = priv->txbepring;
4926                 head = priv->txbepringhead;
4927                 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
4928                 nicbegin = priv->txbepringdma;
4929                 break;
4930
4931         case VI_PRIORITY:
4932                 tail = priv->txvipringtail;
4933                 begin = priv->txvipring;
4934                 head = priv->txvipringhead;
4935                 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
4936                 nicbegin = priv->txvipringdma;
4937                 break;
4938
4939         case VO_PRIORITY:
4940                 tail = priv->txvopringtail;
4941                 begin = priv->txvopring;
4942                 head = priv->txvopringhead;
4943                 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
4944                 nicbegin = priv->txvopringdma;
4945                 break;
4946
4947         case HI_PRIORITY:
4948                 tail = priv->txhpringtail;
4949                 begin = priv->txhpring;
4950                 head = priv->txhpringhead;
4951                 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
4952                 nicbegin = priv->txhpringdma;
4953                 break;
4954
4955         default:
4956                 spin_unlock_irqrestore(&priv->tx_lock,flag);
4957                 return ;
4958         }
4959 /*      DMESG("%x %s %x %x",((int)nic & 0xfff)/8/4,
4960         *(priv->txnpring + ((int)nic&0xfff)/4/8) & (1<<31) ? "filled" : "empty",
4961         (priv->txnpringtail - priv->txnpring)/8,(priv->txnpringhead -
4962 priv->txnpring)/8);
4963 */
4964         //nicv = (u32*) ((nic - nicbegin) + (int)begin);
4965         nicv = (u32*) ((nic - nicbegin) + (u8*)begin);
4966         if((head <= tail && (nicv > tail || nicv < head)) ||
4967                 (head > tail && (nicv > tail && nicv < head))){
4968                         DMESGW("nic has lost pointer");
4969                         spin_unlock_irqrestore(&priv->tx_lock,flag);
4970                         rtl8180_restart(dev);
4971                         return;
4972                 }
4973
4974         /* we check all the descriptors between the head and the nic,
4975          * but not the currenly pointed by the nic (the next to be txed)
4976          * and the previous of the pointed (might be in process ??)
4977         */
4978         //if (head == nic) return;
4979         //DMESG("%x %x",head,nic);
4980         offs = (nic - nicbegin);
4981         //DMESG("%x %x %x",nic ,(u32)nicbegin, (int)nic -nicbegin);
4982
4983         offs = offs / 8 /4;
4984
4985         hd = (head - begin) /8;
4986
4987         if(offs >= hd)
4988                 j = offs - hd;
4989         else
4990                 j = offs + (priv->txringcount -1 -hd);
4991         //      j= priv->txringcount -1- (hd - offs);
4992
4993         j-=2;
4994         if(j<0) j=0;
4995
4996
4997         for(i=0;i<j;i++)
4998         {
4999 //              printk("+++++++++++++check status desc\n");
5000                 if((*head) & (1<<31))
5001                         break;
5002                 if(((*head)&(0x10000000)) != 0){
5003 //                      printk("++++++++++++++last desc,retry count is %d\n",((*head) & (0x000000ff)));
5004                         priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
5005 #if 1
5006                         if(!error)
5007                         {
5008                                 priv->NumTxOkTotal++;
5009 //                              printk("NumTxOkTotal is %d\n",priv->NumTxOkTotal++);
5010                         }
5011 #endif
5012                         //      printk("in function %s:curr_retry_count is %d\n",__func__,((*head) & (0x000000ff)));
5013                 }
5014                 if(!error){
5015                         priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
5016                 }
5017 //              printk("in function %s:curr_txokbyte_count is %d\n",__func__,(*(head+3)) & (0x00000fff));
5018                 *head = *head &~ (1<<31);
5019
5020                 if((head - begin)/8 == priv->txringcount-1)
5021                         head=begin;
5022
5023                 else
5024                         head+=8;
5025         }
5026
5027         //DMESG("%x",txdv[0]);
5028         /* the head has been moved to the last certainly TXed
5029          * (or at least processed by the nic) packet.
5030          * The driver take forcefully owning of all these packets
5031          * If the packet previous of the nic pointer has been
5032          * processed this doesn't matter: it will be checked
5033          * here at the next round. Anyway if no more packet are
5034          * TXed no memory leak occour at all.
5035          */
5036
5037         switch(pri) {
5038         case MANAGE_PRIORITY:
5039                 priv->txmapringhead = head;
5040                         //printk("1==========================================> priority check!\n");
5041                 if(priv->ack_tx_to_ieee){
5042                                 // try to implement power-save mode 2008.1.22
5043                 //      printk("2==========================================> priority check!\n");
5044 #if 1
5045                         if(rtl8180_is_tx_queue_empty(dev)){
5046                         //      printk("tx queue empty, after send null sleep packet, try to sleep !\n");
5047                                 priv->ack_tx_to_ieee = 0;
5048                                 ieee80211_ps_tx_ack(priv->ieee80211,!error);
5049                         }
5050 #endif
5051                 }
5052                 break;
5053
5054         case BK_PRIORITY:
5055                 priv->txbkpringhead = head;
5056                 break;
5057
5058         case BE_PRIORITY:
5059                 priv->txbepringhead = head;
5060                 break;
5061
5062         case VI_PRIORITY:
5063                 priv->txvipringhead = head;
5064                 break;
5065
5066         case VO_PRIORITY:
5067                 priv->txvopringhead = head;
5068                 break;
5069
5070         case HI_PRIORITY:
5071                 priv->txhpringhead = head;
5072                 break;
5073         }
5074
5075         /*DMESG("%x %x %x", (priv->txnpringhead - priv->txnpring) /8 ,
5076                 (priv->txnpringtail - priv->txnpring) /8,
5077                 offs );
5078         */
5079
5080         spin_unlock_irqrestore(&priv->tx_lock,flag);
5081
5082 }
5083
5084 void rtl8180_tx_irq_wq(struct work_struct *work)
5085 {
5086         //struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
5087         struct delayed_work *dwork = to_delayed_work(work);
5088         struct ieee80211_device * ieee = (struct ieee80211_device*)
5089                                                container_of(dwork, struct ieee80211_device, watch_dog_wq);
5090         struct net_device *dev = ieee->dev;
5091
5092         rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
5093 }
5094 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
5095 {
5096         struct net_device *dev = (struct net_device *) netdev;
5097         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5098         unsigned long flags;
5099         u32 inta;
5100
5101         /* We should return IRQ_NONE, but for now let me keep this */
5102         if(priv->irq_enabled == 0) return IRQ_HANDLED;
5103
5104         spin_lock_irqsave(&priv->irq_th_lock,flags);
5105
5106         //ISR: 4bytes
5107         inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
5108         write_nic_dword(dev,ISR,inta); // reset int situation
5109
5110         priv->stats.shints++;
5111
5112         //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
5113
5114         if(!inta){
5115                 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
5116                 return IRQ_HANDLED;
5117         /*
5118            most probably we can safely return IRQ_NONE,
5119            but for now is better to avoid problems
5120         */
5121         }
5122
5123         if(inta == 0xffff){
5124                         /* HW disappared */
5125                         spin_unlock_irqrestore(&priv->irq_th_lock,flags);
5126                         return IRQ_HANDLED;
5127         }
5128
5129         priv->stats.ints++;
5130         //priv->irqpending = inta;
5131
5132
5133         if(!netif_running(dev)) {
5134                 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
5135                 return IRQ_HANDLED;
5136         }
5137
5138         if(inta & ISR_TimeOut){
5139                 write_nic_dword(dev, TimerInt, 0);
5140                 //DMESG("=================>waking up");
5141 //              rtl8180_hw_wakeup(dev);
5142         }
5143
5144         if(inta & ISR_TBDOK){
5145                 priv->stats.txbeacon++;
5146         }
5147
5148         if(inta & ISR_TBDER){
5149                 priv->stats.txbeaconerr++;
5150         }
5151
5152         if(inta  & IMR_TMGDOK ) {
5153 //              priv->NumTxOkTotal++;
5154                 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
5155 //                      schedule_work(&priv->tx_irq_wq);
5156
5157         }
5158
5159         if(inta & ISR_THPDER){
5160                 priv->stats.txhperr++;
5161                 rtl8180_tx_isr(dev,HI_PRIORITY,1);
5162                 priv->ieee80211->stats.tx_errors++;
5163         }
5164
5165         if(inta & ISR_THPDOK){ //High priority tx ok
5166 //              priv->NumTxOkTotal++;
5167                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
5168                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
5169                 priv->stats.txhpokint++;
5170                 rtl8180_tx_isr(dev,HI_PRIORITY,0);
5171         }
5172
5173         if(inta & ISR_RER) {
5174                 priv->stats.rxerr++;
5175         }
5176         if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY
5177                 priv->stats.txbkperr++;
5178                 priv->ieee80211->stats.tx_errors++;
5179                 //tasklet_schedule(&priv->irq_tx_tasklet);
5180                 rtl8180_tx_isr(dev,BK_PRIORITY,1);
5181                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
5182         }
5183
5184         if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY
5185                 priv->stats.txbeperr++;
5186                 priv->ieee80211->stats.tx_errors++;
5187                 rtl8180_tx_isr(dev,BE_PRIORITY,1);
5188                 //tasklet_schedule(&priv->irq_tx_tasklet);
5189                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
5190         }
5191         if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY
5192                 priv->stats.txnperr++;
5193                 priv->ieee80211->stats.tx_errors++;
5194                 //tasklet_schedule(&priv->irq_tx_tasklet);
5195                 rtl8180_tx_isr(dev,NORM_PRIORITY,1);
5196                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
5197         }
5198
5199         if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY
5200                 priv->stats.txlperr++;
5201                 priv->ieee80211->stats.tx_errors++;
5202                 rtl8180_tx_isr(dev,LOW_PRIORITY,1);
5203                 //tasklet_schedule(&priv->irq_tx_tasklet);
5204                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
5205         }
5206
5207         if(inta & ISR_ROK){
5208                 //priv->NumRxOkInPeriod++;  //YJ,del,080828
5209                 priv->stats.rxint++;
5210                 tasklet_schedule(&priv->irq_rx_tasklet);
5211         }
5212
5213         if(inta & ISR_RQoSOK ){
5214                 //priv->NumRxOkInPeriod++;  //YJ,del,080828
5215                 priv->stats.rxint++;
5216                 tasklet_schedule(&priv->irq_rx_tasklet);
5217         }
5218         if(inta & ISR_BcnInt) {
5219                 //DMESG("Preparing Beacons");
5220                 rtl8180_prepare_beacon(dev);
5221         }
5222
5223         if(inta & ISR_RDU){
5224                 DMESGW("No RX descriptor available");
5225                 priv->stats.rxrdu++;
5226                 tasklet_schedule(&priv->irq_rx_tasklet);
5227                 /*queue_work(priv->workqueue ,&priv->restart_work);*/
5228
5229         }
5230         if(inta & ISR_RXFOVW){
5231                 priv->stats.rxoverflow++;
5232                 tasklet_schedule(&priv->irq_rx_tasklet);
5233                 //queue_work(priv->workqueue ,&priv->restart_work);
5234         }
5235
5236         if(inta & ISR_TXFOVW) priv->stats.txoverflow++;
5237
5238         if(inta & ISR_TNPDOK){ //Normal priority tx ok
5239 //              priv->NumTxOkTotal++;
5240                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
5241                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
5242                 //      priv->ieee80211->stats.tx_packets++;
5243                 priv->stats.txnpokint++;
5244                 rtl8180_tx_isr(dev,NORM_PRIORITY,0);
5245         }
5246
5247         if(inta & ISR_TLPDOK){ //Low priority tx ok
5248 //              priv->NumTxOkTotal++;
5249                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
5250                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
5251                 //      priv->ieee80211->stats.tx_packets++;
5252                 priv->stats.txlpokint++;
5253                 rtl8180_tx_isr(dev,LOW_PRIORITY,0);
5254                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
5255         }
5256
5257         if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY
5258                 priv->stats.txbkpokint++;
5259 //              priv->NumTxOkTotal++;
5260                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
5261                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
5262                 rtl8180_tx_isr(dev,BK_PRIORITY,0);
5263                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
5264         }
5265
5266         if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY
5267                 priv->stats.txbeperr++;
5268 //              priv->NumTxOkTotal++;
5269                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
5270                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
5271                 rtl8180_tx_isr(dev,BE_PRIORITY,0);
5272                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
5273         }
5274         force_pci_posting(dev);
5275         spin_unlock_irqrestore(&priv->irq_th_lock,flags);
5276
5277         return IRQ_HANDLED;
5278 }
5279
5280
5281 void rtl8180_irq_rx_tasklet(struct r8180_priv* priv)
5282 {
5283 //      unsigned long flags;
5284
5285 /*      spin_lock_irqsave(&priv->irq_lock, flags);
5286         priv->irq_mask &=~IMR_ROK;
5287         priv->irq_mask &=~IMR_RDU;
5288
5289         rtl8180_irq_enable(priv->dev);
5290         spin_unlock_irqrestore(&priv->irq_lock, flags);
5291 */
5292         rtl8180_rx(priv->dev);
5293
5294 /*      spin_lock_irqsave(&priv->irq_lock, flags);
5295         priv->irq_mask |= IMR_ROK;
5296         priv->irq_mask |= IMR_RDU;
5297         rtl8180_irq_enable(priv->dev);
5298         spin_unlock_irqrestore(&priv->irq_lock, flags);
5299 */
5300 }
5301
5302 /****************************************************************************
5303 lizhaoming--------------------------- RF power on/power off -----------------
5304 *****************************************************************************/
5305
5306 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
5307 {
5308         //struct delayed_work *dwork = to_delayed_work(work);
5309         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
5310         struct net_device *dev = ieee->dev;
5311         struct r8180_priv *priv = ieee80211_priv(dev);
5312
5313         //u16 tmp2byte;
5314         u8 btPSR;
5315         u8 btConfig0;
5316         RT_RF_POWER_STATE       eRfPowerStateToSet;
5317         bool    bActuallySet=false;
5318
5319         char *argv[3];
5320         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
5321         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
5322         static int readf_count = 0;
5323         //printk("============>%s in \n", __func__);
5324
5325 #ifdef ENABLE_LPS
5326         if(readf_count % 10 == 0)
5327                 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
5328
5329         readf_count = (readf_count+1)%0xffff;
5330 #endif
5331                 {
5332                         // We should turn off LED before polling FF51[4].
5333
5334                         //Turn off LED.
5335                         btPSR = read_nic_byte(dev, PSR);
5336                         write_nic_byte(dev, PSR, (btPSR & ~BIT3));
5337
5338                         //It need to delay 4us suggested by Jong, 2008-01-16
5339                         udelay(4);
5340
5341                         //HW radio On/Off according to the value of FF51[4](config0)
5342                         btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
5343
5344                         //Turn on LED.
5345                         write_nic_byte(dev, PSR, btPSR| BIT3);
5346
5347                         eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
5348
5349                         if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
5350                         {
5351                                 priv->ieee80211->bHwRadioOff = false;
5352                                 bActuallySet = true;
5353                         }
5354                         else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
5355                         {
5356                                 priv->ieee80211->bHwRadioOff = true;
5357                                 bActuallySet = true;
5358                         }
5359
5360                         if(bActuallySet)
5361                         {
5362                                 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
5363
5364                                 /* To update the UI status for Power status changed */
5365                                 if(priv->ieee80211->bHwRadioOff == true)
5366                                         argv[1] = "RFOFF";
5367                                 else{
5368                                         //if(!priv->RfOffReason)
5369                                                 argv[1] = "RFON";
5370                                         //else
5371                                         //      argv[1] = "RFOFF";
5372                                 }
5373                                 argv[0] = RadioPowerPath;
5374                                 argv[2] = NULL;
5375
5376                                 call_usermodehelper(RadioPowerPath,argv,envp,1);
5377                         }
5378
5379                 }
5380
5381 }
5382
5383 static u8 read_acadapter_file(char *filename)
5384 {
5385         return 0;
5386 }
5387
5388 /***************************************************************************
5389      ------------------- module init / exit stubs ----------------
5390 ****************************************************************************/
5391 module_init(rtl8180_pci_module_init);
5392 module_exit(rtl8180_pci_module_exit);
5393