From: Thomas Abraham Date: Tue, 8 Sep 2009 05:26:00 +0000 (+0900) Subject: ARM: S3C6410: use correct divider_shift in setrate_clksrc() X-Git-Tag: v2.6.32-rc1~49^2~1^2~14^2^2~5 X-Git-Url: http://ftp.safe.ca/?p=safe%2Fjmp%2Flinux-2.6;a=commitdiff_plain;h=9adb15b80bf1dc6b30a584e76efc876dfd029a13 ARM: S3C6410: use correct divider_shift in setrate_clksrc() In s3c64xx_setrate_clksrc() we used sclk->shift, but actually need to use sclk->divider_shift to correctly calculate the value for the divider register. Signed-off-by: Thomas Abraham [ben-linux@fluff.org: Minor re-indentation of description] Signed-off-by: Ben Dooks --- diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c index febac19..c972d2f 100644 --- a/arch/arm/plat-s3c64xx/s3c6400-clock.c +++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c @@ -302,8 +302,8 @@ static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate) return -EINVAL; val = __raw_readl(reg); - val &= ~(0xf << sclk->shift); - val |= (div - 1) << sclk->shift; + val &= ~(0xf << sclk->divider_shift); + val |= (div - 1) << sclk->divider_shift; __raw_writel(val, reg); return 0;