x86/oprofile: Fix cast of counter value
authorRobert Richter <robert.richter@amd.com>
Tue, 7 Jul 2009 17:30:25 +0000 (19:30 +0200)
committerRobert Richter <robert.richter@amd.com>
Tue, 14 Jul 2009 13:30:03 +0000 (15:30 +0200)
When casting the counter value to a 64 bit value in 32 bit mode, sign
extension may lead to broken counter values. This patch fixes this by
casting to (u64) instead of (s64).

Signed-off-by: Robert Richter <robert.richter@amd.com>
arch/x86/oprofile/op_model_amd.c
arch/x86/oprofile/op_model_p4.c

index e95268e..7ca8306 100644 (file)
@@ -111,7 +111,7 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
                if (counter_config[i].enabled && msrs->counters[i].addr) {
                        reset_value[i] = counter_config[i].count;
                        wrmsrl(msrs->counters[i].addr,
-                              -(s64)counter_config[i].count);
+                              -(u64)counter_config[i].count);
                        rdmsrl(msrs->controls[i].addr, val);
                        val &= model->reserved;
                        val |= op_x86_get_ctrl(model, &counter_config[i]);
@@ -237,7 +237,7 @@ static int op_amd_check_ctrs(struct pt_regs * const regs,
                if (val & OP_CTR_OVERFLOW)
                        continue;
                oprofile_add_sample(regs, i);
-               wrmsrl(msrs->counters[i].addr, -(s64)reset_value[i]);
+               wrmsrl(msrs->counters[i].addr, -(u64)reset_value[i]);
        }
 
        op_amd_handle_ibs(regs, msrs);
index f01e53b..9db9e36 100644 (file)
@@ -580,7 +580,7 @@ static void p4_setup_ctrs(struct op_x86_model_spec const *model,
                        reset_value[i] = counter_config[i].count;
                        pmc_setup_one_p4_counter(i);
                        wrmsrl(p4_counters[VIRT_CTR(stag, i)].counter_address,
-                              -(s64)counter_config[i].count);
+                              -(u64)counter_config[i].count);
                } else {
                        reset_value[i] = 0;
                }
@@ -625,11 +625,11 @@ static int p4_check_ctrs(struct pt_regs * const regs,
                if (CCCR_OVF_P(low) || !(ctr & OP_CTR_OVERFLOW)) {
                        oprofile_add_sample(regs, i);
                        wrmsrl(p4_counters[real].counter_address,
-                              -(s64)reset_value[i]);
+                              -(u64)reset_value[i]);
                        CCCR_CLEAR_OVF(low);
                        wrmsr(p4_counters[real].cccr_address, low, high);
                        wrmsrl(p4_counters[real].counter_address,
-                              -(s64)reset_value[i]);
+                              -(u64)reset_value[i]);
                }
        }