drm/radeon/kms: improve coding style a little
authorRafał Miłecki <zajec5@gmail.com>
Sat, 6 Mar 2010 13:03:38 +0000 (13:03 +0000)
committerDave Airlie <airlied@redhat.com>
Mon, 15 Mar 2010 00:05:55 +0000 (10:05 +1000)
We still have many magic numbers in HDMI/audio to define

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/r600_audio.c
drivers/gpu/drm/radeon/r600_hdmi.c

index dddb9e5..dac7042 100644 (file)
@@ -197,14 +197,12 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
        case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
                WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
                break;
-
        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
                WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
                break;
-
        default:
                DRM_ERROR("Unsupported encoder type 0x%02X\n",
                          radeon_encoder->encoder_id);
@@ -213,14 +211,14 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
 
        switch (dig->dig_encoder) {
        case 0:
-               WREG32(R600_AUDIO_PLL1_MUL, base_rate*50);
-               WREG32(R600_AUDIO_PLL1_DIV, clock*100);
+               WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
+               WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
                WREG32(R600_AUDIO_CLK_SRCSEL, 0);
                break;
 
        case 1:
-               WREG32(R600_AUDIO_PLL2_MUL, base_rate*50);
-               WREG32(R600_AUDIO_PLL2_DIV, clock*100);
+               WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
+               WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
                WREG32(R600_AUDIO_CLK_SRCSEL, 1);
                break;
        default:
index 8fbfc73..029fa14 100644 (file)
@@ -42,13 +42,13 @@ enum r600_hdmi_color_format {
  */
 enum r600_hdmi_iec_status_bits {
        AUDIO_STATUS_DIG_ENABLE   = 0x01,
-       AUDIO_STATUS_V      = 0x02,
-       AUDIO_STATUS_VCFG        = 0x04,
+       AUDIO_STATUS_V            = 0x02,
+       AUDIO_STATUS_VCFG         = 0x04,
        AUDIO_STATUS_EMPHASIS     = 0x08,
        AUDIO_STATUS_COPYRIGHT    = 0x10,
        AUDIO_STATUS_NONAUDIO     = 0x20,
        AUDIO_STATUS_PROFESSIONAL = 0x40,
-       AUDIO_STATUS_LEVEL      = 0x80
+       AUDIO_STATUS_LEVEL        = 0x80
 };
 
 struct {
@@ -85,7 +85,7 @@ struct {
 static void r600_hdmi_calc_CTS(uint32_t clock, int *CTS, int N, int freq)
 {
        if (*CTS == 0)
-               *CTS = clock*N/(128*freq)*1000;
+               *CTS = clock * N / (128 * freq) * 1000;
        DRM_DEBUG("Using ACR timing N=%d CTS=%d for frequency %d\n",
                  N, *CTS, freq);
 }
@@ -131,11 +131,11 @@ static void r600_hdmi_infoframe_checksum(uint8_t packetType,
                                         uint8_t length,
                                         uint8_t *frame)
 {
-    int i;
-    frame[0] = packetType + versionNumber + length;
-    for (i = 1; i <= length; i++)
-       frame[0] += frame[i];
-    frame[0] = 0x100 - frame[0];
+       int i;
+       frame[0] = packetType + versionNumber + length;
+       for (i = 1; i <= length; i++)
+               frame[0] += frame[i];
+       frame[0] = 0x100 - frame[0];
 }
 
 /*