ARM: 5744/1: ep93xx: add remaining phys offset selections
authorHartley Sweeten <hartleys@visionengravers.com>
Mon, 5 Oct 2009 18:34:43 +0000 (19:34 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 7 Oct 2009 12:11:56 +0000 (13:11 +0100)
This adds the missing Kconfig options for the first SDRAM bank address
on ep93xx boards.

Cc: Hubert Feurstein <(address hidden)>
Signed-off-by: H Hartley Sweeten <(address hidden)>
Acked-by: Ryan Mallon <(address hidden)>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-ep93xx/Kconfig
arch/arm/mach-ep93xx/Makefile.boot
arch/arm/mach-ep93xx/include/mach/memory.h

index d7291c6..6675c05 100644 (file)
@@ -17,13 +17,31 @@ config EP93XX_SDCE3_SYNC_PHYS_OFFSET
        bool "0x00000000 - SDCE3/SyncBoot"
        help
          Select this option if you want support for EP93xx boards with the
-         first SDRAM bank at 0x00000000
+         first SDRAM bank at 0x00000000.
 
 config EP93XX_SDCE0_PHYS_OFFSET
        bool "0xc0000000 - SDCEO"
        help
          Select this option if you want support for EP93xx boards with the
-         first SDRAM bank at 0xc0000000
+         first SDRAM bank at 0xc0000000.
+
+config EP93XX_SDCE1_PHYS_OFFSET
+       bool "0xd0000000 - SDCE1"
+       help
+         Select this option if you want support for EP93xx boards with the
+         first SDRAM bank at 0xd0000000.
+
+config EP93XX_SDCE2_PHYS_OFFSET
+       bool "0xe0000000 - SDCE2"
+       help
+         Select this option if you want support for EP93xx boards with the
+         first SDRAM bank at 0xe0000000.
+
+config EP93XX_SDCE3_ASYNC_PHYS_OFFSET
+       bool "0xf0000000 - SDCE3/AsyncBoot"
+       help
+         Select this option if you want support for EP93xx boards with the
+         first SDRAM bank at 0xf0000000.
 
 endchoice
 
index 27a085a..0ad33f1 100644 (file)
@@ -3,3 +3,12 @@ params_phys-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET)    := 0x00000100
 
    zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)         := 0xc0008000
 params_phys-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)         := 0xc0000100
+
+   zreladdr-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)         := 0xd0008000
+params_phys-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)         := 0xd0000100
+
+   zreladdr-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)         := 0xe0008000
+params_phys-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)         := 0xe0000100
+
+   zreladdr-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)   := 0xf0008000
+params_phys-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)   := 0xf0000100
index 925b12e..554064e 100644 (file)
@@ -9,6 +9,12 @@
 #define PHYS_OFFSET            UL(0x00000000)
 #elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)
 #define PHYS_OFFSET            UL(0xc0000000)
+#elif defined(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)
+#define PHYS_OFFSET            UL(0xd0000000)
+#elif defined(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)
+#define PHYS_OFFSET            UL(0xe0000000)
+#elif defined(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)
+#define PHYS_OFFSET            UL(0xf0000000)
 #else
 #error "Kconfig bug: No EP93xx PHYS_OFFSET set"
 #endif