Blackfin: cleanup sync handling when enabling/disabling cplbs
authorYi Li <yi.li@analog.com>
Fri, 7 Aug 2009 01:20:58 +0000 (01:20 +0000)
committerMike Frysinger <vapier@gentoo.org>
Thu, 17 Sep 2009 02:10:19 +0000 (22:10 -0400)
commiteb7bd9c461bbfbb195cb1e1346453222a4352df4
tree9c92f6ce5160b655213bbcff8175878771594121
parent8312440e05ea74feabc648ad8f36c823af4ddd8e
Blackfin: cleanup sync handling when enabling/disabling cplbs

The handling of updating the [DI]MEM_CONTROL MMRs does not follow proper
sync procedures as laid out in the Blackfin programming manual.  So rather
than audit/fix every call location, create helper functions that do the
right things in order to safely update these MMRs.  Then convert all call
sites to use these new helper functions.

While we're fixing the code, drop the workaround for anomaly 05000125 as
that anomaly applies to old versions of silicon that we do not support.

Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
arch/blackfin/include/asm/cplb.h
arch/blackfin/kernel/cplb-mpu/cacheinit.c
arch/blackfin/kernel/cplb-mpu/cplbmgr.c
arch/blackfin/kernel/cplb-nompu/cacheinit.c
arch/blackfin/kernel/cplb-nompu/cplbmgr.c
arch/blackfin/mach-bf561/secondary.S
arch/blackfin/mach-common/entry.S
arch/blackfin/mach-common/pm.c