[ARM] 3115/1: small optimizations to exception vector entry code
authorNicolas Pitre <nico@cam.org>
Sun, 6 Nov 2005 14:42:37 +0000 (14:42 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 6 Nov 2005 14:42:37 +0000 (14:42 +0000)
commitb7ec479553b8755dd95ee988a957cbf2aef351dc
treeb2066a113c7e0bb1546564038c692f6f423315bf
parent7240f1f183f085f6b7af44ec274b5b6123dfdead
[ARM] 3115/1: small optimizations to exception vector entry code

Patch from Nicolas Pitre

Since we know the value of cpsr on entry, we can replace the bic+orr with
a single eor.  Also remove a possible result delay (at least on XScale).

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/entry-armv.S