MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.
authorDavid Daney <ddaney@caviumnetworks.com>
Wed, 14 Oct 2009 19:16:56 +0000 (12:16 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 17 Dec 2009 01:57:01 +0000 (01:57 +0000)
commit82622284dd2f8791f9759f3cef601520a8bc63b2
treeee47f43af373d0c021cc83ff9e22925942e9d001
parent92078e0618f525e22945040b5daea21d4b6d4a16
MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.

Processors that support the mips64r2 ISA can in four instructions
convert a shifted PGD pointer stored in the upper bits of c0_context
into a usable pointer.  By doing this we save a memory load and
associated potential cache miss in the TLB exception handlers.

Since the upper bits of c0_context were holding the CPU number, we
move this to the upper bits of c0_xcontext which doesn't have enough
bits to hold the PGD pointer, but has plenty for the CPU number.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/Kconfig
arch/mips/include/asm/mmu_context.h
arch/mips/include/asm/stackframe.h
arch/mips/mm/init.c
arch/mips/mm/tlbex.c