x86, perf: P4 PMU -- use hash for p4_get_escr_idx()
authorCyrill Gorcunov <gorcunov@openvz.org>
Wed, 12 May 2010 17:42:42 +0000 (21:42 +0400)
committerIngo Molnar <mingo@elte.hu>
Thu, 13 May 2010 06:51:13 +0000 (08:51 +0200)
commit720019908fd5a1bb442bb0a35a6027ba21864d25
treeb6a637a752f67061403664ec28c5c587c544b01c
parent975fc2d5f20b071576e7c9920c4f1a1eae80f88d
x86, perf: P4 PMU -- use hash for p4_get_escr_idx()

Linear search over all p4 MSRs should be fine if only
we would not use it in events scheduling routine which
is pretty time critical. Lets use hashes. It should speed
scheduling up significantly.

v2: Steven proposed to use more gentle approach than issue
    BUG on error, so we use WARN_ONCE now

Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
LKML-Reference: <20100512174242.GA5190@lenovo>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/kernel/cpu/perf_event_p4.c