ath9k_hw: fix pll clock setting for 5ghz on AR9003
authorFelix Fietkau <nbd@openwrt.org>
Mon, 26 Apr 2010 19:04:30 +0000 (15:04 -0400)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 27 Apr 2010 20:09:16 +0000 (16:09 -0400)
commit14bc110463bafc1aa4a51d4443e9dc1a88b58c40
treed06287aac5fd2d35393d2aee58581bd04b668b5e
parent2fcb91317360d75efa3cbf4b200c9e7131c6b527
ath9k_hw: fix pll clock setting for 5ghz on AR9003

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9003_phy.c