drm/i915: Install a fence register for fbc on g4x
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 14 Oct 2009 19:12:46 +0000 (20:12 +0100)
committerEric Anholt <eric@anholt.net>
Thu, 15 Oct 2009 16:20:58 +0000 (09:20 -0700)
commit0d9c778978ff268228c095ae737c282c03a5986d
treee20e4c63530b8b25cd582cf3602fa2da143003a8
parent0eb96d6ed38430b72897adde58f5477a6b71757a
drm/i915: Install a fence register for fbc on g4x

To enable framebuffer compression on a g4x, we not only need the buffer
to tiled (X only), we also need to hold a fence register for the buffer.
Currently we only install a fence register for pre-i965s when setting up
the scanout buffer. Rather than adding some convoluted logic to
g4x_enable_fbc() to acquire a fence register, and perhaps to
g4x_disable_fbc() to release it again, we can extend the acquisition
during setup to all chipsets.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/intel_display.c