* Copyright (C) 1997 Geert Uytterhoeven
* Copyright (C) 1999,2000 Martin Lucina, Tom Zerucha
* Copyright (C) 2002 Richard Henderson
+ * Copyright (C) 2006, 2007 Maciej W. Rozycki
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive for
* more details.
*/
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/tty.h>
-#include <linux/slab.h>
+#include <linux/bitrev.h>
+#include <linux/compiler.h>
#include <linux/delay.h>
-#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/errno.h>
#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/module.h>
#include <linux/pci.h>
#include <linux/selection.h>
+#include <linux/string.h>
+#include <linux/tc.h>
+
#include <asm/io.h>
+
#include <video/tgafb.h>
-#include <linux/selection.h>
+
+#ifdef CONFIG_PCI
+#define TGA_BUS_PCI(dev) (dev->bus == &pci_bus_type)
+#else
+#define TGA_BUS_PCI(dev) 0
+#endif
+
+#ifdef CONFIG_TC
+#define TGA_BUS_TC(dev) (dev->bus == &tc_bus_type)
+#else
+#define TGA_BUS_TC(dev) 0
+#endif
/*
* Local functions.
static void tgafb_imageblit(struct fb_info *, const struct fb_image *);
static void tgafb_fillrect(struct fb_info *, const struct fb_fillrect *);
static void tgafb_copyarea(struct fb_info *, const struct fb_copyarea *);
+static int tgafb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info);
+
+static int __devinit tgafb_register(struct device *dev);
+static void __devexit tgafb_unregister(struct device *dev);
-static int tgafb_pci_register(struct pci_dev *, const struct pci_device_id *);
-static void tgafb_pci_unregister(struct pci_dev *);
+static const char *mode_option;
+static const char *mode_option_pci = "640x480@60";
+static const char *mode_option_tc = "1280x1024@72";
-static const char *mode_option = "640x480@60";
+static struct pci_driver tgafb_pci_driver;
+static struct tc_driver tgafb_tc_driver;
/*
* Frame buffer operations
.fb_set_par = tgafb_set_par,
.fb_setcolreg = tgafb_setcolreg,
.fb_blank = tgafb_blank,
+ .fb_pan_display = tgafb_pan_display,
.fb_fillrect = tgafb_fillrect,
.fb_copyarea = tgafb_copyarea,
.fb_imageblit = tgafb_imageblit,
- .fb_cursor = soft_cursor,
};
+#ifdef CONFIG_PCI
/*
* PCI registration operations
*/
+static int __devinit tgafb_pci_register(struct pci_dev *,
+ const struct pci_device_id *);
+static void __devexit tgafb_pci_unregister(struct pci_dev *);
static struct pci_device_id const tgafb_pci_table[] = {
- { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA, PCI_ANY_ID, PCI_ANY_ID,
- 0, 0, 0 }
+ { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA) },
+ { }
};
+MODULE_DEVICE_TABLE(pci, tgafb_pci_table);
-static struct pci_driver tgafb_driver = {
+static struct pci_driver tgafb_pci_driver = {
.name = "tgafb",
.id_table = tgafb_pci_table,
.probe = tgafb_pci_register,
.remove = __devexit_p(tgafb_pci_unregister),
};
+static int __devinit
+tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
+{
+ return tgafb_register(&pdev->dev);
+}
+
+static void __devexit
+tgafb_pci_unregister(struct pci_dev *pdev)
+{
+ tgafb_unregister(&pdev->dev);
+}
+#endif /* CONFIG_PCI */
+
+#ifdef CONFIG_TC
+/*
+ * TC registration operations
+ */
+static int __devinit tgafb_tc_register(struct device *);
+static int __devexit tgafb_tc_unregister(struct device *);
+
+static struct tc_device_id const tgafb_tc_table[] = {
+ { "DEC ", "PMAGD-AA" },
+ { "DEC ", "PMAGD " },
+ { }
+};
+MODULE_DEVICE_TABLE(tc, tgafb_tc_table);
+
+static struct tc_driver tgafb_tc_driver = {
+ .id_table = tgafb_tc_table,
+ .driver = {
+ .name = "tgafb",
+ .bus = &tc_bus_type,
+ .probe = tgafb_tc_register,
+ .remove = __devexit_p(tgafb_tc_unregister),
+ },
+};
+
+static int __devinit
+tgafb_tc_register(struct device *dev)
+{
+ int status = tgafb_register(dev);
+ if (!status)
+ get_device(dev);
+ return status;
+}
+
+static int __devexit
+tgafb_tc_unregister(struct device *dev)
+{
+ put_device(dev);
+ tgafb_unregister(dev);
+ return 0;
+}
+#endif /* CONFIG_TC */
+
/**
* tgafb_check_var - Optional function. Validates a var passed in.
if (var->bits_per_pixel != 32)
return -EINVAL;
}
+ var->red.length = var->green.length = var->blue.length = 8;
+ if (var->bits_per_pixel == 32) {
+ var->red.offset = 16;
+ var->green.offset = 8;
+ var->blue.offset = 0;
+ }
if (var->xres_virtual != var->xres || var->yres_virtual != var->yres)
return -EINVAL;
tgafb_set_par(struct fb_info *info)
{
static unsigned int const deep_presets[4] = {
- 0x00014000,
- 0x0001440d,
+ 0x00004000,
+ 0x0000440d,
0xffffffff,
- 0x0001441d
+ 0x0000441d
};
static unsigned int const rasterop_presets[4] = {
0x00000003,
0x00000303
};
static unsigned int const mode_presets[4] = {
- 0x00002000,
- 0x00002300,
+ 0x00000000,
+ 0x00000300,
0xffffffff,
- 0x00002300
+ 0x00000300
};
static unsigned int const base_addr_presets[4] = {
0x00000000,
};
struct tga_par *par = (struct tga_par *) info->par;
+ int tga_bus_pci = TGA_BUS_PCI(par->dev);
+ int tga_bus_tc = TGA_BUS_TC(par->dev);
u32 htimings, vtimings, pll_freq;
u8 tga_type;
- int i, j;
+ int i;
/* Encode video timings. */
htimings = (((info->var.xres/4) & TGA_HORIZ_ACT_LSB)
while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */
continue;
mb();
- TGA_WRITE_REG(par, deep_presets[tga_type], TGA_DEEP_REG);
+ TGA_WRITE_REG(par, deep_presets[tga_type] |
+ (par->sync_on_green ? 0x0 : 0x00010000),
+ TGA_DEEP_REG);
while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */
continue;
mb();
TGA_WRITE_REG(par, vtimings, TGA_VERT_REG);
/* Initalise RAMDAC. */
- if (tga_type == TGA_TYPE_8PLANE) {
+ if (tga_type == TGA_TYPE_8PLANE && tga_bus_pci) {
/* Init BT485 RAMDAC registers. */
BT485_WRITE(par, 0xa2 | (par->sync_on_green ? 0x8 : 0x0),
BT485_WRITE(par, 0x00, BT485_ADDR_PAL_WRITE);
TGA_WRITE_REG(par, BT485_DATA_PAL, TGA_RAMDAC_SETUP_REG);
- for (i = 0; i < 16; i++) {
- j = color_table[i];
- TGA_WRITE_REG(par, default_red[j]|(BT485_DATA_PAL<<8),
- TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, default_grn[j]|(BT485_DATA_PAL<<8),
- TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, default_blu[j]|(BT485_DATA_PAL<<8),
+ for (i = 0; i < 256 * 3; i += 4) {
+ TGA_WRITE_REG(par, 0x55 | (BT485_DATA_PAL << 8),
TGA_RAMDAC_REG);
- }
- for (i = 0; i < 240*3; i += 4) {
- TGA_WRITE_REG(par, 0x55|(BT485_DATA_PAL<<8),
- TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8),
+ TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8),
TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8),
+ TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8),
TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8),
+ TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8),
TGA_RAMDAC_REG);
}
+ } else if (tga_type == TGA_TYPE_8PLANE && tga_bus_tc) {
+
+ /* Init BT459 RAMDAC registers. */
+ BT459_WRITE(par, BT459_REG_ACC, BT459_CMD_REG_0, 0x40);
+ BT459_WRITE(par, BT459_REG_ACC, BT459_CMD_REG_1, 0x00);
+ BT459_WRITE(par, BT459_REG_ACC, BT459_CMD_REG_2,
+ (par->sync_on_green ? 0xc0 : 0x40));
+
+ BT459_WRITE(par, BT459_REG_ACC, BT459_CUR_CMD_REG, 0x00);
+
+ /* Fill the palette. */
+ BT459_LOAD_ADDR(par, 0x0000);
+ TGA_WRITE_REG(par, BT459_PALETTE << 2, TGA_RAMDAC_SETUP_REG);
+
+ for (i = 0; i < 256 * 3; i += 4) {
+ TGA_WRITE_REG(par, 0x55, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
+ }
+
} else { /* 24-plane or 24plusZ */
- /* Init BT463 registers. */
+ /* Init BT463 RAMDAC registers. */
BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_0, 0x40);
BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_1, 0x08);
BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_2,
- (par->sync_on_green ? 0x80 : 0x40));
+ (par->sync_on_green ? 0xc0 : 0x40));
BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_0, 0xff);
BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_1, 0xff);
/* Fill the palette. */
BT463_LOAD_ADDR(par, 0x0000);
- TGA_WRITE_REG(par, BT463_PALETTE<<2, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, BT463_PALETTE << 2, TGA_RAMDAC_SETUP_REG);
+#ifdef CONFIG_HW_CONSOLE
for (i = 0; i < 16; i++) {
- j = color_table[i];
- TGA_WRITE_REG(par, default_red[j]|(BT463_PALETTE<<10),
- TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, default_grn[j]|(BT463_PALETTE<<10),
- TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, default_blu[j]|(BT463_PALETTE<<10),
- TGA_RAMDAC_REG);
+ int j = color_table[i];
+
+ TGA_WRITE_REG(par, default_red[j], TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, default_grn[j], TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, default_blu[j], TGA_RAMDAC_REG);
}
- for (i = 0; i < 512*3; i += 4) {
- TGA_WRITE_REG(par, 0x55|(BT463_PALETTE<<10),
- TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10),
- TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10),
- TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10),
- TGA_RAMDAC_REG);
+ for (i = 0; i < 512 * 3; i += 4) {
+#else
+ for (i = 0; i < 528 * 3; i += 4) {
+#endif
+ TGA_WRITE_REG(par, 0x55, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
}
/* Fill window type table after start of vertical retrace. */
TGA_WRITE_REG(par, 0x01, TGA_INTR_STAT_REG);
BT463_LOAD_ADDR(par, BT463_WINDOW_TYPE_BASE);
- TGA_WRITE_REG(par, BT463_REG_ACC<<2, TGA_RAMDAC_SETUP_REG);
+ TGA_WRITE_REG(par, BT463_REG_ACC << 2, TGA_RAMDAC_SETUP_REG);
for (i = 0; i < 16; i++) {
- TGA_WRITE_REG(par, 0x00|(BT463_REG_ACC<<10),
- TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, 0x01|(BT463_REG_ACC<<10),
- TGA_RAMDAC_REG);
- TGA_WRITE_REG(par, 0x80|(BT463_REG_ACC<<10),
- TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, 0x01, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
}
}
unsigned transp, struct fb_info *info)
{
struct tga_par *par = (struct tga_par *) info->par;
+ int tga_bus_pci = TGA_BUS_PCI(par->dev);
+ int tga_bus_tc = TGA_BUS_TC(par->dev);
if (regno > 255)
return 1;
green >>= 8;
blue >>= 8;
- if (par->tga_type == TGA_TYPE_8PLANE) {
+ if (par->tga_type == TGA_TYPE_8PLANE && tga_bus_pci) {
BT485_WRITE(par, regno, BT485_ADDR_PAL_WRITE);
TGA_WRITE_REG(par, BT485_DATA_PAL, TGA_RAMDAC_SETUP_REG);
TGA_WRITE_REG(par, red|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG);
TGA_WRITE_REG(par, green|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG);
TGA_WRITE_REG(par, blue|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG);
- } else if (regno < 16) {
- u32 value = (red << 16) | (green << 8) | blue;
- ((u32 *)info->pseudo_palette)[regno] = value;
+ } else if (par->tga_type == TGA_TYPE_8PLANE && tga_bus_tc) {
+ BT459_LOAD_ADDR(par, regno);
+ TGA_WRITE_REG(par, BT459_PALETTE << 2, TGA_RAMDAC_SETUP_REG);
+ TGA_WRITE_REG(par, red, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, green, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, blue, TGA_RAMDAC_REG);
+ } else {
+ if (regno < 16) {
+ u32 value = (regno << 16) | (regno << 8) | regno;
+ ((u32 *)info->pseudo_palette)[regno] = value;
+ }
+ BT463_LOAD_ADDR(par, regno);
+ TGA_WRITE_REG(par, BT463_PALETTE << 2, TGA_RAMDAC_SETUP_REG);
+ TGA_WRITE_REG(par, red, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, green, TGA_RAMDAC_REG);
+ TGA_WRITE_REG(par, blue, TGA_RAMDAC_REG);
}
return 0;
* Acceleration.
*/
-/**
- * tgafb_imageblit - REQUIRED function. Can use generic routines if
- * non acclerated hardware and packed pixel based.
- * Copies a image from system memory to the screen.
- *
- * @info: frame buffer structure that represents a single frame buffer
- * @image: structure defining the image.
- */
static void
-tgafb_imageblit(struct fb_info *info, const struct fb_image *image)
+tgafb_mono_imageblit(struct fb_info *info, const struct fb_image *image)
{
- static unsigned char const bitrev[256] = {
- 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
- 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
- 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8,
- 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8,
- 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4,
- 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4,
- 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec,
- 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc,
- 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2,
- 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2,
- 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea,
- 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa,
- 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6,
- 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6,
- 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee,
- 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe,
- 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1,
- 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1,
- 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9,
- 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9,
- 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5,
- 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5,
- 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed,
- 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd,
- 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3,
- 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3,
- 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb,
- 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb,
- 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7,
- 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7,
- 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef,
- 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff
- };
-
struct tga_par *par = (struct tga_par *) info->par;
u32 fgcolor, bgcolor, dx, dy, width, height, vxres, vyres, pixelmask;
unsigned long rincr, line_length, shift, pos, is8bpp;
void __iomem *regs_base;
void __iomem *fb_base;
+ is8bpp = info->var.bits_per_pixel == 8;
+
dx = image->dx;
dy = image->dy;
width = image->width;
line_length = info->fix.line_length;
rincr = (width + 7) / 8;
+ /* A shift below cannot cope with. */
+ if (unlikely(width == 0))
+ return;
/* Crop the image to the screen. */
if (dx > vxres || dy > vyres)
return;
if (dy + height > vyres)
height = vyres - dy;
- /* For copies that aren't pixel expansion, there's little we
- can do better than the generic code. */
- /* ??? There is a DMA write mode; I wonder if that could be
- made to pull the data from the image buffer... */
- if (image->depth > 1) {
- cfb_imageblit(info, image);
- return;
- }
-
regs_base = par->tga_regs_base;
fb_base = par->tga_fb_base;
- is8bpp = info->var.bits_per_pixel == 8;
/* Expand the color values to fill 32-bits. */
/* ??? Would be nice to notice colour changes elsewhere, so
unsigned long bwidth;
/* Handle common case of imaging a single character, in
- a font less than 32 pixels wide. */
+ a font less than or 32 pixels wide. */
- pixelmask = (1 << width) - 1;
+ /* Avoid a shift by 32; width > 0 implied. */
+ pixelmask = (2ul << (width - 1)) - 1;
pixelmask <<= shift;
__raw_writel(pixelmask, regs_base + TGA_PIXELMASK_REG);
wmb();
/* The image data is bit big endian; we need
little endian. */
for (j = 0; j < bwidth; ++j)
- mask |= bitrev[data[j]] << (j * 8);
+ mask |= bitrev8(data[j]) << (j * 8);
__raw_writel(mask << shift, fb_base + pos);
for (i = 0; i < height; ++i) {
for (j = 0; j < bwidth; j += 4) {
u32 mask = 0;
- mask |= bitrev[data[j+0]] << (0 * 8);
- mask |= bitrev[data[j+1]] << (1 * 8);
- mask |= bitrev[data[j+2]] << (2 * 8);
- mask |= bitrev[data[j+3]] << (3 * 8);
+ mask |= bitrev8(data[j+0]) << (0 * 8);
+ mask |= bitrev8(data[j+1]) << (1 * 8);
+ mask |= bitrev8(data[j+2]) << (2 * 8);
+ mask |= bitrev8(data[j+3]) << (3 * 8);
__raw_writel(mask, fb_base + pos + j*bincr);
}
pos += line_length;
for (i = 0; i < height; ++i) {
u32 mask = 0;
for (j = 0; j < bwidth; ++j)
- mask |= bitrev[data[j]] << (j * 8);
+ mask |= bitrev8(data[j]) << (j * 8);
__raw_writel(mask, fb_base + pos);
pos += line_length;
data += rincr;
for (i = 0; i < height; ++i) {
for (j = 0; j < bwidth; j += 2) {
u32 mask = 0;
- mask |= bitrev[data[j+0]] << (0 * 8);
- mask |= bitrev[data[j+1]] << (1 * 8);
+ mask |= bitrev8(data[j+0]) << (0 * 8);
+ mask |= bitrev8(data[j+1]) << (1 * 8);
mask <<= shift;
__raw_writel(mask, fb_base + pos + j*bincr);
}
bwidth = (width & 15) > 8;
for (i = 0; i < height; ++i) {
- u32 mask = bitrev[data[0]];
+ u32 mask = bitrev8(data[0]);
if (bwidth)
- mask |= bitrev[data[1]] << 8;
+ mask |= bitrev8(data[1]) << 8;
mask <<= shift;
__raw_writel(mask, fb_base + pos);
pos += line_length;
regs_base + TGA_MODE_REG);
}
+static void
+tgafb_clut_imageblit(struct fb_info *info, const struct fb_image *image)
+{
+ struct tga_par *par = (struct tga_par *) info->par;
+ u32 color, dx, dy, width, height, vxres, vyres;
+ u32 *palette = ((u32 *)info->pseudo_palette);
+ unsigned long pos, line_length, i, j;
+ const unsigned char *data;
+ void __iomem *regs_base, *fb_base;
+
+ dx = image->dx;
+ dy = image->dy;
+ width = image->width;
+ height = image->height;
+ vxres = info->var.xres_virtual;
+ vyres = info->var.yres_virtual;
+ line_length = info->fix.line_length;
+
+ /* Crop the image to the screen. */
+ if (dx > vxres || dy > vyres)
+ return;
+ if (dx + width > vxres)
+ width = vxres - dx;
+ if (dy + height > vyres)
+ height = vyres - dy;
+
+ regs_base = par->tga_regs_base;
+ fb_base = par->tga_fb_base;
+
+ pos = dy * line_length + (dx * 4);
+ data = image->data;
+
+ /* Now copy the image, color_expanding via the palette. */
+ for (i = 0; i < height; i++) {
+ for (j = 0; j < width; j++) {
+ color = palette[*data++];
+ __raw_writel(color, fb_base + pos + j*4);
+ }
+ pos += line_length;
+ }
+}
+
+/**
+ * tgafb_imageblit - REQUIRED function. Can use generic routines if
+ * non acclerated hardware and packed pixel based.
+ * Copies a image from system memory to the screen.
+ *
+ * @info: frame buffer structure that represents a single frame buffer
+ * @image: structure defining the image.
+ */
+static void
+tgafb_imageblit(struct fb_info *info, const struct fb_image *image)
+{
+ unsigned int is8bpp = info->var.bits_per_pixel == 8;
+
+ /* If a mono image, regardless of FB depth, go do it. */
+ if (image->depth == 1) {
+ tgafb_mono_imageblit(info, image);
+ return;
+ }
+
+ /* For copies that aren't pixel expansion, there's little we
+ can do better than the generic code. */
+ /* ??? There is a DMA write mode; I wonder if that could be
+ made to pull the data from the image buffer... */
+ if (image->depth == info->var.bits_per_pixel) {
+ cfb_imageblit(info, image);
+ return;
+ }
+
+ /* If 24-plane FB and the image is 8-plane with CLUT, we can do it. */
+ if (!is8bpp && image->depth == 8) {
+ tgafb_clut_imageblit(info, image);
+ return;
+ }
+
+ /* Silently return... */
+}
+
/**
* tgafb_fillrect - REQUIRED function. Can use generic routines if
* non acclerated hardware and packed pixel based.
n64 = (height * width) / 64;
- if (dy < sy) {
+ if (sy < dy) {
spos = (sy + height) * width;
dpos = (dy + height) * width;
n16 = (height * width) / 16;
- if (dy < sy) {
+ if (sy < dy) {
src = tga_fb + (sy + height) * width * 4;
dst = tga_fb + (dy + height) * width * 4;
tgafb_init_fix(struct fb_info *info)
{
struct tga_par *par = (struct tga_par *)info->par;
+ int tga_bus_pci = TGA_BUS_PCI(par->dev);
+ int tga_bus_tc = TGA_BUS_TC(par->dev);
u8 tga_type = par->tga_type;
- const char *tga_type_name;
+ const char *tga_type_name = NULL;
switch (tga_type) {
case TGA_TYPE_8PLANE:
- tga_type_name = "Digital ZLXp-E1";
+ if (tga_bus_pci)
+ tga_type_name = "Digital ZLXp-E1";
+ if (tga_bus_tc)
+ tga_type_name = "Digital ZLX-E1";
break;
case TGA_TYPE_24PLANE:
- tga_type_name = "Digital ZLXp-E2";
+ if (tga_bus_pci)
+ tga_type_name = "Digital ZLXp-E2";
+ if (tga_bus_tc)
+ tga_type_name = "Digital ZLX-E2";
break;
case TGA_TYPE_24PLUSZ:
- tga_type_name = "Digital ZLXp-E3";
+ if (tga_bus_pci)
+ tga_type_name = "Digital ZLXp-E3";
+ if (tga_bus_tc)
+ tga_type_name = "Digital ZLX-E3";
break;
default:
tga_type_name = "Unknown";
info->fix.type_aux = 0;
info->fix.visual = (tga_type == TGA_TYPE_8PLANE
? FB_VISUAL_PSEUDOCOLOR
- : FB_VISUAL_TRUECOLOR);
+ : FB_VISUAL_DIRECTCOLOR);
info->fix.line_length = par->xres * (par->bits_per_pixel >> 3);
info->fix.smem_start = (size_t) par->tga_fb_base;
info->fix.ywrapstep = 0;
info->fix.accel = FB_ACCEL_DEC_TGA;
+
+ /*
+ * These are needed by fb_set_logo_truepalette(), so we
+ * set them here for 24-plane cards.
+ */
+ if (tga_type != TGA_TYPE_8PLANE) {
+ info->var.red.length = 8;
+ info->var.green.length = 8;
+ info->var.blue.length = 8;
+ info->var.red.offset = 16;
+ info->var.green.offset = 8;
+ info->var.blue.offset = 0;
+ }
}
-static __devinit int
-tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
+static int tgafb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
{
+ /* We just use this to catch switches out of graphics mode. */
+ tgafb_set_par(info); /* A bit of overkill for BASE_ADDR reset. */
+ return 0;
+}
+
+static int __devinit
+tgafb_register(struct device *dev)
+{
+ static const struct fb_videomode modedb_tc = {
+ /* 1280x1024 @ 72 Hz, 76.8 kHz hsync */
+ "1280x1024@72", 0, 1280, 1024, 7645, 224, 28, 33, 3, 160, 3,
+ FB_SYNC_ON_GREEN, FB_VMODE_NONINTERLACED
+ };
+
static unsigned int const fb_offset_presets[4] = {
TGA_8PLANE_FB_OFFSET,
TGA_24PLANE_FB_OFFSET,
TGA_24PLUSZ_FB_OFFSET
};
- struct all_info {
- struct fb_info info;
- struct tga_par par;
- u32 pseudo_palette[16];
- } *all;
-
+ const struct fb_videomode *modedb_tga = NULL;
+ resource_size_t bar0_start = 0, bar0_len = 0;
+ const char *mode_option_tga = NULL;
+ int tga_bus_pci = TGA_BUS_PCI(dev);
+ int tga_bus_tc = TGA_BUS_TC(dev);
+ unsigned int modedbsize_tga = 0;
void __iomem *mem_base;
- unsigned long bar0_start, bar0_len;
+ struct fb_info *info;
+ struct tga_par *par;
u8 tga_type;
- int ret;
+ int ret = 0;
/* Enable device in PCI config. */
- if (pci_enable_device(pdev)) {
+ if (tga_bus_pci && pci_enable_device(to_pci_dev(dev))) {
printk(KERN_ERR "tgafb: Cannot enable PCI device\n");
return -ENODEV;
}
/* Allocate the fb and par structures. */
- all = kmalloc(sizeof(*all), GFP_KERNEL);
- if (!all) {
+ info = framebuffer_alloc(sizeof(struct tga_par), dev);
+ if (!info) {
printk(KERN_ERR "tgafb: Cannot allocate memory\n");
return -ENOMEM;
}
- memset(all, 0, sizeof(*all));
- pci_set_drvdata(pdev, all);
+
+ par = info->par;
+ dev_set_drvdata(dev, info);
/* Request the mem regions. */
- bar0_start = pci_resource_start(pdev, 0);
- bar0_len = pci_resource_len(pdev, 0);
ret = -ENODEV;
+ if (tga_bus_pci) {
+ bar0_start = pci_resource_start(to_pci_dev(dev), 0);
+ bar0_len = pci_resource_len(to_pci_dev(dev), 0);
+ }
+ if (tga_bus_tc) {
+ bar0_start = to_tc_dev(dev)->resource.start;
+ bar0_len = to_tc_dev(dev)->resource.end - bar0_start + 1;
+ }
if (!request_mem_region (bar0_start, bar0_len, "tgafb")) {
printk(KERN_ERR "tgafb: cannot reserve FB region\n");
goto err0;
}
/* Map the framebuffer. */
- mem_base = ioremap(bar0_start, bar0_len);
+ mem_base = ioremap_nocache(bar0_start, bar0_len);
if (!mem_base) {
printk(KERN_ERR "tgafb: Cannot map MMIO\n");
goto err1;
/* Grab info about the card. */
tga_type = (readl(mem_base) >> 12) & 0x0f;
- all->par.pdev = pdev;
- all->par.tga_mem_base = mem_base;
- all->par.tga_fb_base = mem_base + fb_offset_presets[tga_type];
- all->par.tga_regs_base = mem_base + TGA_REGS_OFFSET;
- all->par.tga_type = tga_type;
- pci_read_config_byte(pdev, PCI_REVISION_ID, &all->par.tga_chip_rev);
+ par->dev = dev;
+ par->tga_mem_base = mem_base;
+ par->tga_fb_base = mem_base + fb_offset_presets[tga_type];
+ par->tga_regs_base = mem_base + TGA_REGS_OFFSET;
+ par->tga_type = tga_type;
+ if (tga_bus_pci)
+ par->tga_chip_rev = (to_pci_dev(dev))->revision;
+ if (tga_bus_tc)
+ par->tga_chip_rev = TGA_READ_REG(par, TGA_START_REG) & 0xff;
/* Setup framebuffer. */
- all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA |
- FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_FILLRECT;
- all->info.fbops = &tgafb_ops;
- all->info.screen_base = all->par.tga_fb_base;
- all->info.par = &all->par;
- all->info.pseudo_palette = all->pseudo_palette;
+ info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA |
+ FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_FILLRECT;
+ info->fbops = &tgafb_ops;
+ info->screen_base = par->tga_fb_base;
+ info->pseudo_palette = par->palette;
/* This should give a reasonable default video mode. */
-
- ret = fb_find_mode(&all->info.var, &all->info, mode_option,
- NULL, 0, NULL,
+ if (tga_bus_pci) {
+ mode_option_tga = mode_option_pci;
+ }
+ if (tga_bus_tc) {
+ mode_option_tga = mode_option_tc;
+ modedb_tga = &modedb_tc;
+ modedbsize_tga = 1;
+ }
+ ret = fb_find_mode(&info->var, info,
+ mode_option ? mode_option : mode_option_tga,
+ modedb_tga, modedbsize_tga, NULL,
tga_type == TGA_TYPE_8PLANE ? 8 : 32);
if (ret == 0 || ret == 4) {
printk(KERN_ERR "tgafb: Could not find valid video mode\n");
goto err1;
}
- if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
+ if (fb_alloc_cmap(&info->cmap, 256, 0)) {
printk(KERN_ERR "tgafb: Could not allocate color map\n");
ret = -ENOMEM;
goto err1;
}
- tgafb_set_par(&all->info);
- tgafb_init_fix(&all->info);
+ tgafb_set_par(info);
+ tgafb_init_fix(info);
- all->info.device = &pdev->dev;
- if (register_framebuffer(&all->info) < 0) {
+ if (register_framebuffer(info) < 0) {
printk(KERN_ERR "tgafb: Could not register framebuffer\n");
ret = -EINVAL;
- goto err1;
+ goto err2;
}
- printk(KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n",
- all->par.tga_chip_rev);
- printk(KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
- pdev->bus->number, PCI_SLOT(pdev->devfn),
- PCI_FUNC(pdev->devfn));
- printk(KERN_INFO "fb%d: %s frame buffer device at 0x%lx\n",
- all->info.node, all->info.fix.id, bar0_start);
+ if (tga_bus_pci) {
+ pr_info("tgafb: DC21030 [TGA] detected, rev=0x%02x\n",
+ par->tga_chip_rev);
+ pr_info("tgafb: at PCI bus %d, device %d, function %d\n",
+ to_pci_dev(dev)->bus->number,
+ PCI_SLOT(to_pci_dev(dev)->devfn),
+ PCI_FUNC(to_pci_dev(dev)->devfn));
+ }
+ if (tga_bus_tc)
+ pr_info("tgafb: SFB+ detected, rev=0x%02x\n",
+ par->tga_chip_rev);
+ pr_info("fb%d: %s frame buffer device at 0x%lx\n",
+ info->node, info->fix.id, (long)bar0_start);
return 0;
+ err2:
+ fb_dealloc_cmap(&info->cmap);
err1:
+ if (mem_base)
+ iounmap(mem_base);
release_mem_region(bar0_start, bar0_len);
err0:
- kfree(all);
+ framebuffer_release(info);
return ret;
}
-static void __exit
-tgafb_pci_unregister(struct pci_dev *pdev)
+static void __devexit
+tgafb_unregister(struct device *dev)
{
- struct fb_info *info = pci_get_drvdata(pdev);
- struct tga_par *par = info->par;
+ resource_size_t bar0_start = 0, bar0_len = 0;
+ int tga_bus_pci = TGA_BUS_PCI(dev);
+ int tga_bus_tc = TGA_BUS_TC(dev);
+ struct fb_info *info = NULL;
+ struct tga_par *par;
+ info = dev_get_drvdata(dev);
if (!info)
return;
+
+ par = info->par;
unregister_framebuffer(info);
+ fb_dealloc_cmap(&info->cmap);
iounmap(par->tga_mem_base);
- release_mem_region(pci_resource_start(pdev, 0),
- pci_resource_len(pdev, 0));
- kfree(info);
+ if (tga_bus_pci) {
+ bar0_start = pci_resource_start(to_pci_dev(dev), 0);
+ bar0_len = pci_resource_len(to_pci_dev(dev), 0);
+ }
+ if (tga_bus_tc) {
+ bar0_start = to_tc_dev(dev)->resource.start;
+ bar0_len = to_tc_dev(dev)->resource.end - bar0_start + 1;
+ }
+ release_mem_region(bar0_start, bar0_len);
+ framebuffer_release(info);
}
-#ifdef MODULE
-static void __exit
+static void __devexit
tgafb_exit(void)
{
- pci_unregister_driver(&tgafb_driver);
+ tc_unregister_driver(&tgafb_tc_driver);
+ pci_unregister_driver(&tgafb_pci_driver);
}
-#endif /* MODULE */
#ifndef MODULE
-int __init
+static int __devinit
tgafb_setup(char *arg)
{
char *this_opt;
}
#endif /* !MODULE */
-int __init
+static int __devinit
tgafb_init(void)
{
+ int status;
#ifndef MODULE
char *option = NULL;
return -ENODEV;
tgafb_setup(option);
#endif
- return pci_register_driver(&tgafb_driver);
+ status = pci_register_driver(&tgafb_pci_driver);
+ if (!status)
+ status = tc_register_driver(&tgafb_tc_driver);
+ return status;
}
/*
*/
module_init(tgafb_init);
-
-#ifdef MODULE
module_exit(tgafb_exit);
-#endif
-MODULE_DESCRIPTION("framebuffer driver for TGA chipset");
+MODULE_DESCRIPTION("Framebuffer driver for TGA/SFB+ chipset");
MODULE_LICENSE("GPL");
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff