fbdev: move FBIO_WAITFORVSYNC to linux/fb.h

[safe/jmp/linux-2.6] / drivers / video / intelfb / intelfbhw.c

diff --git a/drivers/video/intelfb/intelfbhw.c b/drivers/video/intelfb/intelfbhw.c
index fa1fff5..38065cf 100644 (file)
--- a/drivers/video/intelfb/intelfbhw.c
+++ b/drivers/video/intelfb/intelfbhw.c
@@ -24,7 +24,6 @@
 #include <linux/errno.h>
 #include <linux/string.h>
 #include <linux/mm.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/fb.h>
 #include <linux/ioport.h>
@@ -84,6 +83,11 @@ int intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo)
                dinfo->mobile = 0;
                dinfo->pll_index = PLLS_I8xx;
                return 0;
+       case PCI_DEVICE_ID_INTEL_854:
+               dinfo->mobile = 1;
+               dinfo->name = "Intel(R) 854";
+               dinfo->chipset = INTEL_854;
+               return 0;
        case PCI_DEVICE_ID_INTEL_85XGM:
                tmp = 0;
                dinfo->mobile = 1;
@@ -143,6 +147,24 @@ int intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo)
                dinfo->mobile = 1;
                dinfo->pll_index = PLLS_I9xx;
                return 0;
+       case PCI_DEVICE_ID_INTEL_945GME:
+               dinfo->name = "Intel(R) 945GME";
+               dinfo->chipset = INTEL_945GME;
+               dinfo->mobile = 1;
+               dinfo->pll_index = PLLS_I9xx;
+               return 0;
+       case PCI_DEVICE_ID_INTEL_965G:
+               dinfo->name = "Intel(R) 965G";
+               dinfo->chipset = INTEL_965G;
+               dinfo->mobile = 0;
+               dinfo->pll_index = PLLS_I9xx;
+               return 0;
+       case PCI_DEVICE_ID_INTEL_965GM:
+               dinfo->name = "Intel(R) 965GM";
+               dinfo->chipset = INTEL_965GM;
+               dinfo->mobile = 1;
+               dinfo->pll_index = PLLS_I9xx;
+               return 0;
        default:
                return 1;
        }
@@ -174,7 +196,10 @@ int intelfbhw_get_memory(struct pci_dev *pdev, int *aperture_size,
        case PCI_DEVICE_ID_INTEL_915GM:
        case PCI_DEVICE_ID_INTEL_945G:
        case PCI_DEVICE_ID_INTEL_945GM:
-               /* 915 and 945 chipsets support a 256MB aperture.
+       case PCI_DEVICE_ID_INTEL_945GME:
+       case PCI_DEVICE_ID_INTEL_965G:
+       case PCI_DEVICE_ID_INTEL_965GM:
+               /* 915, 945 and 965 chipsets support a 256MB aperture.
                   Aperture size is determined by inspected the
                   base address of the aperture. */
                if (pci_resource_start(pdev, 2) & 0x08000000)
@@ -443,6 +468,32 @@ void intelfbhw_do_blank(int blank, struct fb_info *info)
 }
 
 
+/* Check which pipe is connected to an active display plane. */
+int intelfbhw_active_pipe(const struct intelfb_hwstate *hw)
+{
+       int pipe = -1;
+
+       /* keep old default behaviour - prefer PIPE_A */
+       if (hw->disp_b_ctrl & DISPPLANE_PLANE_ENABLE) {
+               pipe = (hw->disp_b_ctrl >> DISPPLANE_SEL_PIPE_SHIFT);
+               pipe &= PIPE_MASK;
+               if (unlikely(pipe == PIPE_A))
+                       return PIPE_A;
+       }
+       if (hw->disp_a_ctrl & DISPPLANE_PLANE_ENABLE) {
+               pipe = (hw->disp_a_ctrl >> DISPPLANE_SEL_PIPE_SHIFT);
+               pipe &= PIPE_MASK;
+               if (likely(pipe == PIPE_A))
+                       return PIPE_A;
+       }
+       /* Impossible that no pipe is selected - return PIPE_A */
+       WARN_ON(pipe == -1);
+       if (unlikely(pipe == -1))
+               pipe = PIPE_A;
+
+       return pipe;
+}
+
 void intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno,
                         unsigned red, unsigned green, unsigned blue,
                         unsigned transp)
@@ -993,7 +1044,7 @@ int intelfbhw_mode_to_hw(struct intelfb_info *dinfo,
                         struct intelfb_hwstate *hw,
                         struct fb_var_screeninfo *var)
 {
-       int pipe = PIPE_A;
+       int pipe = intelfbhw_active_pipe(hw);
        u32 *dpll, *fp0, *fp1;
        u32 m1, m2, n, p1, p2, clock_target, clock;
        u32 hsync_start, hsync_end, hblank_start, hblank_end, htotal, hactive;
@@ -1007,12 +1058,6 @@ int intelfbhw_mode_to_hw(struct intelfb_info *dinfo,
        /* Disable VGA */
        hw->vgacntrl |= VGA_DISABLE;
 
-       /* Check whether pipe A or pipe B is enabled. */
-       if (hw->pipe_a_conf & PIPECONF_ENABLE)
-               pipe = PIPE_A;
-       else if (hw->pipe_b_conf & PIPECONF_ENABLE)
-               pipe = PIPE_B;
-
        /* Set which pipe's registers will be set. */
        if (pipe == PIPE_B) {
                dpll = &hw->dpll_b;
@@ -1236,7 +1281,6 @@ int intelfbhw_mode_to_hw(struct intelfb_info *dinfo,
 int intelfbhw_program_mode(struct intelfb_info *dinfo,
                           const struct intelfb_hwstate *hw, int blank)
 {
-       int pipe = PIPE_A;
        u32 tmp;
        const u32 *dpll, *fp0, *fp1, *pipe_conf;
        const u32 *hs, *ht, *hb, *vs, *vt, *vb, *ss;
@@ -1246,7 +1290,7 @@ int intelfbhw_program_mode(struct intelfb_info *dinfo,
        u32 src_size_reg;
        u32 count, tmp_val[3];
 
-       /* Assume single pipe, display plane A, analog CRT. */
+       /* Assume single pipe */
 
 #if VERBOSE > 0
        DBG_MSG("intelfbhw_program_mode\n");
@@ -1257,15 +1301,9 @@ int intelfbhw_program_mode(struct intelfb_info *dinfo,
        tmp |= VGA_DISABLE;
        OUTREG(VGACNTRL, tmp);
 
-       /* Check whether pipe A or pipe B is enabled. */
-       if (hw->pipe_a_conf & PIPECONF_ENABLE)
-               pipe = PIPE_A;
-       else if (hw->pipe_b_conf & PIPECONF_ENABLE)
-               pipe = PIPE_B;
+       dinfo->pipe = intelfbhw_active_pipe(hw);
 
-       dinfo->pipe = pipe;
-
-       if (pipe == PIPE_B) {
+       if (dinfo->pipe == PIPE_B) {
                dpll = &hw->dpll_b;
                fp0 = &hw->fpb0;
                fp1 = &hw->fpb1;