* Agere Systems Inc.
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
*
- * Copyright © 2005 Agere Systems Inc.
+ * Copyright © 2005 Agere Systems Inc.
* All rights reserved.
* http://www.agere.com
*
* software indicates your acceptance of these terms and conditions. If you do
* not agree with these terms and conditions, do not use the software.
*
- * Copyright © 2005 Agere Systems Inc.
+ * Copyright © 2005 Agere Systems Inc.
* All rights reserved.
*
* Redistribution and use in source or binary forms, with or without
*
* Disclaimer
*
- * THIS SOFTWARE IS PROVIDED \93AS IS\94 AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
*/
#include "et131x_version.h"
-#include "et131x_debug.h"
#include "et131x_defs.h"
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/in.h>
#include <linux/delay.h>
-#include <asm/io.h>
+#include <linux/io.h>
+#include <linux/bitops.h>
#include <asm/system.h>
-#include <asm/bitops.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ioport.h>
#include "et1310_phy.h"
-#include "et1310_pm.h"
-#include "et1310_jagcore.h"
-
#include "et131x_adapter.h"
-#include "et131x_initpci.h"
-
#include "et1310_rx.h"
+#include "et131x.h"
-/* Data for debugging facilities */
-#ifdef CONFIG_ET131X_DEBUG
-extern dbg_info_t *et131x_dbginfo;
-#endif /* CONFIG_ET131X_DEBUG */
-
-
-void nic_return_rfd(struct et131x_adapter *pAdapter, PMP_RFD pMpRfd);
+void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD pMpRfd);
/**
* et131x_rx_dma_memory_alloc
*/
int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
{
- uint32_t OuterLoop, InnerLoop;
- uint32_t bufsize;
- uint32_t pktStatRingSize, FBRChunkSize;
- RX_RING_t *rx_ring;
-
- DBG_ENTER(et131x_dbginfo);
+ u32 i, j;
+ u32 bufsize;
+ u32 pktStatRingSize, FBRChunkSize;
+ struct rx_ring *rx_ring;
/* Setup some convenience pointers */
- rx_ring = (RX_RING_t *) & adapter->RxRing;
+ rx_ring = &adapter->rx_ring;
/* Alloc memory for the lookup table */
#ifdef USE_FBR0
- rx_ring->Fbr[0] = kmalloc(sizeof(FBRLOOKUPTABLE), GFP_KERNEL);
+ rx_ring->fbr[0] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL);
#endif
-
- rx_ring->Fbr[1] = kmalloc(sizeof(FBRLOOKUPTABLE), GFP_KERNEL);
+ rx_ring->fbr[1] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL);
/* The first thing we will do is configure the sizes of the buffer
* rings. These will change based on jumbo packet support. Larger
}
#ifdef USE_FBR0
- adapter->RxRing.PsrNumEntries = adapter->RxRing.Fbr0NumEntries +
- adapter->RxRing.Fbr1NumEntries;
+ adapter->rx_ring.PsrNumEntries = adapter->rx_ring.Fbr0NumEntries +
+ adapter->rx_ring.Fbr1NumEntries;
#else
- adapter->RxRing.PsrNumEntries = adapter->RxRing.Fbr1NumEntries;
+ adapter->rx_ring.PsrNumEntries = adapter->rx_ring.Fbr1NumEntries;
#endif
/* Allocate an area of memory for Free Buffer Ring 1 */
- bufsize = (sizeof(FBR_DESC_t) * rx_ring->Fbr1NumEntries) + 0xfff;
+ bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr1NumEntries) + 0xfff;
rx_ring->pFbr1RingVa = pci_alloc_consistent(adapter->pdev,
bufsize,
&rx_ring->pFbr1RingPa);
if (!rx_ring->pFbr1RingVa) {
- DBG_ERROR(et131x_dbginfo,
+ dev_err(&adapter->pdev->dev,
"Cannot alloc memory for Free Buffer Ring 1\n");
- DBG_LEAVE(et131x_dbginfo);
return -ENOMEM;
}
&rx_ring->Fbr1Realpa,
&rx_ring->Fbr1offset, 0x0FFF);
- rx_ring->pFbr1RingVa = (void *)((uint8_t *) rx_ring->pFbr1RingVa +
+ rx_ring->pFbr1RingVa = (void *)((u8 *) rx_ring->pFbr1RingVa +
rx_ring->Fbr1offset);
#ifdef USE_FBR0
/* Allocate an area of memory for Free Buffer Ring 0 */
- bufsize = (sizeof(FBR_DESC_t) * rx_ring->Fbr0NumEntries) + 0xfff;
+ bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr0NumEntries) + 0xfff;
rx_ring->pFbr0RingVa = pci_alloc_consistent(adapter->pdev,
bufsize,
&rx_ring->pFbr0RingPa);
if (!rx_ring->pFbr0RingVa) {
- DBG_ERROR(et131x_dbginfo,
+ dev_err(&adapter->pdev->dev,
"Cannot alloc memory for Free Buffer Ring 0\n");
- DBG_LEAVE(et131x_dbginfo);
return -ENOMEM;
}
&rx_ring->Fbr0Realpa,
&rx_ring->Fbr0offset, 0x0FFF);
- rx_ring->pFbr0RingVa = (void *)((uint8_t *) rx_ring->pFbr0RingVa +
+ rx_ring->pFbr0RingVa = (void *)((u8 *) rx_ring->pFbr0RingVa +
rx_ring->Fbr0offset);
#endif
- for (OuterLoop = 0; OuterLoop < (rx_ring->Fbr1NumEntries / FBR_CHUNKS);
- OuterLoop++) {
- uint64_t Fbr1Offset;
- uint64_t Fbr1TempPa;
- uint32_t Fbr1Align;
+ for (i = 0; i < (rx_ring->Fbr1NumEntries / FBR_CHUNKS);
+ i++) {
+ u64 Fbr1Offset;
+ u64 Fbr1TempPa;
+ u32 Fbr1Align;
/* This code allocates an area of memory big enough for N
* free buffers + (buffer_size - 1) so that the buffers can
* the size of FBR0. By allocating N buffers at once, we
* reduce this overhead.
*/
- if (rx_ring->Fbr1BufferSize > 4096) {
+ if (rx_ring->Fbr1BufferSize > 4096)
Fbr1Align = 4096;
- } else {
+ else
Fbr1Align = rx_ring->Fbr1BufferSize;
- }
FBRChunkSize =
(FBR_CHUNKS * rx_ring->Fbr1BufferSize) + Fbr1Align - 1;
- rx_ring->Fbr1MemVa[OuterLoop] =
+ rx_ring->Fbr1MemVa[i] =
pci_alloc_consistent(adapter->pdev, FBRChunkSize,
- &rx_ring->Fbr1MemPa[OuterLoop]);
+ &rx_ring->Fbr1MemPa[i]);
- if (!rx_ring->Fbr1MemVa[OuterLoop]) {
- DBG_ERROR(et131x_dbginfo, "Could not alloc memory\n");
- DBG_LEAVE(et131x_dbginfo);
+ if (!rx_ring->Fbr1MemVa[i]) {
+ dev_err(&adapter->pdev->dev,
+ "Could not alloc memory\n");
return -ENOMEM;
}
/* See NOTE in "Save Physical Address" comment above */
- Fbr1TempPa = rx_ring->Fbr1MemPa[OuterLoop];
+ Fbr1TempPa = rx_ring->Fbr1MemPa[i];
et131x_align_allocated_memory(adapter,
&Fbr1TempPa,
&Fbr1Offset, (Fbr1Align - 1));
- for (InnerLoop = 0; InnerLoop < FBR_CHUNKS; InnerLoop++) {
- uint32_t index = (OuterLoop * FBR_CHUNKS) + InnerLoop;
+ for (j = 0; j < FBR_CHUNKS; j++) {
+ u32 index = (i * FBR_CHUNKS) + j;
/* Save the Virtual address of this index for quick
* access later
*/
- rx_ring->Fbr[1]->Va[index] =
- (uint8_t *) rx_ring->Fbr1MemVa[OuterLoop] +
- (InnerLoop * rx_ring->Fbr1BufferSize) + Fbr1Offset;
+ rx_ring->fbr[1]->virt[index] =
+ (u8 *) rx_ring->Fbr1MemVa[i] +
+ (j * rx_ring->Fbr1BufferSize) + Fbr1Offset;
/* now store the physical address in the descriptor
* so the device can access it
*/
- rx_ring->Fbr[1]->PAHigh[index] =
- (uint32_t) (Fbr1TempPa >> 32);
- rx_ring->Fbr[1]->PALow[index] = (uint32_t) Fbr1TempPa;
+ rx_ring->fbr[1]->bus_high[index] =
+ (u32) (Fbr1TempPa >> 32);
+ rx_ring->fbr[1]->bus_low[index] = (u32) Fbr1TempPa;
Fbr1TempPa += rx_ring->Fbr1BufferSize;
- rx_ring->Fbr[1]->Buffer1[index] =
- rx_ring->Fbr[1]->Va[index];
- rx_ring->Fbr[1]->Buffer2[index] =
- rx_ring->Fbr[1]->Va[index] - 4;
+ rx_ring->fbr[1]->buffer1[index] =
+ rx_ring->fbr[1]->virt[index];
+ rx_ring->fbr[1]->buffer2[index] =
+ rx_ring->fbr[1]->virt[index] - 4;
}
}
#ifdef USE_FBR0
/* Same for FBR0 (if in use) */
- for (OuterLoop = 0; OuterLoop < (rx_ring->Fbr0NumEntries / FBR_CHUNKS);
- OuterLoop++) {
- uint64_t Fbr0Offset;
- uint64_t Fbr0TempPa;
+ for (i = 0; i < (rx_ring->Fbr0NumEntries / FBR_CHUNKS);
+ i++) {
+ u64 Fbr0Offset;
+ u64 Fbr0TempPa;
FBRChunkSize = ((FBR_CHUNKS + 1) * rx_ring->Fbr0BufferSize) - 1;
- rx_ring->Fbr0MemVa[OuterLoop] =
+ rx_ring->Fbr0MemVa[i] =
pci_alloc_consistent(adapter->pdev, FBRChunkSize,
- &rx_ring->Fbr0MemPa[OuterLoop]);
+ &rx_ring->Fbr0MemPa[i]);
- if (!rx_ring->Fbr0MemVa[OuterLoop]) {
- DBG_ERROR(et131x_dbginfo, "Could not alloc memory\n");
- DBG_LEAVE(et131x_dbginfo);
+ if (!rx_ring->Fbr0MemVa[i]) {
+ dev_err(&adapter->pdev->dev,
+ "Could not alloc memory\n");
return -ENOMEM;
}
/* See NOTE in "Save Physical Address" comment above */
- Fbr0TempPa = rx_ring->Fbr0MemPa[OuterLoop];
+ Fbr0TempPa = rx_ring->Fbr0MemPa[i];
et131x_align_allocated_memory(adapter,
&Fbr0TempPa,
&Fbr0Offset,
rx_ring->Fbr0BufferSize - 1);
- for (InnerLoop = 0; InnerLoop < FBR_CHUNKS; InnerLoop++) {
- uint32_t index = (OuterLoop * FBR_CHUNKS) + InnerLoop;
+ for (j = 0; j < FBR_CHUNKS; j++) {
+ u32 index = (i * FBR_CHUNKS) + j;
- rx_ring->Fbr[0]->Va[index] =
- (uint8_t *) rx_ring->Fbr0MemVa[OuterLoop] +
- (InnerLoop * rx_ring->Fbr0BufferSize) + Fbr0Offset;
+ rx_ring->fbr[0]->virt[index] =
+ (u8 *) rx_ring->Fbr0MemVa[i] +
+ (j * rx_ring->Fbr0BufferSize) + Fbr0Offset;
- rx_ring->Fbr[0]->PAHigh[index] =
- (uint32_t) (Fbr0TempPa >> 32);
- rx_ring->Fbr[0]->PALow[index] = (uint32_t) Fbr0TempPa;
+ rx_ring->fbr[0]->bus_high[index] =
+ (u32) (Fbr0TempPa >> 32);
+ rx_ring->fbr[0]->bus_low[index] = (u32) Fbr0TempPa;
Fbr0TempPa += rx_ring->Fbr0BufferSize;
- rx_ring->Fbr[0]->Buffer1[index] =
- rx_ring->Fbr[0]->Va[index];
- rx_ring->Fbr[0]->Buffer2[index] =
- rx_ring->Fbr[0]->Va[index] - 4;
+ rx_ring->fbr[0]->buffer1[index] =
+ rx_ring->fbr[0]->virt[index];
+ rx_ring->fbr[0]->buffer2[index] =
+ rx_ring->fbr[0]->virt[index] - 4;
}
}
#endif
/* Allocate an area of memory for FIFO of Packet Status ring entries */
pktStatRingSize =
- sizeof(PKT_STAT_DESC_t) * adapter->RxRing.PsrNumEntries;
+ sizeof(struct pkt_stat_desc) * adapter->rx_ring.PsrNumEntries;
rx_ring->pPSRingVa = pci_alloc_consistent(adapter->pdev,
- pktStatRingSize + 0x0fff,
+ pktStatRingSize,
&rx_ring->pPSRingPa);
if (!rx_ring->pPSRingVa) {
- DBG_ERROR(et131x_dbginfo,
+ dev_err(&adapter->pdev->dev,
"Cannot alloc memory for Packet Status Ring\n");
- DBG_LEAVE(et131x_dbginfo);
return -ENOMEM;
}
+ printk(KERN_INFO "PSR %lx\n", (unsigned long) rx_ring->pPSRingPa);
- /* Save physical address
- *
+ /*
* NOTE : pci_alloc_consistent(), used above to alloc DMA regions,
* ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses
* are ever returned, make sure the high part is retrieved here before
* storing the adjusted address.
*/
- rx_ring->pPSRingRealPa = rx_ring->pPSRingPa;
-
- /* Align Packet Status Ring on a 4K boundary */
- et131x_align_allocated_memory(adapter,
- &rx_ring->pPSRingRealPa,
- &rx_ring->pPSRingOffset, 0x0FFF);
-
- rx_ring->pPSRingVa = (void *)((uint8_t *) rx_ring->pPSRingVa +
- rx_ring->pPSRingOffset);
/* Allocate an area of memory for writeback of status information */
- rx_ring->pRxStatusVa = pci_alloc_consistent(adapter->pdev,
- sizeof(RX_STATUS_BLOCK_t) +
- 0x7, &rx_ring->pRxStatusPa);
- if (!rx_ring->pRxStatusVa) {
- DBG_ERROR(et131x_dbginfo,
+ rx_ring->rx_status_block = pci_alloc_consistent(adapter->pdev,
+ sizeof(struct rx_status_block),
+ &rx_ring->rx_status_bus);
+ if (!rx_ring->rx_status_block) {
+ dev_err(&adapter->pdev->dev,
"Cannot alloc memory for Status Block\n");
- DBG_LEAVE(et131x_dbginfo);
return -ENOMEM;
}
-
- /* Save physical address */
- rx_ring->RxStatusRealPA = rx_ring->pRxStatusPa;
-
- /* Align write back on an 8 byte boundary */
- et131x_align_allocated_memory(adapter,
- &rx_ring->RxStatusRealPA,
- &rx_ring->RxStatusOffset, 0x07);
-
- rx_ring->pRxStatusVa = (void *)((uint8_t *) rx_ring->pRxStatusVa +
- rx_ring->RxStatusOffset);
rx_ring->NumRfd = NIC_DEFAULT_NUM_RFD;
+ printk(KERN_INFO "PRS %lx\n", (unsigned long)rx_ring->rx_status_bus);
/* Recv
* pci_pool_create initializes a lookaside list. After successful
SLAB_HWCACHE_ALIGN,
NULL);
- MP_SET_FLAG(adapter, fMP_ADAPTER_RECV_LOOKASIDE);
+ adapter->Flags |= fMP_ADAPTER_RECV_LOOKASIDE;
/* The RFDs are going to be put on lists later on, so initialize the
* lists now.
*/
INIT_LIST_HEAD(&rx_ring->RecvList);
- INIT_LIST_HEAD(&rx_ring->RecvPendingList);
-
- DBG_LEAVE(et131x_dbginfo);
return 0;
}
*/
void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
{
- uint32_t index;
- uint32_t bufsize;
- uint32_t pktStatRingSize;
- PMP_RFD pMpRfd;
- RX_RING_t *rx_ring;
-
- DBG_ENTER(et131x_dbginfo);
+ u32 index;
+ u32 bufsize;
+ u32 pktStatRingSize;
+ PMP_RFD rfd;
+ struct rx_ring *rx_ring;
/* Setup some convenience pointers */
- rx_ring = (RX_RING_t *) & adapter->RxRing;
+ rx_ring = &adapter->rx_ring;
/* Free RFDs and associated packet descriptors */
- DBG_ASSERT(rx_ring->nReadyRecv == rx_ring->NumRfd);
+ WARN_ON(rx_ring->nReadyRecv != rx_ring->NumRfd);
while (!list_empty(&rx_ring->RecvList)) {
- pMpRfd = (MP_RFD *) list_entry(rx_ring->RecvList.next,
+ rfd = (MP_RFD *) list_entry(rx_ring->RecvList.next,
MP_RFD, list_node);
- list_del(&pMpRfd->list_node);
- et131x_rfd_resources_free(adapter, pMpRfd);
- }
-
- while (!list_empty(&rx_ring->RecvPendingList)) {
- pMpRfd = (MP_RFD *) list_entry(rx_ring->RecvPendingList.next,
- MP_RFD, list_node);
- list_del(&pMpRfd->list_node);
- et131x_rfd_resources_free(adapter, pMpRfd);
+ list_del(&rfd->list_node);
+ rfd->Packet = NULL;
+ kmem_cache_free(adapter->rx_ring.RecvLookaside, rfd);
}
/* Free Free Buffer Ring 1 */
for (index = 0; index <
(rx_ring->Fbr1NumEntries / FBR_CHUNKS); index++) {
if (rx_ring->Fbr1MemVa[index]) {
- uint32_t Fbr1Align;
+ u32 Fbr1Align;
- if (rx_ring->Fbr1BufferSize > 4096) {
+ if (rx_ring->Fbr1BufferSize > 4096)
Fbr1Align = 4096;
- } else {
+ else
Fbr1Align = rx_ring->Fbr1BufferSize;
- }
bufsize =
(rx_ring->Fbr1BufferSize * FBR_CHUNKS) +
}
/* Now the FIFO itself */
- rx_ring->pFbr1RingVa = (void *)((uint8_t *) rx_ring->pFbr1RingVa -
- rx_ring->Fbr1offset);
+ rx_ring->pFbr1RingVa = (void *)((u8 *)
+ rx_ring->pFbr1RingVa - rx_ring->Fbr1offset);
- bufsize =
- (sizeof(FBR_DESC_t) * rx_ring->Fbr1NumEntries) + 0xfff;
+ bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr1NumEntries)
+ + 0xfff;
- pci_free_consistent(adapter->pdev,
- bufsize,
- rx_ring->pFbr1RingVa, rx_ring->pFbr1RingPa);
+ pci_free_consistent(adapter->pdev, bufsize,
+ rx_ring->pFbr1RingVa, rx_ring->pFbr1RingPa);
rx_ring->pFbr1RingVa = NULL;
}
}
/* Now the FIFO itself */
- rx_ring->pFbr0RingVa = (void *)((uint8_t *) rx_ring->pFbr0RingVa -
- rx_ring->Fbr0offset);
+ rx_ring->pFbr0RingVa = (void *)((u8 *)
+ rx_ring->pFbr0RingVa - rx_ring->Fbr0offset);
- bufsize =
- (sizeof(FBR_DESC_t) * rx_ring->Fbr0NumEntries) + 0xfff;
+ bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr0NumEntries)
+ + 0xfff;
pci_free_consistent(adapter->pdev,
bufsize,
/* Free Packet Status Ring */
if (rx_ring->pPSRingVa) {
- rx_ring->pPSRingVa = (void *)((uint8_t *) rx_ring->pPSRingVa -
- rx_ring->pPSRingOffset);
-
pktStatRingSize =
- sizeof(PKT_STAT_DESC_t) * adapter->RxRing.PsrNumEntries;
+ sizeof(struct pkt_stat_desc) * adapter->rx_ring.PsrNumEntries;
- pci_free_consistent(adapter->pdev,
- pktStatRingSize + 0x0fff,
+ pci_free_consistent(adapter->pdev, pktStatRingSize,
rx_ring->pPSRingVa, rx_ring->pPSRingPa);
rx_ring->pPSRingVa = NULL;
}
/* Free area of memory for the writeback of status information */
- if (rx_ring->pRxStatusVa) {
- rx_ring->pRxStatusVa = (void *)((uint8_t *) rx_ring->pRxStatusVa -
- rx_ring->RxStatusOffset);
-
+ if (rx_ring->rx_status_block) {
pci_free_consistent(adapter->pdev,
- sizeof(RX_STATUS_BLOCK_t) + 0x7,
- rx_ring->pRxStatusVa, rx_ring->pRxStatusPa);
-
- rx_ring->pRxStatusVa = NULL;
+ sizeof(struct rx_status_block),
+ rx_ring->rx_status_block, rx_ring->rx_status_bus);
+ rx_ring->rx_status_block = NULL;
}
/* Free receive buffer pool */
/* Free receive packet pool */
/* Destroy the lookaside (RFD) pool */
- if (MP_TEST_FLAG(adapter, fMP_ADAPTER_RECV_LOOKASIDE)) {
+ if (adapter->Flags & fMP_ADAPTER_RECV_LOOKASIDE) {
kmem_cache_destroy(rx_ring->RecvLookaside);
- MP_CLEAR_FLAG(adapter, fMP_ADAPTER_RECV_LOOKASIDE);
+ adapter->Flags &= ~fMP_ADAPTER_RECV_LOOKASIDE;
}
/* Free the FBR Lookup Table */
#ifdef USE_FBR0
- kfree(rx_ring->Fbr[0]);
+ kfree(rx_ring->fbr[0]);
#endif
- kfree(rx_ring->Fbr[1]);
+ kfree(rx_ring->fbr[1]);
/* Reset Counters */
rx_ring->nReadyRecv = 0;
-
- DBG_LEAVE(et131x_dbginfo);
}
/**
int et131x_init_recv(struct et131x_adapter *adapter)
{
int status = -ENOMEM;
- PMP_RFD pMpRfd = NULL;
- uint32_t RfdCount;
- uint32_t TotalNumRfd = 0;
- RX_RING_t *rx_ring = NULL;
-
- DBG_ENTER(et131x_dbginfo);
+ PMP_RFD rfd = NULL;
+ u32 rfdct;
+ u32 numrfd = 0;
+ struct rx_ring *rx_ring;
/* Setup some convenience pointers */
- rx_ring = (RX_RING_t *) & adapter->RxRing;
+ rx_ring = &adapter->rx_ring;
/* Setup each RFD */
- for (RfdCount = 0; RfdCount < rx_ring->NumRfd; RfdCount++) {
- pMpRfd = (MP_RFD *) kmem_cache_alloc(rx_ring->RecvLookaside,
+ for (rfdct = 0; rfdct < rx_ring->NumRfd; rfdct++) {
+ rfd = kmem_cache_alloc(rx_ring->RecvLookaside,
GFP_ATOMIC | GFP_DMA);
- if (!pMpRfd) {
- DBG_ERROR(et131x_dbginfo,
+ if (!rfd) {
+ dev_err(&adapter->pdev->dev,
"Couldn't alloc RFD out of kmem_cache\n");
status = -ENOMEM;
continue;
}
- status = et131x_rfd_resources_alloc(adapter, pMpRfd);
- if (status != 0) {
- DBG_ERROR(et131x_dbginfo,
- "Couldn't alloc packet for RFD\n");
- kmem_cache_free(rx_ring->RecvLookaside, pMpRfd);
- continue;
- }
+ rfd->Packet = NULL;
/* Add this RFD to the RecvList */
- list_add_tail(&pMpRfd->list_node, &rx_ring->RecvList);
+ list_add_tail(&rfd->list_node, &rx_ring->RecvList);
/* Increment both the available RFD's, and the total RFD's. */
rx_ring->nReadyRecv++;
- TotalNumRfd++;
+ numrfd++;
}
- if (TotalNumRfd > NIC_MIN_NUM_RFD) {
+ if (numrfd > NIC_MIN_NUM_RFD)
status = 0;
- }
- rx_ring->NumRfd = TotalNumRfd;
+ rx_ring->NumRfd = numrfd;
if (status != 0) {
- kmem_cache_free(rx_ring->RecvLookaside, pMpRfd);
- DBG_ERROR(et131x_dbginfo,
+ kmem_cache_free(rx_ring->RecvLookaside, rfd);
+ dev_err(&adapter->pdev->dev,
"Allocation problems in et131x_init_recv\n");
}
-
- DBG_LEAVE(et131x_dbginfo);
return status;
}
/**
- * et131x_rfd_resources_alloc
- * @adapter: pointer to our private adapter structure
- * @pMpRfd: pointer to a RFD
- *
- * Returns 0 on success and errno on failure (as defined in errno.h)
- */
-int et131x_rfd_resources_alloc(struct et131x_adapter *adapter, MP_RFD *pMpRfd)
-{
- pMpRfd->Packet = NULL;
-
- return 0;
-}
-
-/**
- * et131x_rfd_resources_free - Free the packet allocated for the given RFD
- * @adapter: pointer to our private adapter structure
- * @pMpRfd: pointer to a RFD
- */
-void et131x_rfd_resources_free(struct et131x_adapter *adapter, MP_RFD *pMpRfd)
-{
- pMpRfd->Packet = NULL;
- kmem_cache_free(adapter->RxRing.RecvLookaside, pMpRfd);
-}
-
-/**
* ConfigRxDmaRegs - Start of Rx_DMA init sequence
- * @pAdapter: pointer to our adapter structure
+ * @etdev: pointer to our adapter structure
*/
-void ConfigRxDmaRegs(struct et131x_adapter *pAdapter)
+void ConfigRxDmaRegs(struct et131x_adapter *etdev)
{
- struct _RXDMA_t __iomem *pRxDma = &pAdapter->CSRAddress->rxdma;
- struct _rx_ring_t *pRxLocal = &pAdapter->RxRing;
- PFBR_DESC_t pFbrEntry;
- uint32_t iEntry;
- RXDMA_PSR_NUM_DES_t psr_num_des;
- unsigned long lockflags;
-
- DBG_ENTER(et131x_dbginfo);
+ struct rxdma_regs __iomem *rx_dma = &etdev->regs->rxdma;
+ struct rx_ring *rx_local = &etdev->rx_ring;
+ struct fbr_desc *fbr_entry;
+ u32 entry;
+ u32 psr_num_des;
+ unsigned long flags;
/* Halt RXDMA to perform the reconfigure. */
- et131x_rx_dma_disable(pAdapter);
+ et131x_rx_dma_disable(etdev);
/* Load the completion writeback physical address
*
* are ever returned, make sure the high part is retrieved here
* before storing the adjusted address.
*/
- writel((uint32_t) (pRxLocal->RxStatusRealPA >> 32),
- &pRxDma->dma_wb_base_hi);
- writel((uint32_t) pRxLocal->RxStatusRealPA, &pRxDma->dma_wb_base_lo);
+ writel((u32) ((u64)rx_local->rx_status_bus >> 32),
+ &rx_dma->dma_wb_base_hi);
+ writel((u32) rx_local->rx_status_bus, &rx_dma->dma_wb_base_lo);
- memset(pRxLocal->pRxStatusVa, 0, sizeof(RX_STATUS_BLOCK_t));
+ memset(rx_local->rx_status_block, 0, sizeof(struct rx_status_block));
/* Set the address and parameters of the packet status ring into the
* 1310's registers
*/
- writel((uint32_t) (pRxLocal->pPSRingRealPa >> 32),
- &pRxDma->psr_base_hi);
- writel((uint32_t) pRxLocal->pPSRingRealPa, &pRxDma->psr_base_lo);
- writel(pRxLocal->PsrNumEntries - 1, &pRxDma->psr_num_des.value);
- writel(0, &pRxDma->psr_full_offset.value);
+ writel((u32) ((u64)rx_local->pPSRingPa >> 32),
+ &rx_dma->psr_base_hi);
+ writel((u32) rx_local->pPSRingPa, &rx_dma->psr_base_lo);
+ writel(rx_local->PsrNumEntries - 1, &rx_dma->psr_num_des);
+ writel(0, &rx_dma->psr_full_offset);
- psr_num_des.value = readl(&pRxDma->psr_num_des.value);
- writel((psr_num_des.bits.psr_ndes * LO_MARK_PERCENT_FOR_PSR) / 100,
- &pRxDma->psr_min_des.value);
+ psr_num_des = readl(&rx_dma->psr_num_des) & 0xFFF;
+ writel((psr_num_des * LO_MARK_PERCENT_FOR_PSR) / 100,
+ &rx_dma->psr_min_des);
- spin_lock_irqsave(&pAdapter->RcvLock, lockflags);
+ spin_lock_irqsave(&etdev->RcvLock, flags);
/* These local variables track the PSR in the adapter structure */
- pRxLocal->local_psr_full.bits.psr_full = 0;
- pRxLocal->local_psr_full.bits.psr_full_wrap = 0;
+ rx_local->local_psr_full = 0;
/* Now's the best time to initialize FBR1 contents */
- pFbrEntry = (PFBR_DESC_t) pRxLocal->pFbr1RingVa;
- for (iEntry = 0; iEntry < pRxLocal->Fbr1NumEntries; iEntry++) {
- pFbrEntry->addr_hi = pRxLocal->Fbr[1]->PAHigh[iEntry];
- pFbrEntry->addr_lo = pRxLocal->Fbr[1]->PALow[iEntry];
- pFbrEntry->word2.bits.bi = iEntry;
- pFbrEntry++;
+ fbr_entry = (struct fbr_desc *) rx_local->pFbr1RingVa;
+ for (entry = 0; entry < rx_local->Fbr1NumEntries; entry++) {
+ fbr_entry->addr_hi = rx_local->fbr[1]->bus_high[entry];
+ fbr_entry->addr_lo = rx_local->fbr[1]->bus_low[entry];
+ fbr_entry->word2 = entry;
+ fbr_entry++;
}
/* Set the address and parameters of Free buffer ring 1 (and 0 if
* required) into the 1310's registers
*/
- writel((uint32_t) (pRxLocal->Fbr1Realpa >> 32), &pRxDma->fbr1_base_hi);
- writel((uint32_t) pRxLocal->Fbr1Realpa, &pRxDma->fbr1_base_lo);
- writel(pRxLocal->Fbr1NumEntries - 1, &pRxDma->fbr1_num_des.value);
-
- {
- DMA10W_t fbr1_full = { 0 };
-
- fbr1_full.bits.val = 0;
- fbr1_full.bits.wrap = 1;
- writel(fbr1_full.value, &pRxDma->fbr1_full_offset.value);
- }
+ writel((u32) (rx_local->Fbr1Realpa >> 32), &rx_dma->fbr1_base_hi);
+ writel((u32) rx_local->Fbr1Realpa, &rx_dma->fbr1_base_lo);
+ writel(rx_local->Fbr1NumEntries - 1, &rx_dma->fbr1_num_des);
+ writel(ET_DMA10_WRAP, &rx_dma->fbr1_full_offset);
/* This variable tracks the free buffer ring 1 full position, so it
* has to match the above.
*/
- pRxLocal->local_Fbr1_full.bits.val = 0;
- pRxLocal->local_Fbr1_full.bits.wrap = 1;
- writel(((pRxLocal->Fbr1NumEntries * LO_MARK_PERCENT_FOR_RX) / 100) - 1,
- &pRxDma->fbr1_min_des.value);
+ rx_local->local_Fbr1_full = ET_DMA10_WRAP;
+ writel(((rx_local->Fbr1NumEntries * LO_MARK_PERCENT_FOR_RX) / 100) - 1,
+ &rx_dma->fbr1_min_des);
#ifdef USE_FBR0
/* Now's the best time to initialize FBR0 contents */
- pFbrEntry = (PFBR_DESC_t) pRxLocal->pFbr0RingVa;
- for (iEntry = 0; iEntry < pRxLocal->Fbr0NumEntries; iEntry++) {
- pFbrEntry->addr_hi = pRxLocal->Fbr[0]->PAHigh[iEntry];
- pFbrEntry->addr_lo = pRxLocal->Fbr[0]->PALow[iEntry];
- pFbrEntry->word2.bits.bi = iEntry;
- pFbrEntry++;
+ fbr_entry = (struct fbr_desc *) rx_local->pFbr0RingVa;
+ for (entry = 0; entry < rx_local->Fbr0NumEntries; entry++) {
+ fbr_entry->addr_hi = rx_local->fbr[0]->bus_high[entry];
+ fbr_entry->addr_lo = rx_local->fbr[0]->bus_low[entry];
+ fbr_entry->word2 = entry;
+ fbr_entry++;
}
- writel((uint32_t) (pRxLocal->Fbr0Realpa >> 32), &pRxDma->fbr0_base_hi);
- writel((uint32_t) pRxLocal->Fbr0Realpa, &pRxDma->fbr0_base_lo);
- writel(pRxLocal->Fbr0NumEntries - 1, &pRxDma->fbr0_num_des.value);
-
- {
- DMA10W_t fbr0_full = { 0 };
-
- fbr0_full.bits.val = 0;
- fbr0_full.bits.wrap = 1;
- writel(fbr0_full.value, &pRxDma->fbr0_full_offset.value);
- }
+ writel((u32) (rx_local->Fbr0Realpa >> 32), &rx_dma->fbr0_base_hi);
+ writel((u32) rx_local->Fbr0Realpa, &rx_dma->fbr0_base_lo);
+ writel(rx_local->Fbr0NumEntries - 1, &rx_dma->fbr0_num_des);
+ writel(ET_DMA10_WRAP, &rx_dma->fbr0_full_offset);
/* This variable tracks the free buffer ring 0 full position, so it
* has to match the above.
*/
- pRxLocal->local_Fbr0_full.bits.val = 0;
- pRxLocal->local_Fbr0_full.bits.wrap = 1;
- writel(((pRxLocal->Fbr0NumEntries * LO_MARK_PERCENT_FOR_RX) / 100) - 1,
- &pRxDma->fbr0_min_des.value);
+ rx_local->local_Fbr0_full = ET_DMA10_WRAP;
+ writel(((rx_local->Fbr0NumEntries * LO_MARK_PERCENT_FOR_RX) / 100) - 1,
+ &rx_dma->fbr0_min_des);
#endif
/* Program the number of packets we will receive before generating an
* For version B silicon, this value gets updated once autoneg is
*complete.
*/
- writel(pAdapter->RegistryRxNumBuffers, &pRxDma->num_pkt_done.value);
+ writel(PARM_RX_NUM_BUFS_DEF, &rx_dma->num_pkt_done);
/* The "time_done" is not working correctly to coalesce interrupts
* after a given time period, but rather is giving us an interrupt
* regardless of whether we have received packets.
* This value gets updated once autoneg is complete.
*/
- writel(pAdapter->RegistryRxTimeInterval, &pRxDma->max_pkt_time.value);
-
- spin_unlock_irqrestore(&pAdapter->RcvLock, lockflags);
+ writel(PARM_RX_TIME_INT_DEF, &rx_dma->max_pkt_time);
- DBG_LEAVE(et131x_dbginfo);
+ spin_unlock_irqrestore(&etdev->RcvLock, flags);
}
/**
* SetRxDmaTimer - Set the heartbeat timer according to line rate.
- * @pAdapter: pointer to our adapter structure
+ * @etdev: pointer to our adapter structure
*/
-void SetRxDmaTimer(struct et131x_adapter *pAdapter)
+void SetRxDmaTimer(struct et131x_adapter *etdev)
{
/* For version B silicon, we do not use the RxDMA timer for 10 and 100
* Mbits/s line rates. We do not enable and RxDMA interrupt coalescing.
*/
- if ((pAdapter->uiLinkSpeed == TRUEPHY_SPEED_100MBPS) ||
- (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_10MBPS)) {
- writel(0, &pAdapter->CSRAddress->rxdma.max_pkt_time.value);
- writel(1, &pAdapter->CSRAddress->rxdma.num_pkt_done.value);
+ if ((etdev->linkspeed == TRUEPHY_SPEED_100MBPS) ||
+ (etdev->linkspeed == TRUEPHY_SPEED_10MBPS)) {
+ writel(0, &etdev->regs->rxdma.max_pkt_time);
+ writel(1, &etdev->regs->rxdma.num_pkt_done);
}
}
/**
* et131x_rx_dma_disable - Stop of Rx_DMA on the ET1310
- * @pAdapter: pointer to our adapter structure
+ * @etdev: pointer to our adapter structure
*/
-void et131x_rx_dma_disable(struct et131x_adapter *pAdapter)
+void et131x_rx_dma_disable(struct et131x_adapter *etdev)
{
- RXDMA_CSR_t csr;
-
- DBG_ENTER(et131x_dbginfo);
-
+ u32 csr;
/* Setup the receive dma configuration register */
- writel(0x00002001, &pAdapter->CSRAddress->rxdma.csr.value);
- csr.value = readl(&pAdapter->CSRAddress->rxdma.csr.value);
- if (csr.bits.halt_status != 1) {
+ writel(0x00002001, &etdev->regs->rxdma.csr);
+ csr = readl(&etdev->regs->rxdma.csr);
+ if ((csr & 0x00020000) != 1) { /* Check halt status (bit 17) */
udelay(5);
- csr.value = readl(&pAdapter->CSRAddress->rxdma.csr.value);
- if (csr.bits.halt_status != 1) {
- DBG_ERROR(et131x_dbginfo,
- "RX Dma failed to enter halt state. CSR 0x%08x\n",
- csr.value);
- }
+ csr = readl(&etdev->regs->rxdma.csr);
+ if ((csr & 0x00020000) != 1)
+ dev_err(&etdev->pdev->dev,
+ "RX Dma failed to enter halt state. CSR 0x%08x\n",
+ csr);
}
-
- DBG_LEAVE(et131x_dbginfo);
}
/**
* et131x_rx_dma_enable - re-start of Rx_DMA on the ET1310.
- * @pAdapter: pointer to our adapter structure
+ * @etdev: pointer to our adapter structure
*/
-void et131x_rx_dma_enable(struct et131x_adapter *pAdapter)
+void et131x_rx_dma_enable(struct et131x_adapter *etdev)
{
- DBG_RX_ENTER(et131x_dbginfo);
-
- if (pAdapter->RegistryPhyLoopbk) {
- /* RxDMA is disabled for loopback operation. */
- writel(0x1, &pAdapter->CSRAddress->rxdma.csr.value);
- } else {
/* Setup the receive dma configuration register for normal operation */
- RXDMA_CSR_t csr = { 0 };
-
- csr.bits.fbr1_enable = 1;
- if (pAdapter->RxRing.Fbr1BufferSize == 4096) {
- csr.bits.fbr1_size = 1;
- } else if (pAdapter->RxRing.Fbr1BufferSize == 8192) {
- csr.bits.fbr1_size = 2;
- } else if (pAdapter->RxRing.Fbr1BufferSize == 16384) {
- csr.bits.fbr1_size = 3;
- }
+ u32 csr = 0x2000; /* FBR1 enable */
+
+ if (etdev->rx_ring.Fbr1BufferSize == 4096)
+ csr |= 0x0800;
+ else if (etdev->rx_ring.Fbr1BufferSize == 8192)
+ csr |= 0x1000;
+ else if (etdev->rx_ring.Fbr1BufferSize == 16384)
+ csr |= 0x1800;
#ifdef USE_FBR0
- csr.bits.fbr0_enable = 1;
- if (pAdapter->RxRing.Fbr0BufferSize == 256) {
- csr.bits.fbr0_size = 1;
- } else if (pAdapter->RxRing.Fbr0BufferSize == 512) {
- csr.bits.fbr0_size = 2;
- } else if (pAdapter->RxRing.Fbr0BufferSize == 1024) {
- csr.bits.fbr0_size = 3;
- }
+ csr |= 0x0400; /* FBR0 enable */
+ if (etdev->rx_ring.Fbr0BufferSize == 256)
+ csr |= 0x0100;
+ else if (etdev->rx_ring.Fbr0BufferSize == 512)
+ csr |= 0x0200;
+ else if (etdev->rx_ring.Fbr0BufferSize == 1024)
+ csr |= 0x0300;
#endif
- writel(csr.value, &pAdapter->CSRAddress->rxdma.csr.value);
-
- csr.value = readl(&pAdapter->CSRAddress->rxdma.csr.value);
- if (csr.bits.halt_status != 0) {
- udelay(5);
- csr.value = readl(&pAdapter->CSRAddress->rxdma.csr.value);
- if (csr.bits.halt_status != 0) {
- DBG_ERROR(et131x_dbginfo,
- "RX Dma failed to exit halt state. CSR 0x%08x\n",
- csr.value);
- }
+ writel(csr, &etdev->regs->rxdma.csr);
+
+ csr = readl(&etdev->regs->rxdma.csr);
+ if ((csr & 0x00020000) != 0) {
+ udelay(5);
+ csr = readl(&etdev->regs->rxdma.csr);
+ if ((csr & 0x00020000) != 0) {
+ dev_err(&etdev->pdev->dev,
+ "RX Dma failed to exit halt state. CSR 0x%08x\n",
+ csr);
}
}
-
- DBG_RX_LEAVE(et131x_dbginfo);
}
/**
* nic_rx_pkts - Checks the hardware for available packets
- * @pAdapter: pointer to our adapter
+ * @etdev: pointer to our adapter
*
- * Returns pMpRfd, a pointer to our MPRFD.
+ * Returns rfd, a pointer to our MPRFD.
*
* Checks the hardware for available packets, using completion ring
* If packets are available, it gets an RFD from the RecvList, attaches
* the packet to it, puts the RFD in the RecvPendList, and also returns
* the pointer to the RFD.
*/
-PMP_RFD nic_rx_pkts(struct et131x_adapter *pAdapter)
+PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev)
{
- struct _rx_ring_t *pRxLocal = &pAdapter->RxRing;
- PRX_STATUS_BLOCK_t pRxStatusBlock;
- PPKT_STAT_DESC_t pPSREntry;
- PMP_RFD pMpRfd;
- uint32_t nIndex;
- uint8_t *pBufVa;
- unsigned long lockflags;
+ struct rx_ring *rx_local = &etdev->rx_ring;
+ struct rx_status_block *status;
+ struct pkt_stat_desc *psr;
+ PMP_RFD rfd;
+ u32 i;
+ u8 *buf;
+ unsigned long flags;
struct list_head *element;
- uint8_t ringIndex;
- uint16_t bufferIndex;
- uint32_t localLen;
- PKT_STAT_DESC_WORD0_t Word0;
-
-
- DBG_RX_ENTER(et131x_dbginfo);
+ u8 rindex;
+ u16 bindex;
+ u32 len;
+ u32 word0;
+ u32 word1;
/* RX Status block is written by the DMA engine prior to every
* interrupt. It contains the next to be used entry in the Packet
* Status Ring, and also the two Free Buffer rings.
*/
- pRxStatusBlock = (PRX_STATUS_BLOCK_t) pRxLocal->pRxStatusVa;
+ status = rx_local->rx_status_block;
+ word1 = status->Word1 >> 16; /* Get the useful bits */
- if (pRxStatusBlock->Word1.bits.PSRoffset ==
- pRxLocal->local_psr_full.bits.psr_full &&
- pRxStatusBlock->Word1.bits.PSRwrap ==
- pRxLocal->local_psr_full.bits.psr_full_wrap) {
+ /* Check the PSR and wrap bits do not match */
+ if ((word1 & 0x1FFF) == (rx_local->local_psr_full & 0x1FFF))
/* Looks like this ring is not updated yet */
- DBG_RX(et131x_dbginfo, "(0)\n");
- DBG_RX_LEAVE(et131x_dbginfo);
return NULL;
- }
/* The packet status ring indicates that data is available. */
- pPSREntry = (PPKT_STAT_DESC_t) (pRxLocal->pPSRingVa) +
- pRxLocal->local_psr_full.bits.psr_full;
+ psr = (struct pkt_stat_desc *) (rx_local->pPSRingVa) +
+ (rx_local->local_psr_full & 0xFFF);
/* Grab any information that is required once the PSR is
* advanced, since we can no longer rely on the memory being
* accurate
*/
- localLen = pPSREntry->word1.bits.length;
- ringIndex = (uint8_t) pPSREntry->word1.bits.ri;
- bufferIndex = (uint16_t) pPSREntry->word1.bits.bi;
- Word0 = pPSREntry->word0;
-
- DBG_RX(et131x_dbginfo, "RX PACKET STATUS\n");
- DBG_RX(et131x_dbginfo, "\tlength : %d\n", localLen);
- DBG_RX(et131x_dbginfo, "\tringIndex : %d\n", ringIndex);
- DBG_RX(et131x_dbginfo, "\tbufferIndex : %d\n", bufferIndex);
- DBG_RX(et131x_dbginfo, "\tword0 : 0x%08x\n", Word0.value);
-
-#if 0
- /* Check the Status Word that the MAC has appended to the PSR
- * entry in case the MAC has detected errors.
- */
- if (Word0.value & ALCATEL_BAD_STATUS) {
- DBG_ERROR(et131x_dbginfo,
- "NICRxPkts >> Alcatel Status Word error."
- "Value 0x%08x\n", pPSREntry->word0.value);
- }
-#endif
+ len = psr->word1 & 0xFFFF;
+ rindex = (psr->word1 >> 26) & 0x03;
+ bindex = (psr->word1 >> 16) & 0x3FF;
+ word0 = psr->word0;
/* Indicate that we have used this PSR entry. */
- if (++pRxLocal->local_psr_full.bits.psr_full >
- pRxLocal->PsrNumEntries - 1) {
- pRxLocal->local_psr_full.bits.psr_full = 0;
- pRxLocal->local_psr_full.bits.psr_full_wrap ^= 1;
+ /* FIXME wrap 12 */
+ add_12bit(&rx_local->local_psr_full, 1);
+ if ((rx_local->local_psr_full & 0xFFF) > rx_local->PsrNumEntries - 1) {
+ /* Clear psr full and toggle the wrap bit */
+ rx_local->local_psr_full &= ~0xFFF;
+ rx_local->local_psr_full ^= 0x1000;
}
- writel(pRxLocal->local_psr_full.value,
- &pAdapter->CSRAddress->rxdma.psr_full_offset.value);
+ writel(rx_local->local_psr_full,
+ &etdev->regs->rxdma.psr_full_offset);
#ifndef USE_FBR0
- if (ringIndex != 1) {
- DBG_ERROR(et131x_dbginfo,
- "NICRxPkts PSR Entry %d indicates "
- "Buffer Ring 0 in use\n",
- pRxLocal->local_psr_full.bits.psr_full);
- DBG_RX_LEAVE(et131x_dbginfo);
+ if (rindex != 1)
return NULL;
- }
#endif
#ifdef USE_FBR0
- if (ringIndex > 1 ||
- (ringIndex == 0 &&
- bufferIndex > pRxLocal->Fbr0NumEntries - 1) ||
- (ringIndex == 1 &&
- bufferIndex > pRxLocal->Fbr1NumEntries - 1))
+ if (rindex > 1 ||
+ (rindex == 0 &&
+ bindex > rx_local->Fbr0NumEntries - 1) ||
+ (rindex == 1 &&
+ bindex > rx_local->Fbr1NumEntries - 1))
#else
- if (ringIndex != 1 ||
- bufferIndex > pRxLocal->Fbr1NumEntries - 1)
+ if (rindex != 1 || bindex > rx_local->Fbr1NumEntries - 1)
#endif
{
/* Illegal buffer or ring index cannot be used by S/W*/
- DBG_ERROR(et131x_dbginfo,
+ dev_err(&etdev->pdev->dev,
"NICRxPkts PSR Entry %d indicates "
"length of %d and/or bad bi(%d)\n",
- pRxLocal->local_psr_full.bits.psr_full,
- localLen, bufferIndex);
- DBG_RX_LEAVE(et131x_dbginfo);
+ rx_local->local_psr_full & 0xFFF,
+ len, bindex);
return NULL;
}
/* Get and fill the RFD. */
- spin_lock_irqsave(&pAdapter->RcvLock, lockflags);
+ spin_lock_irqsave(&etdev->RcvLock, flags);
- pMpRfd = NULL;
- element = pRxLocal->RecvList.next;
- pMpRfd = (PMP_RFD) list_entry(element, MP_RFD, list_node);
+ rfd = NULL;
+ element = rx_local->RecvList.next;
+ rfd = (PMP_RFD) list_entry(element, MP_RFD, list_node);
- if (pMpRfd == NULL) {
- DBG_RX(et131x_dbginfo,
- "NULL RFD returned from RecvList via list_entry()\n");
- DBG_RX_LEAVE(et131x_dbginfo);
- spin_unlock_irqrestore(&pAdapter->RcvLock, lockflags);
+ if (rfd == NULL) {
+ spin_unlock_irqrestore(&etdev->RcvLock, flags);
return NULL;
}
- list_del(&pMpRfd->list_node);
- pRxLocal->nReadyRecv--;
+ list_del(&rfd->list_node);
+ rx_local->nReadyRecv--;
- spin_unlock_irqrestore(&pAdapter->RcvLock, lockflags);
+ spin_unlock_irqrestore(&etdev->RcvLock, flags);
- pMpRfd->iBufferIndex = bufferIndex;
- pMpRfd->iRingIndex = ringIndex;
+ rfd->bufferindex = bindex;
+ rfd->ringindex = rindex;
/* In V1 silicon, there is a bug which screws up filtering of
* runt packets. Therefore runt packet filtering is disabled
* in the MAC and the packets are dropped here. They are
* also counted here.
*/
- if (localLen < (NIC_MIN_PACKET_SIZE + 4)) {
- pAdapter->Stats.other_errors++;
- localLen = 0;
+ if (len < (NIC_MIN_PACKET_SIZE + 4)) {
+ etdev->Stats.other_errors++;
+ len = 0;
}
- if (localLen) {
- if (pAdapter->ReplicaPhyLoopbk == 1) {
- pBufVa = pRxLocal->Fbr[ringIndex]->Va[bufferIndex];
+ if (len) {
+ if (etdev->ReplicaPhyLoopbk == 1) {
+ buf = rx_local->fbr[rindex]->virt[bindex];
- if (memcmp(&pBufVa[6], &pAdapter->CurrentAddress[0],
+ if (memcmp(&buf[6], &etdev->CurrentAddress[0],
ETH_ALEN) == 0) {
- if (memcmp(&pBufVa[42], "Replica packet",
+ if (memcmp(&buf[42], "Replica packet",
ETH_HLEN)) {
- pAdapter->ReplicaPhyLoopbkPF = 1;
+ etdev->ReplicaPhyLoopbkPF = 1;
}
}
- DBG_WARNING(et131x_dbginfo,
- "pBufVa:\t%02x:%02x:%02x:%02x:%02x:%02x\n",
- pBufVa[6], pBufVa[7], pBufVa[8],
- pBufVa[9], pBufVa[10], pBufVa[11]);
-
- DBG_WARNING(et131x_dbginfo,
- "CurrentAddr:\t%02x:%02x:%02x:%02x:%02x:%02x\n",
- pAdapter->CurrentAddress[0],
- pAdapter->CurrentAddress[1],
- pAdapter->CurrentAddress[2],
- pAdapter->CurrentAddress[3],
- pAdapter->CurrentAddress[4],
- pAdapter->CurrentAddress[5]);
}
/* Determine if this is a multicast packet coming in */
- if ((Word0.value & ALCATEL_MULTICAST_PKT) &&
- !(Word0.value & ALCATEL_BROADCAST_PKT)) {
+ if ((word0 & ALCATEL_MULTICAST_PKT) &&
+ !(word0 & ALCATEL_BROADCAST_PKT)) {
/* Promiscuous mode and Multicast mode are
* not mutually exclusive as was first
* thought. I guess Promiscuous is just
* filters. Generally filter is 0x2b when in
* promiscuous mode.
*/
- if ((pAdapter->PacketFilter & ET131X_PACKET_TYPE_MULTICAST)
- && !(pAdapter->PacketFilter & ET131X_PACKET_TYPE_PROMISCUOUS)
- && !(pAdapter->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST)) {
- pBufVa = pRxLocal->Fbr[ringIndex]->
- Va[bufferIndex];
+ if ((etdev->PacketFilter & ET131X_PACKET_TYPE_MULTICAST)
+ && !(etdev->PacketFilter & ET131X_PACKET_TYPE_PROMISCUOUS)
+ && !(etdev->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST)) {
+ buf = rx_local->fbr[rindex]->
+ virt[bindex];
/* Loop through our list to see if the
* destination address of this packet
* matches one in our list.
*/
- for (nIndex = 0;
- nIndex < pAdapter->MCAddressCount;
- nIndex++) {
- if (pBufVa[0] ==
- pAdapter->MCList[nIndex][0]
- && pBufVa[1] ==
- pAdapter->MCList[nIndex][1]
- && pBufVa[2] ==
- pAdapter->MCList[nIndex][2]
- && pBufVa[3] ==
- pAdapter->MCList[nIndex][3]
- && pBufVa[4] ==
- pAdapter->MCList[nIndex][4]
- && pBufVa[5] ==
- pAdapter->MCList[nIndex][5]) {
+ for (i = 0;
+ i < etdev->MCAddressCount;
+ i++) {
+ if (buf[0] ==
+ etdev->MCList[i][0]
+ && buf[1] ==
+ etdev->MCList[i][1]
+ && buf[2] ==
+ etdev->MCList[i][2]
+ && buf[3] ==
+ etdev->MCList[i][3]
+ && buf[4] ==
+ etdev->MCList[i][4]
+ && buf[5] ==
+ etdev->MCList[i][5]) {
break;
}
}
* so we free our RFD when we return
* from this function.
*/
- if (nIndex == pAdapter->MCAddressCount) {
- localLen = 0;
- }
+ if (i == etdev->MCAddressCount)
+ len = 0;
}
- if (localLen > 0) {
- pAdapter->Stats.multircv++;
- }
- } else if (Word0.value & ALCATEL_BROADCAST_PKT) {
- pAdapter->Stats.brdcstrcv++;
- } else {
+ if (len > 0)
+ etdev->Stats.multircv++;
+ } else if (word0 & ALCATEL_BROADCAST_PKT)
+ etdev->Stats.brdcstrcv++;
+ else
/* Not sure what this counter measures in
* promiscuous mode. Perhaps we should check
* the MAC address to see if it is directed
* to us in promiscuous mode.
*/
- pAdapter->Stats.unircv++;
- }
+ etdev->Stats.unircv++;
}
- if (localLen > 0) {
+ if (len > 0) {
struct sk_buff *skb = NULL;
- //pMpRfd->PacketSize = localLen - 4;
- pMpRfd->PacketSize = localLen;
+ /* rfd->PacketSize = len - 4; */
+ rfd->PacketSize = len;
- skb = dev_alloc_skb(pMpRfd->PacketSize + 2);
+ skb = dev_alloc_skb(rfd->PacketSize + 2);
if (!skb) {
- DBG_ERROR(et131x_dbginfo,
+ dev_err(&etdev->pdev->dev,
"Couldn't alloc an SKB for Rx\n");
- DBG_RX_LEAVE(et131x_dbginfo);
return NULL;
}
- pAdapter->net_stats.rx_bytes += pMpRfd->PacketSize;
+ etdev->net_stats.rx_bytes += rfd->PacketSize;
- memcpy(skb_put(skb, pMpRfd->PacketSize),
- pRxLocal->Fbr[ringIndex]->Va[bufferIndex],
- pMpRfd->PacketSize);
+ memcpy(skb_put(skb, rfd->PacketSize),
+ rx_local->fbr[rindex]->virt[bindex],
+ rfd->PacketSize);
- skb->dev = pAdapter->netdev;
- skb->protocol = eth_type_trans(skb, pAdapter->netdev);
+ skb->dev = etdev->netdev;
+ skb->protocol = eth_type_trans(skb, etdev->netdev);
skb->ip_summed = CHECKSUM_NONE;
netif_rx(skb);
} else {
- pMpRfd->PacketSize = 0;
+ rfd->PacketSize = 0;
}
- nic_return_rfd(pAdapter, pMpRfd);
-
- DBG_RX(et131x_dbginfo, "(1)\n");
- DBG_RX_LEAVE(et131x_dbginfo);
- return pMpRfd;
+ nic_return_rfd(etdev, rfd);
+ return rfd;
}
/**
* et131x_reset_recv - Reset the receive list
- * @pAdapter: pointer to our adapter
+ * @etdev: pointer to our adapter
*
* Assumption, Rcv spinlock has been acquired.
*/
-void et131x_reset_recv(struct et131x_adapter *pAdapter)
+void et131x_reset_recv(struct et131x_adapter *etdev)
{
- PMP_RFD pMpRfd;
- struct list_head *element;
-
- DBG_ENTER(et131x_dbginfo);
-
- DBG_ASSERT(!list_empty(&pAdapter->RxRing.RecvList));
-
- /* Take all the RFD's from the pending list, and stick them on the
- * RecvList.
- */
- while (!list_empty(&pAdapter->RxRing.RecvPendingList)) {
- element = pAdapter->RxRing.RecvPendingList.next;
-
- pMpRfd = (PMP_RFD) list_entry(element, MP_RFD, list_node);
-
- list_del(&pMpRfd->list_node);
- list_add_tail(&pMpRfd->list_node, &pAdapter->RxRing.RecvList);
- }
+ WARN_ON(list_empty(&etdev->rx_ring.RecvList));
- DBG_LEAVE(et131x_dbginfo);
}
/**
* et131x_handle_recv_interrupt - Interrupt handler for receive processing
- * @pAdapter: pointer to our adapter
+ * @etdev: pointer to our adapter
*
* Assumption, Rcv spinlock has been acquired.
*/
-void et131x_handle_recv_interrupt(struct et131x_adapter *pAdapter)
+void et131x_handle_recv_interrupt(struct et131x_adapter *etdev)
{
- PMP_RFD pMpRfd = NULL;
- struct sk_buff *PacketArray[NUM_PACKETS_HANDLED];
- PMP_RFD RFDFreeArray[NUM_PACKETS_HANDLED];
- uint32_t PacketArrayCount = 0;
- uint32_t PacketsToHandle;
- uint32_t PacketFreeCount = 0;
- bool TempUnfinishedRec = false;
-
- DBG_RX_ENTER(et131x_dbginfo);
-
- PacketsToHandle = NUM_PACKETS_HANDLED;
+ PMP_RFD rfd = NULL;
+ u32 count = 0;
+ bool done = true;
/* Process up to available RFD's */
- while (PacketArrayCount < PacketsToHandle) {
- if (list_empty(&pAdapter->RxRing.RecvList)) {
- DBG_ASSERT(pAdapter->RxRing.nReadyRecv == 0);
- DBG_ERROR(et131x_dbginfo, "NO RFD's !!!!!!!!!!!!!\n");
- TempUnfinishedRec = true;
+ while (count < NUM_PACKETS_HANDLED) {
+ if (list_empty(&etdev->rx_ring.RecvList)) {
+ WARN_ON(etdev->rx_ring.nReadyRecv != 0);
+ done = false;
break;
}
- pMpRfd = nic_rx_pkts(pAdapter);
+ rfd = nic_rx_pkts(etdev);
- if (pMpRfd == NULL) {
+ if (rfd == NULL)
break;
- }
/* Do not receive any packets until a filter has been set.
- * Do not receive any packets until we are at D0.
* Do not receive any packets until we have link.
* If length is zero, return the RFD in order to advance the
* Free buffer ring.
*/
- if ((!pAdapter->PacketFilter) ||
- (pAdapter->PoMgmt.PowerState != NdisDeviceStateD0) ||
- (!MP_LINK_DETECTED(pAdapter)) ||
- (pMpRfd->PacketSize == 0)) {
+ if (!etdev->PacketFilter ||
+ !(etdev->Flags & fMP_ADAPTER_LINK_DETECTION) ||
+ rfd->PacketSize == 0) {
continue;
}
/* Increment the number of packets we received */
- pAdapter->Stats.ipackets++;
+ etdev->Stats.ipackets++;
/* Set the status on the packet, either resources or success */
- if (pAdapter->RxRing.nReadyRecv >= RFD_LOW_WATER_MARK) {
- /* Put this RFD on the pending list
- *
- * NOTE: nic_rx_pkts() above is already returning the
- * RFD to the RecvList, so don't additionally do that
- * here.
- * Besides, we don't really need (at this point) the
- * pending list anyway.
- */
- //spin_lock_irqsave( &pAdapter->RcvPendLock, lockflags );
- //list_add_tail( &pMpRfd->list_node, &pAdapter->RxRing.RecvPendingList );
- //spin_unlock_irqrestore( &pAdapter->RcvPendLock, lockflags );
-
- /* Update the number of outstanding Recvs */
- //MP_INC_RCV_REF( pAdapter );
- } else {
- RFDFreeArray[PacketFreeCount] = pMpRfd;
- PacketFreeCount++;
-
- DBG_WARNING(et131x_dbginfo,
- "RFD's are running out !!!!!!!!!!!!!\n");
+ if (etdev->rx_ring.nReadyRecv < RFD_LOW_WATER_MARK) {
+ dev_warn(&etdev->pdev->dev,
+ "RFD's are running out\n");
}
-
- PacketArray[PacketArrayCount] = pMpRfd->Packet;
- PacketArrayCount++;
+ count++;
}
- if ((PacketArrayCount == NUM_PACKETS_HANDLED) || TempUnfinishedRec) {
- pAdapter->RxRing.UnfinishedReceives = true;
- writel(pAdapter->RegistryTxTimeInterval * NANO_IN_A_MICRO,
- &pAdapter->CSRAddress->global.watchdog_timer);
- } else {
+ if (count == NUM_PACKETS_HANDLED || !done) {
+ etdev->rx_ring.UnfinishedReceives = true;
+ writel(PARM_TX_TIME_INT_DEF * NANO_IN_A_MICRO,
+ &etdev->regs->global.watchdog_timer);
+ } else
/* Watchdog timer will disable itself if appropriate. */
- pAdapter->RxRing.UnfinishedReceives = false;
- }
+ etdev->rx_ring.UnfinishedReceives = false;
+}
- DBG_RX_LEAVE(et131x_dbginfo);
+static inline u32 bump_fbr(u32 *fbr, u32 limit)
+{
+ u32 v = *fbr;
+ v++;
+ /* This works for all cases where limit < 1024. The 1023 case
+ works because 1023++ is 1024 which means the if condition is not
+ taken but the carry of the bit into the wrap bit toggles the wrap
+ value correctly */
+ if ((v & ET_DMA10_MASK) > limit) {
+ v &= ~ET_DMA10_MASK;
+ v ^= ET_DMA10_WRAP;
+ }
+ /* For the 1023 case */
+ v &= (ET_DMA10_MASK|ET_DMA10_WRAP);
+ *fbr = v;
+ return v;
}
/**
* NICReturnRFD - Recycle a RFD and put it back onto the receive list
- * @pAdapter: pointer to our adapter
- * @pMpRfd: pointer to the RFD
+ * @etdev: pointer to our adapter
+ * @rfd: pointer to the RFD
*/
-void nic_return_rfd(struct et131x_adapter *pAdapter, PMP_RFD pMpRfd)
+void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD rfd)
{
- struct _rx_ring_t *pRxLocal = &pAdapter->RxRing;
- struct _RXDMA_t __iomem *pRxDma = &pAdapter->CSRAddress->rxdma;
- uint16_t bi = pMpRfd->iBufferIndex;
- uint8_t ri = pMpRfd->iRingIndex;
- unsigned long lockflags;
-
- DBG_RX_ENTER(et131x_dbginfo);
+ struct rx_ring *rx_local = &etdev->rx_ring;
+ struct rxdma_regs __iomem *rx_dma = &etdev->regs->rxdma;
+ u16 bi = rfd->bufferindex;
+ u8 ri = rfd->ringindex;
+ unsigned long flags;
/* We don't use any of the OOB data besides status. Otherwise, we
* need to clean up OOB data
*/
if (
#ifdef USE_FBR0
- (ri == 0 && bi < pRxLocal->Fbr0NumEntries) ||
+ (ri == 0 && bi < rx_local->Fbr0NumEntries) ||
#endif
- (ri == 1 && bi < pRxLocal->Fbr1NumEntries)) {
- spin_lock_irqsave(&pAdapter->FbrLock, lockflags);
+ (ri == 1 && bi < rx_local->Fbr1NumEntries)) {
+ spin_lock_irqsave(&etdev->FbrLock, flags);
if (ri == 1) {
- PFBR_DESC_t pNextDesc =
- (PFBR_DESC_t) (pRxLocal->pFbr1RingVa) +
- pRxLocal->local_Fbr1_full.bits.val;
+ struct fbr_desc *next =
+ (struct fbr_desc *) (rx_local->pFbr1RingVa) +
+ INDEX10(rx_local->local_Fbr1_full);
/* Handle the Free Buffer Ring advancement here. Write
* the PA / Buffer Index for the returned buffer into
* the oldest (next to be freed)FBR entry
*/
- pNextDesc->addr_hi = pRxLocal->Fbr[1]->PAHigh[bi];
- pNextDesc->addr_lo = pRxLocal->Fbr[1]->PALow[bi];
- pNextDesc->word2.value = bi;
-
- if (++pRxLocal->local_Fbr1_full.bits.val >
- (pRxLocal->Fbr1NumEntries - 1)) {
- pRxLocal->local_Fbr1_full.bits.val = 0;
- pRxLocal->local_Fbr1_full.bits.wrap ^= 1;
- }
+ next->addr_hi = rx_local->fbr[1]->bus_high[bi];
+ next->addr_lo = rx_local->fbr[1]->bus_low[bi];
+ next->word2 = bi;
- writel(pRxLocal->local_Fbr1_full.value,
- &pRxDma->fbr1_full_offset.value);
+ writel(bump_fbr(&rx_local->local_Fbr1_full,
+ rx_local->Fbr1NumEntries - 1),
+ &rx_dma->fbr1_full_offset);
}
#ifdef USE_FBR0
else {
- PFBR_DESC_t pNextDesc =
- (PFBR_DESC_t) pRxLocal->pFbr0RingVa +
- pRxLocal->local_Fbr0_full.bits.val;
+ struct fbr_desc *next = (struct fbr_desc *)
+ rx_local->pFbr0RingVa +
+ INDEX10(rx_local->local_Fbr0_full);
/* Handle the Free Buffer Ring advancement here. Write
* the PA / Buffer Index for the returned buffer into
* the oldest (next to be freed) FBR entry
*/
- pNextDesc->addr_hi = pRxLocal->Fbr[0]->PAHigh[bi];
- pNextDesc->addr_lo = pRxLocal->Fbr[0]->PALow[bi];
- pNextDesc->word2.value = bi;
-
- if (++pRxLocal->local_Fbr0_full.bits.val >
- (pRxLocal->Fbr0NumEntries - 1)) {
- pRxLocal->local_Fbr0_full.bits.val = 0;
- pRxLocal->local_Fbr0_full.bits.wrap ^= 1;
- }
+ next->addr_hi = rx_local->fbr[0]->bus_high[bi];
+ next->addr_lo = rx_local->fbr[0]->bus_low[bi];
+ next->word2 = bi;
- writel(pRxLocal->local_Fbr0_full.value,
- &pRxDma->fbr0_full_offset.value);
+ writel(bump_fbr(&rx_local->local_Fbr0_full,
+ rx_local->Fbr0NumEntries - 1),
+ &rx_dma->fbr0_full_offset);
}
#endif
- spin_unlock_irqrestore(&pAdapter->FbrLock, lockflags);
+ spin_unlock_irqrestore(&etdev->FbrLock, flags);
} else {
- DBG_ERROR(et131x_dbginfo,
+ dev_err(&etdev->pdev->dev,
"NICReturnRFD illegal Buffer Index returned\n");
}
/* The processing on this RFD is done, so put it back on the tail of
* our list
*/
- spin_lock_irqsave(&pAdapter->RcvLock, lockflags);
- list_add_tail(&pMpRfd->list_node, &pRxLocal->RecvList);
- pRxLocal->nReadyRecv++;
- spin_unlock_irqrestore(&pAdapter->RcvLock, lockflags);
+ spin_lock_irqsave(&etdev->RcvLock, flags);
+ list_add_tail(&rfd->list_node, &rx_local->RecvList);
+ rx_local->nReadyRecv++;
+ spin_unlock_irqrestore(&etdev->RcvLock, flags);
- DBG_ASSERT(pRxLocal->nReadyRecv <= pRxLocal->NumRfd);
- DBG_RX_LEAVE(et131x_dbginfo);
+ WARN_ON(rx_local->nReadyRecv > rx_local->NumRfd);
}
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff