#define QUEUE_STOPPED (1)
#define IS_DMA_ALIGNED(x) (((u32)(x) & 0x03) == 0)
+#define DMA_ALIGNMENT 4
/*-------------------------------------------------------------------------*/
/* Read trailing bytes */
limit = loops_per_jiffy << 1;
- while ((read(drv_data) == 0) && limit--);
+ while ((read(drv_data) == 0) && --limit)
+ cpu_relax();
if (limit == 0)
dev_err(&drv_data->pdev->dev,
master->bus_num = pdev->id;
master->num_chipselect = platform_info->num_chipselect;
+ master->dma_alignment = DMA_ALIGNMENT;
master->cleanup = cleanup;
master->setup = setup;
master->transfer = transfer;