tree-wide: fix assorted typos all over the place

[safe/jmp/linux-2.6] / drivers / net / wireless / rt2x00 / rt61pci.h

diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h
index 1004d5b..77b5116 100644 (file)
--- a/drivers/net/wireless/rt2x00/rt61pci.h
+++ b/drivers/net/wireless/rt2x00/rt61pci.h
@@ -1,5 +1,5 @@
 /*
-       Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
+       Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
        <http://rt2x00.serialmonkey.com>
 
        This program is free software; you can redistribute it and/or modify
@@ -37,7 +37,7 @@
 
 /*
  * Signal information.
- * Defaul offset is required for RSSI <-> dBm conversion.
+ * Default offset is required for RSSI <-> dBm conversion.
  */
 #define DEFAULT_RSSI_OFFSET            120
 
@@ -48,8 +48,10 @@
 #define CSR_REG_SIZE                   0x04b0
 #define EEPROM_BASE                    0x0000
 #define EEPROM_SIZE                    0x0100
+#define BBP_BASE                       0x0000
 #define BBP_SIZE                       0x0080
-#define RF_SIZE                                0x0014
+#define RF_BASE                                0x0004
+#define RF_SIZE                                0x0010
 
 /*
  * Number of TX queues.
@@ -61,12 +63,6 @@
  */
 
 /*
- * PCI Configuration Header
- */
-#define PCI_CONFIG_HEADER_VENDOR       0x0000
-#define PCI_CONFIG_HEADER_DEVICE       0x0002
-
-/*
  * HOST_CMD_CSR: For HOST to interrupt embedded processor
  */
 #define HOST_CMD_CSR                   0x0008
@@ -86,8 +82,10 @@
 
 /*
  * SOFT_RESET_CSR
+ * FORCE_CLOCK_ON: Host force MAC clock ON
  */
 #define SOFT_RESET_CSR                 0x0010
+#define SOFT_RESET_CSR_FORCE_CLOCK_ON  FIELD32(0x00000002)
 
 /*
  * MCU_INT_SOURCE_CSR: MCU interrupt source/mask register.
@@ -134,6 +132,16 @@
 #define PAIRWISE_KEY_TABLE_BASE                0x1200
 #define PAIRWISE_TA_TABLE_BASE         0x1a00
 
+#define SHARED_KEY_ENTRY(__idx) \
+       ( SHARED_KEY_TABLE_BASE + \
+               ((__idx) * sizeof(struct hw_key_entry)) )
+#define PAIRWISE_KEY_ENTRY(__idx) \
+       ( PAIRWISE_KEY_TABLE_BASE + \
+               ((__idx) * sizeof(struct hw_key_entry)) )
+#define PAIRWISE_TA_ENTRY(__idx) \
+       ( PAIRWISE_TA_TABLE_BASE + \
+               ((__idx) * sizeof(struct hw_pairwise_ta_entry)) )
+
 struct hw_key_entry {
        u8 key[16];
        u8 tx_mic[8];
@@ -142,7 +150,8 @@ struct hw_key_entry {
 
 struct hw_pairwise_ta_entry {
        u8 address[6];
-       u8 reserved[2];
+       u8 cipher;
+       u8 reserved;
 } __attribute__ ((packed));
 
 /*
@@ -662,6 +671,10 @@ struct hw_pairwise_ta_entry {
  * SEC_CSR4: Pairwise key table lookup control.
  */
 #define SEC_CSR4                       0x30b0
+#define SEC_CSR4_ENABLE_BSS0           FIELD32(0x00000001)
+#define SEC_CSR4_ENABLE_BSS1           FIELD32(0x00000002)
+#define SEC_CSR4_ENABLE_BSS2           FIELD32(0x00000004)
+#define SEC_CSR4_ENABLE_BSS3           FIELD32(0x00000008)
 
 /*
  * SEC_CSR5: shared key table security mode register.
@@ -1037,8 +1050,10 @@ struct hw_pairwise_ta_entry {
 
 /*
  * IO_CNTL_CSR
+ * RF_PS: Set RF interface value to power save
  */
 #define IO_CNTL_CSR                    0x3498
+#define IO_CNTL_CSR_RF_PS              FIELD32(0x00000004)
 
 /*
  * UART_INT_SOURCE_CSR
@@ -1169,7 +1184,8 @@ struct hw_pairwise_ta_entry {
 #define EEPROM_NIC                     0x0011
 #define EEPROM_NIC_ENABLE_DIVERSITY    FIELD16(0x0001)
 #define EEPROM_NIC_TX_DIVERSITY                FIELD16(0x0002)
-#define EEPROM_NIC_TX_RX_FIXED         FIELD16(0x000c)
+#define EEPROM_NIC_RX_FIXED            FIELD16(0x0004)
+#define EEPROM_NIC_TX_FIXED            FIELD16(0x0008)
 #define EEPROM_NIC_EXTERNAL_LNA_BG     FIELD16(0x0010)
 #define EEPROM_NIC_CARDBUS_ACCEL       FIELD16(0x0020)
 #define EEPROM_NIC_EXTERNAL_LNA_A      FIELD16(0x0040)
@@ -1428,8 +1444,10 @@ struct hw_pairwise_ta_entry {
 
 /*
  * Word4
+ * ICV: Received ICV of originally encrypted.
+ * NOTE: This is a guess, the official definition is "reserved"
  */
-#define RXD_W4_RESERVED                        FIELD32(0xffffffff)
+#define RXD_W4_ICV                     FIELD32(0xffffffff)
 
 /*
  * the above 20-byte is called RXINFO and will be DMAed to MAC RX block
@@ -1458,24 +1476,17 @@ struct hw_pairwise_ta_entry {
 #define RXD_W15_RESERVED               FIELD32(0xffffffff)
 
 /*
- * Macro's for converting txpower from EEPROM to mac80211 value
+ * Macros for converting txpower from EEPROM to mac80211 value
  * and from mac80211 value to register value.
  */
 #define MIN_TXPOWER    0
 #define MAX_TXPOWER    31
 #define DEFAULT_TXPOWER        24
 
-#define TXPOWER_FROM_DEV(__txpower)            \
-({                                             \
-       ((__txpower) > MAX_TXPOWER) ?           \
-               DEFAULT_TXPOWER : (__txpower);  \
-})
-
-#define TXPOWER_TO_DEV(__txpower)                      \
-({                                                     \
-       ((__txpower) <= MIN_TXPOWER) ? MIN_TXPOWER :    \
-       (((__txpower) >= MAX_TXPOWER) ? MAX_TXPOWER :   \
-       (__txpower));                                   \
-})
+#define TXPOWER_FROM_DEV(__txpower) \
+       (((u8)(__txpower)) > MAX_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
+
+#define TXPOWER_TO_DEV(__txpower) \
+       clamp_t(char, __txpower, MIN_TXPOWER, MAX_TXPOWER)
 
 #endif /* RT61PCI_H */