include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...

[safe/jmp/linux-2.6] / drivers / infiniband / hw / mthca / mthca_cmd.c

diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c
index 667c35d..3603ae8 100644 (file)
--- a/drivers/infiniband/hw/mthca/mthca_cmd.c
+++ b/drivers/infiniband/hw/mthca/mthca_cmd.c
@@ -30,14 +30,13 @@
  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  * SOFTWARE.
- *
- * $Id: mthca_cmd.c 1349 2004-12-16 21:09:43Z roland $
  */
 
 #include <linux/completion.h>
 #include <linux/pci.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <asm/io.h>
 #include <rdma/ib_mad.h>
 
@@ -159,13 +158,15 @@ enum {
 enum {
        CMD_TIME_CLASS_A = (HZ + 999) / 1000 + 1,
        CMD_TIME_CLASS_B = (HZ +  99) /  100 + 1,
-       CMD_TIME_CLASS_C = (HZ +   9) /   10 + 1
+       CMD_TIME_CLASS_C = (HZ +   9) /   10 + 1,
+       CMD_TIME_CLASS_D = 60 * HZ
 };
 #else
 enum {
        CMD_TIME_CLASS_A = 60 * HZ,
        CMD_TIME_CLASS_B = 60 * HZ,
-       CMD_TIME_CLASS_C = 60 * HZ
+       CMD_TIME_CLASS_C = 60 * HZ,
+       CMD_TIME_CLASS_D = 60 * HZ
 };
 #endif
 
@@ -600,7 +601,7 @@ int mthca_SYS_EN(struct mthca_dev *dev, u8 *status)
        u64 out;
        int ret;
 
-       ret = mthca_cmd_imm(dev, 0, &out, 0, 0, CMD_SYS_EN, HZ, status);
+       ret = mthca_cmd_imm(dev, 0, &out, 0, 0, CMD_SYS_EN, CMD_TIME_CLASS_D, status);
 
        if (*status == MTHCA_CMD_STAT_DDR_MEM_ERR)
                mthca_warn(dev, "SYS_EN DDR error: syn=%x, sock=%d, "
@@ -613,7 +614,7 @@ int mthca_SYS_EN(struct mthca_dev *dev, u8 *status)
 
 int mthca_SYS_DIS(struct mthca_dev *dev, u8 *status)
 {
-       return mthca_cmd(dev, 0, 0, 0, CMD_SYS_DIS, HZ, status);
+       return mthca_cmd(dev, 0, 0, 0, CMD_SYS_DIS, CMD_TIME_CLASS_C, status);
 }
 
 static int mthca_map_cmd(struct mthca_dev *dev, u16 op, struct mthca_icm *icm,
@@ -1059,7 +1060,7 @@ int mthca_QUERY_DEV_LIM(struct mthca_dev *dev,
        MTHCA_GET(field, outbox, QUERY_DEV_LIM_RSVD_MTT_OFFSET);
        if (mthca_is_memfree(dev))
                dev_lim->reserved_mtts = ALIGN((1 << (field >> 4)) * sizeof(u64),
-                                              MTHCA_MTT_SEG_SIZE) / MTHCA_MTT_SEG_SIZE;
+                                              dev->limits.mtt_seg_size) / dev->limits.mtt_seg_size;
        else
                dev_lim->reserved_mtts = 1 << (field >> 4);
        MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_MRW_SZ_OFFSET);
@@ -1339,6 +1340,10 @@ int mthca_INIT_HCA(struct mthca_dev *dev,
        /* Check port for UD address vector: */
        *(inbox + INIT_HCA_FLAGS2_OFFSET / 4) |= cpu_to_be32(1);
 
+       /* Enable IPoIB checksumming if we can: */
+       if (dev->device_cap_flags & IB_DEVICE_UD_IP_CSUM)
+               *(inbox + INIT_HCA_FLAGS2_OFFSET / 4) |= cpu_to_be32(7 << 3);
+
        /* We leave wqe_quota, responder_exu, etc as 0 (default) */
 
        /* QPC/EEC/CQC/EQC/RDB attributes */
@@ -1388,7 +1393,7 @@ int mthca_INIT_HCA(struct mthca_dev *dev,
                MTHCA_PUT(inbox, param->uarc_base,   INIT_HCA_UAR_CTX_BASE_OFFSET);
        }
 
-       err = mthca_cmd(dev, mailbox->dma, 0, 0, CMD_INIT_HCA, HZ, status);
+       err = mthca_cmd(dev, mailbox->dma, 0, 0, CMD_INIT_HCA, CMD_TIME_CLASS_D, status);
 
        mthca_free_mailbox(dev, mailbox);
        return err;
@@ -1448,12 +1453,12 @@ int mthca_INIT_IB(struct mthca_dev *dev,
 
 int mthca_CLOSE_IB(struct mthca_dev *dev, int port, u8 *status)
 {
-       return mthca_cmd(dev, 0, port, 0, CMD_CLOSE_IB, HZ, status);
+       return mthca_cmd(dev, 0, port, 0, CMD_CLOSE_IB, CMD_TIME_CLASS_A, status);
 }
 
 int mthca_CLOSE_HCA(struct mthca_dev *dev, int panic, u8 *status)
 {
-       return mthca_cmd(dev, 0, 0, panic, CMD_CLOSE_HCA, HZ, status);
+       return mthca_cmd(dev, 0, 0, panic, CMD_CLOSE_HCA, CMD_TIME_CLASS_C, status);
 }
 
 int mthca_SET_IB(struct mthca_dev *dev, struct mthca_set_ib_param *param,