drm/radeon/kms/combios: fix typo in voltage fix
[safe/jmp/linux-2.6] / drivers / gpu / drm / radeon / radeon_irq_kms.c
index 491d569..059bfa4 100644 (file)
  *          Jerome Glisse
  */
 #include "drmP.h"
+#include "drm_crtc_helper.h"
 #include "radeon_drm.h"
 #include "radeon_reg.h"
-#include "radeon_microcode.h"
 #include "radeon.h"
 #include "atom.h"
 
-static inline uint32_t r100_irq_ack(struct radeon_device *rdev)
-{
-       uint32_t irqs = RREG32(RADEON_GEN_INT_STATUS);
-       uint32_t irq_mask = RADEON_SW_INT_TEST;
-
-       if (irqs) {
-               WREG32(RADEON_GEN_INT_STATUS, irqs);
-       }
-       return irqs & irq_mask;
-}
-
-int r100_irq_set(struct radeon_device *rdev)
-{
-       uint32_t tmp = 0;
-
-       if (rdev->irq.sw_int) {
-               tmp |= RADEON_SW_INT_ENABLE;
-       }
-       /* Todo go through CRTC and enable vblank int or not */
-       WREG32(RADEON_GEN_INT_CNTL, tmp);
-       return 0;
-}
-
-int r100_irq_process(struct radeon_device *rdev)
-{
-       uint32_t status;
-
-       status = r100_irq_ack(rdev);
-       if (!status) {
-               return IRQ_NONE;
-       }
-       while (status) {
-               /* SW interrupt */
-               if (status & RADEON_SW_INT_TEST) {
-                       radeon_fence_process(rdev);
-               }
-               status = r100_irq_ack(rdev);
-       }
-       return IRQ_HANDLED;
-}
-
-int rs600_irq_set(struct radeon_device *rdev)
-{
-       uint32_t tmp = 0;
-
-       if (rdev->irq.sw_int) {
-               tmp |= RADEON_SW_INT_ENABLE;
-       }
-       WREG32(RADEON_GEN_INT_CNTL, tmp);
-       /* Todo go through CRTC and enable vblank int or not */
-       WREG32(R500_DxMODE_INT_MASK, 0);
-       return 0;
-}
-
 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
 {
        struct drm_device *dev = (struct drm_device *) arg;
@@ -94,16 +40,39 @@ irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
        return radeon_irq_process(rdev);
 }
 
+/*
+ * Handle hotplug events outside the interrupt handler proper.
+ */
+static void radeon_hotplug_work_func(struct work_struct *work)
+{
+       struct radeon_device *rdev = container_of(work, struct radeon_device,
+                                                 hotplug_work);
+       struct drm_device *dev = rdev->ddev;
+       struct drm_mode_config *mode_config = &dev->mode_config;
+       struct drm_connector *connector;
+
+       if (mode_config->num_connector) {
+               list_for_each_entry(connector, &mode_config->connector_list, head)
+                       radeon_connector_hotplug(connector);
+       }
+       /* Just fire off a uevent and let userspace tell us what to do */
+       drm_helper_hpd_irq_event(dev);
+}
+
 void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
 {
        struct radeon_device *rdev = dev->dev_private;
        unsigned i;
 
+       INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
+
        /* Disable *all* interrupts */
        rdev->irq.sw_int = false;
-       for (i = 0; i < 2; i++) {
+       rdev->irq.gui_idle = false;
+       for (i = 0; i < rdev->num_crtc; i++)
                rdev->irq.crtc_vblank_int[i] = false;
-       }
+       for (i = 0; i < 6; i++)
+               rdev->irq.hpd[i] = false;
        radeon_irq_set(rdev);
        /* Clear bits */
        radeon_irq_process(rdev);
@@ -129,9 +98,11 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
        }
        /* Disable *all* interrupts */
        rdev->irq.sw_int = false;
-       for (i = 0; i < 2; i++) {
+       rdev->irq.gui_idle = false;
+       for (i = 0; i < rdev->num_crtc; i++)
                rdev->irq.crtc_vblank_int[i] = false;
-       }
+       for (i = 0; i < 6; i++)
+               rdev->irq.hpd[i] = false;
        radeon_irq_set(rdev);
 }
 
@@ -139,20 +110,67 @@ int radeon_irq_kms_init(struct radeon_device *rdev)
 {
        int r = 0;
 
-       r = drm_vblank_init(rdev->ddev, 2);
+       spin_lock_init(&rdev->irq.sw_lock);
+       r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
        if (r) {
                return r;
        }
-       drm_irq_install(rdev->ddev);
+       /* enable msi */
+       rdev->msi_enabled = 0;
+       /* MSIs don't seem to work reliably on all IGP
+        * chips.  Disable MSI on them for now.
+        */
+       if ((rdev->family >= CHIP_RV380) &&
+           (!(rdev->flags & RADEON_IS_IGP))) {
+               int ret = pci_enable_msi(rdev->pdev);
+               if (!ret) {
+                       rdev->msi_enabled = 1;
+                       DRM_INFO("radeon: using MSI.\n");
+               }
+       }
        rdev->irq.installed = true;
+       r = drm_irq_install(rdev->ddev);
+       if (r) {
+               rdev->irq.installed = false;
+               return r;
+       }
        DRM_INFO("radeon: irq initialized.\n");
        return 0;
 }
 
 void radeon_irq_kms_fini(struct radeon_device *rdev)
 {
+       drm_vblank_cleanup(rdev->ddev);
        if (rdev->irq.installed) {
-               rdev->irq.installed = false;
                drm_irq_uninstall(rdev->ddev);
+               rdev->irq.installed = false;
+               if (rdev->msi_enabled)
+                       pci_disable_msi(rdev->pdev);
+       }
+}
+
+void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev)
+{
+       unsigned long irqflags;
+
+       spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
+       if (rdev->ddev->irq_enabled && (++rdev->irq.sw_refcount == 1)) {
+               rdev->irq.sw_int = true;
+               radeon_irq_set(rdev);
        }
+       spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
 }
+
+void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev)
+{
+       unsigned long irqflags;
+
+       spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
+       BUG_ON(rdev->ddev->irq_enabled && rdev->irq.sw_refcount <= 0);
+       if (rdev->ddev->irq_enabled && (--rdev->irq.sw_refcount == 0)) {
+               rdev->irq.sw_int = false;
+               radeon_irq_set(rdev);
+       }
+       spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
+}
+