drm/radeon/kms: r600/r700 command stream checker

[safe/jmp/linux-2.6] / drivers / gpu / drm / radeon / r600_cp.c

diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
index 6d5a711..d9712a1 100644 (file)
--- a/drivers/gpu/drm/radeon/r600_cp.c
+++ b/drivers/gpu/drm/radeon/r600_cp.c
@@ -873,6 +873,17 @@ static void r600_gfx_init(struct drm_device *dev,
        RADEON_WRITE(R600_GB_TILING_CONFIG,      gb_tiling_config);
        RADEON_WRITE(R600_DCP_TILING_CONFIG,    (gb_tiling_config & 0xffff));
        RADEON_WRITE(R600_HDP_TILING_CONFIG,    (gb_tiling_config & 0xffff));
+       if (gb_tiling_config & 0xc0) {
+               dev_priv->r600_group_size = 512;
+       } else {
+               dev_priv->r600_group_size = 256;
+       }
+       dev_priv->r600_npipes = 1 << ((gb_tiling_config >> 1) & 0x7);
+       if (gb_tiling_config & 0x30) {
+               dev_priv->r600_nbanks = 8;
+       } else {
+               dev_priv->r600_nbanks = 4;
+       }
 
        RADEON_WRITE(R600_CC_RB_BACKEND_DISABLE,      cc_rb_backend_disable);
        RADEON_WRITE(R600_CC_GC_SHADER_PIPE_CONFIG,   cc_gc_shader_pipe_config);
@@ -1444,6 +1455,17 @@ static void r700_gfx_init(struct drm_device *dev,
        RADEON_WRITE(R600_GB_TILING_CONFIG,      gb_tiling_config);
        RADEON_WRITE(R600_DCP_TILING_CONFIG,    (gb_tiling_config & 0xffff));
        RADEON_WRITE(R600_HDP_TILING_CONFIG,    (gb_tiling_config & 0xffff));
+       if (gb_tiling_config & 0xc0) {
+               dev_priv->r600_group_size = 512;
+       } else {
+               dev_priv->r600_group_size = 256;
+       }
+       dev_priv->r600_npipes = 1 << ((gb_tiling_config >> 1) & 0x7);
+       if (gb_tiling_config & 0x30) {
+               dev_priv->r600_nbanks = 8;
+       } else {
+               dev_priv->r600_nbanks = 4;
+       }
 
        RADEON_WRITE(R600_CC_RB_BACKEND_DISABLE,      cc_rb_backend_disable);
        RADEON_WRITE(R600_CC_GC_SHADER_PIPE_CONFIG,   cc_gc_shader_pipe_config);
@@ -2526,3 +2548,12 @@ out:
        mutex_unlock(&dev_priv->cs_mutex);
        return r;
 }
+
+void r600_cs_legacy_get_tiling_conf(struct drm_device *dev, u32 *npipes, u32 *nbanks, u32 *group_size)
+{
+       struct drm_radeon_private *dev_priv = dev->dev_private;
+
+       *npipes = dev_priv->r600_npipes;
+       *nbanks = dev_priv->r600_nbanks;
+       *group_size = dev_priv->r600_group_size;
+}