drm/radeon/kms: add trivial debugging for voltage

[safe/jmp/linux-2.6] / drivers / gpu / drm / radeon / r600_blit_kms.c

diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c
index 446b765..d13622a 100644 (file)
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -25,7 +25,7 @@ set_render_target(struct radeon_device *rdev, int format,
        u32 cb_color_info;
        int pitch, slice;
 
-       h = (h + 7) & ~7;
+       h = ALIGN(h, 8);
        if (h < 8)
                h = 8;
 
@@ -396,15 +396,13 @@ set_default_state(struct radeon_device *rdev)
                                    NUM_ES_STACK_ENTRIES(num_es_stack_entries));
 
        /* emit an IB pointing at default state */
-       dwords = (rdev->r600_blit.state_len + 0xf) & ~0xf;
+       dwords = ALIGN(rdev->r600_blit.state_len, 0x10);
        gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.state_offset;
        radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2));
        radeon_ring_write(rdev, gpu_addr & 0xFFFFFFFC);
        radeon_ring_write(rdev, upper_32_bits(gpu_addr) & 0xFF);
        radeon_ring_write(rdev, dwords);
 
-       radeon_ring_write(rdev, PACKET3(PACKET3_EVENT_WRITE, 0));
-       radeon_ring_write(rdev, CACHE_FLUSH_AND_INV_EVENT);
        /* SQ config */
        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 6));
        radeon_ring_write(rdev, (SQ_CONFIG - PACKET3_SET_CONFIG_REG_OFFSET) >> 2);
@@ -449,6 +447,9 @@ int r600_blit_init(struct radeon_device *rdev)
        u32 packet2s[16];
        int num_packet2s = 0;
 
+       /* don't reinitialize blit */
+       if (rdev->r600_blit.shader_obj)
+               return 0;
        mutex_init(&rdev->r600_blit.mutex);
        rdev->r600_blit.state_offset = 0;
 
@@ -578,9 +579,9 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
        ring_size = num_loops * dwords_per_loop;
        /* set default  + shaders */
        ring_size += 40; /* shaders + def state */
-       ring_size += 7; /* fence emit for VB IB */
+       ring_size += 10; /* fence emit for VB IB */
        ring_size += 5; /* done copy */
-       ring_size += 7; /* fence emit for done copy */
+       ring_size += 10; /* fence emit for done copy */
        r = radeon_ring_lock(rdev, ring_size);
        if (r)
                return r;
@@ -594,13 +595,6 @@ void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence)
 {
        int r;
 
-       radeon_ring_write(rdev, PACKET3(PACKET3_EVENT_WRITE, 0));
-       radeon_ring_write(rdev, CACHE_FLUSH_AND_INV_EVENT);
-       /* wait for 3D idle clean */
-       radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
-       radeon_ring_write(rdev, (WAIT_UNTIL - PACKET3_SET_CONFIG_REG_OFFSET) >> 2);
-       radeon_ring_write(rdev, WAIT_3D_IDLE_bit | WAIT_3D_IDLECLEAN_bit);
-
        if (rdev->r600_blit.vb_ib)
                r600_vb_ib_put(rdev);