drm/nv50: fix iommu errors caused by device reading from address 0

[safe/jmp/linux-2.6] / drivers / gpu / drm / nouveau / nouveau_irq.c

diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c
index 13e73ce..53360f1 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_irq.c
+++ b/drivers/gpu/drm/nouveau/nouveau_irq.c
@@ -1204,7 +1204,7 @@ nouveau_irq_handler(DRM_IRQ_ARGS)
 {
        struct drm_device *dev = (struct drm_device *)arg;
        struct drm_nouveau_private *dev_priv = dev->dev_private;
-       uint32_t status, fbdev_flags = 0;
+       uint32_t status;
        unsigned long flags;
 
        status = nv_rd32(dev, NV03_PMC_INTR_0);
@@ -1213,11 +1213,6 @@ nouveau_irq_handler(DRM_IRQ_ARGS)
 
        spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
 
-       if (dev_priv->fbdev_info) {
-               fbdev_flags = dev_priv->fbdev_info->flags;
-               dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;
-       }
-
        if (status & NV_PMC_INTR_0_PFIFO_PENDING) {
                nouveau_fifo_irq_handler(dev);
                status &= ~NV_PMC_INTR_0_PFIFO_PENDING;
@@ -1247,9 +1242,6 @@ nouveau_irq_handler(DRM_IRQ_ARGS)
        if (status)
                NV_ERROR(dev, "Unhandled PMC INTR status bits 0x%08x\n", status);
 
-       if (dev_priv->fbdev_info)
-               dev_priv->fbdev_info->flags = fbdev_flags;
-
        spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
 
        return IRQ_HANDLED;