drm/nouveau: attempt to get bios from ACPI v3

[safe/jmp/linux-2.6] / drivers / gpu / drm / nouveau / nouveau_drv.h

diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index fd17fae..c697191 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -520,6 +520,7 @@ struct drm_nouveau_private {
 
        struct workqueue_struct *wq;
        struct work_struct irq_work;
+       struct work_struct hpd_work;
 
        struct list_head vbl_waiting;
 
@@ -554,12 +555,6 @@ struct drm_nouveau_private {
        uint32_t ramro_offset;
        uint32_t ramro_size;
 
-       /* base physical addresses */
-       uint64_t fb_phys;
-       uint64_t fb_available_size;
-       uint64_t fb_mappable_pages;
-       uint64_t fb_aper_free;
-
        struct {
                enum {
                        NOUVEAU_GART_NONE = 0,
@@ -573,10 +568,6 @@ struct drm_nouveau_private {
                struct nouveau_gpuobj *sg_ctxdma;
                struct page *sg_dummy_page;
                dma_addr_t sg_dummy_bus;
-
-               /* nottm hack */
-               struct drm_ttm_backend *sg_be;
-               unsigned long sg_handle;
        } gart_info;
 
        /* nv10-nv40 tiling regions */
@@ -585,6 +576,16 @@ struct drm_nouveau_private {
                spinlock_t lock;
        } tile;
 
+       /* VRAM/fb configuration */
+       uint64_t vram_size;
+       uint64_t vram_sys_base;
+
+       uint64_t fb_phys;
+       uint64_t fb_available_size;
+       uint64_t fb_mappable_pages;
+       uint64_t fb_aper_free;
+       int fb_mtrr;
+
        /* G8x/G9x virtual address space */
        uint64_t vm_gart_base;
        uint64_t vm_gart_size;
@@ -593,10 +594,6 @@ struct drm_nouveau_private {
        uint64_t vm_end;
        struct nouveau_gpuobj *vm_vram_pt[NV50_VM_VRAM_NR];
        int vm_vram_pt_nr;
-       uint64_t vram_sys_base;
-
-       /* the mtrr covering the FB */
-       int fb_mtrr;
 
        struct mem_block *ramin_heap;
 
@@ -615,11 +612,7 @@ struct drm_nouveau_private {
        uint32_t dac_users[4];
 
        struct nouveau_suspend_resume {
-               uint32_t fifo_mode;
-               uint32_t graph_ctx_control;
-               uint32_t graph_state;
                uint32_t *ramin_copy;
-               uint64_t ramin_size;
        } susres;
 
        struct backlight_device *backlight;
@@ -629,6 +622,9 @@ struct drm_nouveau_private {
        struct {
                struct dentry *channel_root;
        } debugfs;
+
+       struct nouveau_fbdev *nfbdev;
+       struct apertures_struct *apertures;
 };
 
 static inline struct drm_nouveau_private *
@@ -718,7 +714,7 @@ extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *,
                                                 struct drm_file *, int tail);
 extern void nouveau_mem_takedown(struct mem_block **heap);
 extern void nouveau_mem_free_block(struct mem_block *);
-extern uint64_t nouveau_mem_fb_amount(struct drm_device *);
+extern int  nouveau_mem_detect(struct drm_device *dev);
 extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap);
 extern int  nouveau_mem_init(struct drm_device *);
 extern int  nouveau_mem_init_agp(struct drm_device *);
@@ -855,12 +851,17 @@ extern int  nouveau_dma_init(struct nouveau_channel *);
 extern int  nouveau_dma_wait(struct nouveau_channel *, int slots, int size);
 
 /* nouveau_acpi.c */
+#define ROM_BIOS_PAGE 4096
 #if defined(CONFIG_ACPI)
 void nouveau_register_dsm_handler(void);
 void nouveau_unregister_dsm_handler(void);
+int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len);
+bool nouveau_acpi_rom_supported(struct pci_dev *pdev);
 #else
 static inline void nouveau_register_dsm_handler(void) {}
 static inline void nouveau_unregister_dsm_handler(void) {}
+static inline bool nouveau_acpi_rom_supported(struct pci_dev *pdev) { return false; }
+static inline int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len) { return -EINVAL; }
 #endif
 
 /* nouveau_backlight.c */
@@ -1170,6 +1171,16 @@ extern int nouveau_gem_ioctl_info(struct drm_device *, void *,
 int nv17_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag);
 int nv17_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state);
 
+/* nv50_gpio.c */
+int nv50_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag);
+int nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state);
+
+/* nv50_calc. */
+int nv50_calc_pll(struct drm_device *, struct pll_lims *, int clk,
+                 int *N1, int *M1, int *N2, int *M2, int *P);
+int nv50_calc_pll2(struct drm_device *, struct pll_lims *,
+                  int clk, int *N, int *fN, int *M, int *P);
+
 #ifndef ioread32_native
 #ifdef __BIG_ENDIAN
 #define ioread16_native ioread16be