Merge branch 'gpu-switcher' of /ssd/git//linux-2.6 into drm-next-stage

[safe/jmp/linux-2.6] / drivers / gpu / drm / i915 / i915_drv.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d77e566..979439c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -150,7 +150,27 @@ struct drm_i915_error_state {
        u32 instps;
        u32 instdone1;
        u32 seqno;
+       u64 bbaddr;
        struct timeval time;
+       struct drm_i915_error_object {
+               int page_count;
+               u32 gtt_offset;
+               u32 *pages[0];
+       } *ringbuffer, *batchbuffer[2];
+       struct drm_i915_error_buffer {
+               size_t size;
+               u32 name;
+               u32 seqno;
+               u32 gtt_offset;
+               u32 read_domains;
+               u32 write_domain;
+               u32 fence_reg;
+               s32 pinned:2;
+               u32 tiling:2;
+               u32 dirty:1;
+               u32 purgeable:1;
+       } *active_bo;
+       u32 active_bo_count;
 };
 
 struct drm_i915_display_funcs {
@@ -192,6 +212,14 @@ struct intel_device_info {
        u8 cursor_needs_physical : 1;
 };
 
+enum no_fbc_reason {
+       FBC_STOLEN_TOO_SMALL, /* not enough space to hold compressed buffers */
+       FBC_UNSUPPORTED_MODE, /* interlace or doublescanned mode */
+       FBC_MODE_TOO_LARGE, /* mode too large for compression */
+       FBC_BAD_PLANE, /* fbc not supported on plane */
+       FBC_NOT_TILED, /* buffer not tiled */
+};
+
 typedef struct drm_i915_private {
        struct drm_device *dev;
 
@@ -452,6 +480,7 @@ typedef struct drm_i915_private {
        u32 savePIPEB_DATA_N1;
        u32 savePIPEB_LINK_M1;
        u32 savePIPEB_LINK_N1;
+       u32 saveMCHBAR_RENDER_STANDBY;
 
        struct {
                struct drm_mm gtt_space;
@@ -590,6 +619,14 @@ typedef struct drm_i915_private {
        int child_dev_num;
        struct child_device_config *child_dev;
        struct drm_connector *int_lvds_connector;
+
+       bool mchbar_need_disable;
+
+       u8 cur_delay;
+       u8 min_delay;
+       u8 max_delay;
+
+       enum no_fbc_reason no_fbc_reason;
 } drm_i915_private_t;
 
 /** driver private structure attached to each drm_gem_object */
@@ -763,6 +800,7 @@ extern int i965_reset(struct drm_device *dev, u8 flags);
 
 /* i915_irq.c */
 void i915_hangcheck_elapsed(unsigned long data);
+void i915_destroy_error_state(struct drm_device *dev);
 extern int i915_irq_emit(struct drm_device *dev, void *data,
                         struct drm_file *file_priv);
 extern int i915_irq_wait(struct drm_device *dev, void *data,
@@ -899,7 +937,8 @@ void i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj);
 void i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj);
 bool i915_tiling_ok(struct drm_device *dev, int stride, int size,
                    int tiling_mode);
-bool i915_obj_fenceable(struct drm_device *dev, struct drm_gem_object *obj);
+bool i915_gem_object_fence_offset_ok(struct drm_gem_object *obj,
+                                    int tiling_mode);
 
 /* i915_gem_debug.c */
 void i915_gem_dump_object(struct drm_gem_object *obj, int len,
@@ -1028,7 +1067,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 #define IS_845G(dev)           ((dev)->pci_device == 0x2562)
 #define IS_I85X(dev)           ((dev)->pci_device == 0x3582)
 #define IS_I865G(dev)          ((dev)->pci_device == 0x2572)
-#define IS_I8XX(dev)           (INTEL_INFO(dev)->is_i8xx)
+#define IS_GEN2(dev)           (INTEL_INFO(dev)->is_i8xx)
 #define IS_I915G(dev)          (INTEL_INFO(dev)->is_i915g)
 #define IS_I915GM(dev)         ((dev)->pci_device == 0x2592)
 #define IS_I945G(dev)          ((dev)->pci_device == 0x2772)
@@ -1047,8 +1086,29 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 #define IS_I9XX(dev)           (INTEL_INFO(dev)->is_i9xx)
 #define IS_MOBILE(dev)         (INTEL_INFO(dev)->is_mobile)
 
+#define IS_GEN3(dev)   (IS_I915G(dev) ||                       \
+                        IS_I915GM(dev) ||                      \
+                        IS_I945G(dev) ||                       \
+                        IS_I945GM(dev) ||                      \
+                        IS_G33(dev) || \
+                        IS_PINEVIEW(dev))
+#define IS_GEN4(dev)   ((dev)->pci_device == 0x2972 ||         \
+                        (dev)->pci_device == 0x2982 ||         \
+                        (dev)->pci_device == 0x2992 ||         \
+                        (dev)->pci_device == 0x29A2 ||         \
+                        (dev)->pci_device == 0x2A02 ||         \
+                        (dev)->pci_device == 0x2A12 ||         \
+                        (dev)->pci_device == 0x2E02 ||         \
+                        (dev)->pci_device == 0x2E12 ||         \
+                        (dev)->pci_device == 0x2E22 ||         \
+                        (dev)->pci_device == 0x2E32 ||         \
+                        (dev)->pci_device == 0x2A42 ||         \
+                        (dev)->pci_device == 0x2E42)
+
 #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
 
+#define IS_GEN6(dev)   ((dev)->pci_device == 0x0102)
+
 /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
  * rows, which changed the alignment requirements and fence programming.
  */
@@ -1069,6 +1129,9 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 #define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
 #define I915_HAS_RC6(dev) (INTEL_INFO(dev)->has_rc6)
 
+#define HAS_PCH_SPLIT(dev) (IS_IRONLAKE(dev) ||        \
+                           IS_GEN6(dev))
+
 #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
 
 #endif