u32 age;
} drm_radeon_buf_priv_t;
+typedef struct drm_radeon_kcmd_buffer {
+ int bufsz;
+ char *buf;
+ int nbox;
+ drm_clip_rect_t __user *boxes;
+} drm_radeon_kcmd_buffer_t;
+
extern int radeon_no_wb;
+extern drm_ioctl_desc_t radeon_ioctls[];
+extern int radeon_max_ioctl;
+
/* radeon_cp.c */
extern int radeon_cp_init(DRM_IOCTL_ARGS);
extern int radeon_cp_start(DRM_IOCTL_ARGS);
extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp,
drm_file_t * filp_priv,
- drm_radeon_cmd_buffer_t * cmdbuf);
+ drm_radeon_kcmd_buffer_t * cmdbuf);
/* Flags for stats.boxes
*/