include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[safe/jmp/linux-2.6] / drivers / char / agp / nvidia-agp.c
index 4f7a3e8..10f24e3 100644 (file)
@@ -1,16 +1,16 @@
 /*
  * Nvidia AGPGART routines.
  * Based upon a 2.4 agpgart diff by the folks from NVIDIA, and hacked up
- * to work in 2.5 by Dave Jones <davej@codemonkey.org.uk>
+ * to work in 2.5 by Dave Jones <davej@redhat.com>
  */
 
 #include <linux/module.h>
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/agp_backend.h>
-#include <linux/gfp.h>
 #include <linux/page-flags.h>
 #include <linux/mm.h>
+#include <linux/jiffies.h>
 #include "agp.h"
 
 /* NVIDIA registers */
@@ -72,7 +72,7 @@ static int nvidia_init_iorr(u32 base, u32 size)
        /* Find the iorr that is already used for the base */
        /* If not found, determine the uppermost available iorr */
        free_iorr_addr = AMD_K7_NUM_IORR;
-       for(iorr_addr = 0; iorr_addr < AMD_K7_NUM_IORR; iorr_addr++) {
+       for (iorr_addr = 0; iorr_addr < AMD_K7_NUM_IORR; iorr_addr++) {
                rdmsr(IORR_BASE0 + 2 * iorr_addr, base_lo, base_hi);
                rdmsr(IORR_MASK0 + 2 * iorr_addr, mask_lo, mask_hi);
 
@@ -82,7 +82,7 @@ static int nvidia_init_iorr(u32 base, u32 size)
                if ((mask_lo & 0x00000800) == 0)
                        free_iorr_addr = iorr_addr;
        }
-       
+
        if (iorr_addr >= AMD_K7_NUM_IORR) {
                iorr_addr = free_iorr_addr;
                if (iorr_addr >= AMD_K7_NUM_IORR)
@@ -139,7 +139,7 @@ static int nvidia_configure(void)
        }
 
        /* attbase */
-       for(i = 0; i < 8; i++) {
+       for (i = 0; i < 8; i++) {
                pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_ATTBASE(i),
                        (agp_bridge->gatt_bus_addr + (i % num_dirs) * 64 * 1024) | 1);
        }
@@ -156,6 +156,9 @@ static int nvidia_configure(void)
        nvidia_private.aperture =
                (volatile u32 __iomem *) ioremap(apbase, 33 * PAGE_SIZE);
 
+       if (!nvidia_private.aperture)
+               return -ENOMEM;
+
        return 0;
 }
 
@@ -197,29 +200,37 @@ extern int agp_memory_reserved;
 static int nvidia_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
 {
        int i, j;
-       
-       if ((type != 0) || (mem->type != 0))
+       int mask_type;
+
+       mask_type = agp_generic_type_to_mask_type(mem->bridge, type);
+       if (mask_type != 0 || type != mem->type)
                return -EINVAL;
-       
+
+       if (mem->page_count == 0)
+               return 0;
+
        if ((pg_start + mem->page_count) >
                (nvidia_private.num_active_entries - agp_memory_reserved/PAGE_SIZE))
                return -EINVAL;
-       
-       for(j = pg_start; j < (pg_start + mem->page_count); j++) {
+
+       for (j = pg_start; j < (pg_start + mem->page_count); j++) {
                if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j)))
                        return -EBUSY;
        }
 
-       if (mem->is_flushed == FALSE) {
+       if (!mem->is_flushed) {
                global_cache_flush();
-               mem->is_flushed = TRUE;
+               mem->is_flushed = true;
        }
        for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
                writel(agp_bridge->driver->mask_memory(agp_bridge,
-                       mem->memory[i], mem->type),
+                              page_to_phys(mem->pages[i]), mask_type),
                        agp_bridge->gatt_table+nvidia_private.pg_offset+j);
-               readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j);       /* PCI Posting. */
        }
+
+       /* PCI Posting. */
+       readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j - 1);
+
        agp_bridge->driver->tlb_flush(mem);
        return 0;
 }
@@ -229,9 +240,15 @@ static int nvidia_remove_memory(struct agp_memory *mem, off_t pg_start, int type
 {
        int i;
 
-       if ((type != 0) || (mem->type != 0))
+       int mask_type;
+
+       mask_type = agp_generic_type_to_mask_type(mem->bridge, type);
+       if (mask_type != 0 || type != mem->type)
                return -EINVAL;
 
+       if (mem->page_count == 0)
+               return 0;
+
        for (i = pg_start; i < (mem->page_count + pg_start); i++)
                writel(agp_bridge->scratch_page, agp_bridge->gatt_table+nvidia_private.pg_offset+i);
 
@@ -256,7 +273,7 @@ static void nvidia_tlbflush(struct agp_memory *mem)
                do {
                        pci_read_config_dword(nvidia_private.dev_1,
                                        NVIDIA_1_WBC, &wbc_reg);
-                       if ((signed)(end - jiffies) <= 0) {
+                       if (time_before_eq(end, jiffies)) {
                                printk(KERN_ERR PFX
                                    "TLB flush took more than 3 seconds.\n");
                        }
@@ -264,14 +281,14 @@ static void nvidia_tlbflush(struct agp_memory *mem)
        }
 
        /* flush TLB entries */
-       for(i = 0; i < 32 + 1; i++)
+       for (i = 0; i < 32 + 1; i++)
                temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
-       for(i = 0; i < 32 + 1; i++)
+       for (i = 0; i < 32 + 1; i++)
                temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
 }
 
 
-static struct aper_size_info_8 nvidia_generic_sizes[5] =
+static const struct aper_size_info_8 nvidia_generic_sizes[5] =
 {
        {512, 131072, 7, 0},
        {256, 65536, 6, 8},
@@ -282,13 +299,13 @@ static struct aper_size_info_8 nvidia_generic_sizes[5] =
 };
 
 
-static struct gatt_mask nvidia_generic_masks[] =
+static const struct gatt_mask nvidia_generic_masks[] =
 {
        { .mask = 1, .type = 0}
 };
 
 
-struct agp_bridge_driver nvidia_driver = {
+static const struct agp_bridge_driver nvidia_driver = {
        .owner                  = THIS_MODULE,
        .aperture_sizes         = nvidia_generic_sizes,
        .size_type              = U8_APER_SIZE,
@@ -308,7 +325,10 @@ struct agp_bridge_driver nvidia_driver = {
        .alloc_by_type          = agp_generic_alloc_by_type,
        .free_by_type           = agp_generic_free_by_type,
        .agp_alloc_page         = agp_generic_alloc_page,
+       .agp_alloc_pages        = agp_generic_alloc_pages,
        .agp_destroy_page       = agp_generic_destroy_page,
+       .agp_destroy_pages      = agp_generic_destroy_pages,
+       .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
 };
 
 static int __devinit agp_nvidia_probe(struct pci_dev *pdev,
@@ -318,12 +338,12 @@ static int __devinit agp_nvidia_probe(struct pci_dev *pdev,
        u8 cap_ptr;
 
        nvidia_private.dev_1 =
-               pci_find_slot((unsigned int)pdev->bus->number, PCI_DEVFN(0, 1));
+               pci_get_bus_and_slot((unsigned int)pdev->bus->number, PCI_DEVFN(0, 1));
        nvidia_private.dev_2 =
-               pci_find_slot((unsigned int)pdev->bus->number, PCI_DEVFN(0, 2));
+               pci_get_bus_and_slot((unsigned int)pdev->bus->number, PCI_DEVFN(0, 2));
        nvidia_private.dev_3 =
-               pci_find_slot((unsigned int)pdev->bus->number, PCI_DEVFN(30, 0));
-       
+               pci_get_bus_and_slot((unsigned int)pdev->bus->number, PCI_DEVFN(30, 0));
+
        if (!nvidia_private.dev_1 || !nvidia_private.dev_2 || !nvidia_private.dev_3) {
                printk(KERN_INFO PFX "Detected an NVIDIA nForce/nForce2 "
                        "chipset, but could not find the secondary devices.\n");
@@ -375,6 +395,29 @@ static void __devexit agp_nvidia_remove(struct pci_dev *pdev)
        agp_put_bridge(bridge);
 }
 
+#ifdef CONFIG_PM
+static int agp_nvidia_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+       pci_save_state (pdev);
+       pci_set_power_state (pdev, 3);
+
+       return 0;
+}
+
+static int agp_nvidia_resume(struct pci_dev *pdev)
+{
+       /* set power state 0 and restore PCI space */
+       pci_set_power_state (pdev, 0);
+       pci_restore_state(pdev);
+
+       /* reconfigure AGP hardware again */
+       nvidia_configure();
+
+       return 0;
+}
+#endif
+
+
 static struct pci_device_id agp_nvidia_pci_table[] = {
        {
        .class          = (PCI_CLASS_BRIDGE_HOST << 8),
@@ -402,6 +445,10 @@ static struct pci_driver agp_nvidia_pci_driver = {
        .id_table       = agp_nvidia_pci_table,
        .probe          = agp_nvidia_probe,
        .remove         = agp_nvidia_remove,
+#ifdef CONFIG_PM
+       .suspend        = agp_nvidia_suspend,
+       .resume         = agp_nvidia_resume,
+#endif
 };
 
 static int __init agp_nvidia_init(void)
@@ -414,6 +461,9 @@ static int __init agp_nvidia_init(void)
 static void __exit agp_nvidia_cleanup(void)
 {
        pci_unregister_driver(&agp_nvidia_pci_driver);
+       pci_dev_put(nvidia_private.dev_1);
+       pci_dev_put(nvidia_private.dev_2);
+       pci_dev_put(nvidia_private.dev_3);
 }
 
 module_init(agp_nvidia_init);