include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...

[safe/jmp/linux-2.6] / drivers / atm / firestream.c

diff --git a/drivers/atm/firestream.c b/drivers/atm/firestream.c
index 47c57a4..6e600af 100644 (file)
--- a/drivers/atm/firestream.c
+++ b/drivers/atm/firestream.c
@@ -46,6 +46,7 @@
 #include <linux/init.h>
 #include <linux/capability.h>
 #include <linux/bitops.h>
+#include <linux/slab.h>
 #include <asm/byteorder.h>
 #include <asm/system.h>
 #include <asm/string.h>
@@ -978,6 +979,7 @@ static int fs_open(struct atm_vcc *atm_vcc)
                /* Docs are vague about this atm_hdr field. By the way, the FS
                 * chip makes odd errors if lower bits are set.... -- REW */
                tc->atm_hdr =  (vpi << 20) | (vci << 4); 
+               tmc0 = 0;
                {
                        int pcr = atm_pcr_goal (txtp);
 
@@ -1243,7 +1245,7 @@ static int fs_getsockopt(struct atm_vcc *vcc,int level,int optname,
 
 
 static int fs_setsockopt(struct atm_vcc *vcc,int level,int optname,
-                        void __user *optval,int optlen)
+                        void __user *optval,unsigned int optlen)
 {
        func_enter ();
        func_exit ();
@@ -1689,17 +1691,17 @@ static int __devinit fs_init (struct fs_dev *dev)
                  | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
                  | (1 * SARMODE0_INTMODE_READCLEAR)
                  | (1 * SARMODE0_CWRE)
-                 | IS_FS50(dev)?SARMODE0_PRPWT_FS50_5: 
-                                SARMODE0_PRPWT_FS155_3
+                 | (IS_FS50(dev) ? SARMODE0_PRPWT_FS50_5:
+                         SARMODE0_PRPWT_FS155_3)
                  | (1 * SARMODE0_CALSUP_1)
-                 | IS_FS50 (dev)?(0
+                 | (IS_FS50(dev) ? (0
                                   | SARMODE0_RXVCS_32
                                   | SARMODE0_ABRVCS_32 
                                   | SARMODE0_TXVCS_32):
                                  (0
                                   | SARMODE0_RXVCS_1k
                                   | SARMODE0_ABRVCS_1k 
-                                  | SARMODE0_TXVCS_1k));
+                                  | SARMODE0_TXVCS_1k)));
 
        /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes
           1ms. */