sh: Define HAVE_FUNCTION_TRACE_MCOUNT_TEST

[safe/jmp/linux-2.6] / arch / sh / Kconfig

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index dec8b7b..801a4a7 100644 (file)
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -15,7 +15,9 @@ config SUPERH
        select HAVE_IOREMAP_PROT if MMU
        select HAVE_ARCH_TRACEHOOK
        select HAVE_DMA_API_DEBUG
+       select HAVE_PERF_COUNTERS
        select RTC_LIB
+       select GENERIC_ATOMIC64
        help
          The SuperH is a RISC processor targeted for use in embedded systems
          and consumer electronics; it was also used in the Sega Dreamcast
@@ -29,6 +31,7 @@ config SUPERH32
        select HAVE_FUNCTION_TRACER
        select HAVE_FTRACE_MCOUNT_RECORD
        select HAVE_DYNAMIC_FTRACE
+       select HAVE_FUNCTION_TRACE_MCOUNT_TEST
        select HAVE_ARCH_KGDB
        select ARCH_HIBERNATION_POSSIBLE if MMU
 
@@ -50,6 +53,10 @@ config GENERIC_BUG
        def_bool y
        depends on BUG && SUPERH32
 
+config GENERIC_CSUM
+       def_bool y
+       depends on SUPERH64
+
 config GENERIC_FIND_NEXT_BIT
        def_bool y
 
@@ -65,6 +72,9 @@ config GENERIC_HARDIRQS_NO__DO_IRQ
 config GENERIC_IRQ_PROBE
        def_bool y
 
+config IRQ_PER_CPU
+       def_bool y
+
 config GENERIC_GPIO
        def_bool n
 
@@ -145,6 +155,9 @@ config ARCH_NO_VIRT_TO_BUS
 config ARCH_HAS_DEFAULT_IDLE
        def_bool y
 
+config ARCH_HAS_CPU_IDLE_WAIT
+       def_bool y
+
 config IO_TRAPPED
        bool
 
@@ -405,6 +418,8 @@ config CPU_SUBTYPE_SH7786
        select CPU_HAS_PTEAEX
        select ARCH_SPARSEMEM_ENABLE
        select SYS_SUPPORTS_NUMA
+       select SYS_SUPPORTS_SMP
+       select GENERIC_CLOCKEVENTS_BROADCAST if SMP
 
 config CPU_SUBTYPE_SHX3
        bool "Support SH-X3 processor"
@@ -516,7 +531,7 @@ config SH_CLK_CPG
 
 config SH_CLK_CPG_LEGACY
        depends on SH_CLK_CPG
-       def_bool y if !CPU_SUBTYPE_SH7785
+       def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE
 
 config SH_CLK_MD
        int "CPU Mode Pin Setting"
@@ -642,7 +657,7 @@ config NR_CPUS
        int "Maximum number of CPUs (2-32)"
        range 2 32
        depends on SMP
-       default "4" if CPU_SHX3
+       default "4" if CPU_SUBTYPE_SHX3
        default "2"
        help
          This allows you to specify the maximum number of CPUs which this
@@ -678,6 +693,18 @@ config GUSA_RB
          LLSC, this should be more efficient than the other alternative of
          disabling interrupts around the atomic sequence.
 
+config SPARSE_IRQ
+       bool "Support sparse irq numbering"
+       depends on EXPERIMENTAL
+       help
+         This enables support for sparse irqs. This is useful in general
+         as most CPUs have a fairly sparse array of IRQ vectors, which
+         the irq_desc then maps directly on to. Systems with a high
+         number of off-chip IRQs will want to treat this as
+         experimental until they have been independently verified.
+
+         If you don't know what to do here, say N.
+
 endmenu
 
 menu "Boot options"