select EMBEDDED
select HAVE_CLK
select HAVE_IDE
+ select HAVE_LMB
select HAVE_OPROFILE
select HAVE_GENERIC_DMA_COHERENT
select HAVE_IOREMAP_PROT if MMU
select HAVE_ARCH_TRACEHOOK
+ select HAVE_DMA_API_DEBUG
+ select HAVE_PERF_COUNTERS
+ select RTC_LIB
+ select GENERIC_ATOMIC64
help
The SuperH is a RISC processor targeted for use in embedded systems
and consumer electronics; it was also used in the Sega Dreamcast
<http://www.linux-sh.org/>.
config SUPERH32
- def_bool !SUPERH64
+ def_bool ARCH = "sh"
select HAVE_KPROBES
select HAVE_KRETPROBES
select HAVE_FUNCTION_TRACER
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_DYNAMIC_FTRACE
select HAVE_ARCH_KGDB
+ select ARCH_HIBERNATION_POSSIBLE if MMU
config SUPERH64
- def_bool y if CPU_SH5
+ def_bool ARCH = "sh64"
config ARCH_DEFCONFIG
string
def_bool y
depends on BUG && SUPERH32
+config GENERIC_CSUM
+ def_bool y
+ depends on SUPERH64
+
config GENERIC_FIND_NEXT_BIT
def_bool y
config GENERIC_IRQ_PROBE
def_bool y
+config IRQ_PER_CPU
+ def_bool y
+
config GENERIC_GPIO
def_bool n
bool
config GENERIC_TIME
- def_bool n
+ def_bool y
config GENERIC_CLOCKEVENTS
- def_bool n
+ def_bool y
config GENERIC_CLOCKEVENTS_BROADCAST
bool
+config GENERIC_CMOS_UPDATE
+ def_bool y
+ depends on SH_SH03 || SH_DREAMCAST
+
config GENERIC_LOCKBREAK
def_bool y
depends on SMP && PREEMPT
config SYS_SUPPORTS_CMT
bool
+config SYS_SUPPORTS_MTU2
+ bool
+
+config SYS_SUPPORTS_TMU
+ bool
+
config STACKTRACE_SUPPORT
def_bool y
config ARCH_NO_VIRT_TO_BUS
def_bool y
+config ARCH_HAS_DEFAULT_IDLE
+ def_bool y
+
+config ARCH_HAS_CPU_IDLE_WAIT
+ def_bool y
+
config IO_TRAPPED
bool
bool
select CPU_HAS_INTEVT
select CPU_HAS_SR_RB
+ select SYS_SUPPORTS_TMU
config CPU_SH4
bool
select CPU_HAS_INTEVT
select CPU_HAS_SR_RB
- select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2
select CPU_HAS_FPU if !CPU_SH4AL_DSP
+ select SYS_SUPPORTS_TMU
config CPU_SH4A
bool
config CPU_SH5
bool
select CPU_HAS_FPU
+ select SYS_SUPPORTS_TMU
config CPU_SHX2
bool
config CPU_SHX3
bool
+config ARCH_SHMOBILE
+ bool
+ select ARCH_SUSPEND_POSSIBLE
+
+if SUPERH32
+
choice
prompt "Processor sub-type selection"
bool "Support SH7201 processor"
select CPU_SH2A
select CPU_HAS_FPU
+ select SYS_SUPPORTS_MTU2
config CPU_SUBTYPE_SH7203
bool "Support SH7203 processor"
select CPU_SH2A
select CPU_HAS_FPU
select SYS_SUPPORTS_CMT
+ select SYS_SUPPORTS_MTU2
config CPU_SUBTYPE_SH7206
bool "Support SH7206 processor"
select CPU_SH2A
select SYS_SUPPORTS_CMT
+ select SYS_SUPPORTS_MTU2
config CPU_SUBTYPE_SH7263
bool "Support SH7263 processor"
select CPU_SH2A
select CPU_HAS_FPU
select SYS_SUPPORTS_CMT
+ select SYS_SUPPORTS_MTU2
config CPU_SUBTYPE_MXG
bool "Support MX-G processor"
select CPU_SH2A
+ select SYS_SUPPORTS_MTU2
help
Select MX-G if running on an R8A03022BG part.
bool "Support SH7720 processor"
select CPU_SH3
select CPU_HAS_DSP
+ select SYS_SUPPORTS_CMT
help
Select SH7720 if you have a SH3-DSP SH7720 CPU.
bool "Support SH7721 processor"
select CPU_SH3
select CPU_HAS_DSP
+ select SYS_SUPPORTS_CMT
help
Select SH7721 if you have a SH3-DSP SH7721 CPU.
bool "Support SH7723 processor"
select CPU_SH4A
select CPU_SHX2
+ select ARCH_SHMOBILE
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_CMT
help
Select SH7723 if you have an SH-MobileR2 CPU.
+config CPU_SUBTYPE_SH7724
+ bool "Support SH7724 processor"
+ select CPU_SH4A
+ select CPU_SHX2
+ select ARCH_SHMOBILE
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_CMT
+ help
+ Select SH7724 if you have an SH-MobileR2R CPU.
+
config CPU_SUBTYPE_SH7763
bool "Support SH7763 processor"
select CPU_SH4A
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_NUMA
+config CPU_SUBTYPE_SH7786
+ bool "Support SH7786 processor"
+ select CPU_SH4A
+ select CPU_SHX3
+ select CPU_HAS_PTEAEX
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_NUMA
+ select SYS_SUPPORTS_SMP
+ select GENERIC_CLOCKEVENTS_BROADCAST if SMP
+
config CPU_SUBTYPE_SHX3
bool "Support SH-X3 processor"
select CPU_SH4A
config CPU_SUBTYPE_SH7343
bool "Support SH7343 processor"
select CPU_SH4AL_DSP
+ select ARCH_SHMOBILE
select SYS_SUPPORTS_CMT
config CPU_SUBTYPE_SH7722
bool "Support SH7722 processor"
select CPU_SH4AL_DSP
select CPU_SHX2
+ select ARCH_SHMOBILE
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_NUMA
select SYS_SUPPORTS_CMT
bool "Support SH7366 processor"
select CPU_SH4AL_DSP
select CPU_SHX2
+ select ARCH_SHMOBILE
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_NUMA
select SYS_SUPPORTS_CMT
+endchoice
+
+endif
+
+if SUPERH64
+
+choice
+ prompt "Processor sub-type selection"
+
# SH-5 Processor Support
config CPU_SUBTYPE_SH5_101
endchoice
+endif
+
source "arch/sh/mm/Kconfig"
source "arch/sh/Kconfig.cpu"
menu "Timer and clock configuration"
-config SH_TMU
- bool "TMU timer support"
- depends on CPU_SH3 || CPU_SH4
+config SH_TIMER_TMU
+ bool "TMU timer driver"
+ depends on SYS_SUPPORTS_TMU
default y
- select GENERIC_TIME
- select GENERIC_CLOCKEVENTS
help
- This enables the use of the TMU as the system timer.
+ This enables the build of the TMU timer driver.
-config SH_CMT
- bool "CMT timer support"
+config SH_TIMER_CMT
+ bool "CMT timer driver"
depends on SYS_SUPPORTS_CMT
default y
help
- This enables the use of the CMT as the system timer.
+ This enables build of the CMT timer driver.
-#
-# Support for the new-style CMT driver. This will replace SH_CMT
-# once its other dependencies are merged.
-#
-config SH_TIMER_CMT
- bool "CMT clockevents driver"
- depends on SYS_SUPPORTS_CMT && !SH_CMT
- select GENERIC_TIME
- select GENERIC_CLOCKEVENTS
-
-config SH_MTU2
- bool "MTU2 timer support"
- depends on CPU_SH2A
+config SH_TIMER_MTU2
+ bool "MTU2 timer driver"
+ depends on SYS_SUPPORTS_MTU2
default y
help
- This enables the use of the MTU2 as the system timer.
-
-config SH_TIMER_IRQ
- int
- default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || \
- CPU_SUBTYPE_SH7763
- default "86" if CPU_SUBTYPE_SH7619
- default "140" if CPU_SUBTYPE_SH7206
- default "142" if CPU_SUBTYPE_SH7203
- default "238" if CPU_SUBTYPE_MXG
- default "16"
+ This enables build of the MTU2 timer driver.
config SH_PCLK_FREQ
int "Peripheral clock frequency (in Hz)"
default "33333333" if CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7723 || \
CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
- CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG
+ CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG || \
+ CPU_SUBTYPE_SH7786 || CPU_SUBTYPE_SH7724
default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
default "66000000" if CPU_SUBTYPE_SH4_202
default "50000000"
This is necessary for determining the reference clock value on
platforms lacking an RTC.
+config SH_CLK_CPG
+ def_bool y
+
+config SH_CLK_CPG_LEGACY
+ depends on SH_CLK_CPG
+ def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE
+
config SH_CLK_MD
int "CPU Mode Pin Setting"
depends on CPU_SH2
config KEXEC
bool "kexec system call (EXPERIMENTAL)"
- depends on SUPERH32 && EXPERIMENTAL
+ depends on SUPERH32 && EXPERIMENTAL && MMU
help
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot
For more details see Documentation/kdump/kdump.txt
+config KEXEC_JUMP
+ bool "kexec jump (EXPERIMENTAL)"
+ depends on SUPERH32 && KEXEC && HIBERNATION && EXPERIMENTAL
+ help
+ Jump between original kernel and kexeced kernel and invoke
+ code via KEXEC
+
config SECCOMP
bool "Enable seccomp to safely compute untrusted bytecode"
depends on PROC_FS
int "Maximum number of CPUs (2-32)"
range 2 32
depends on SMP
- default "4" if CPU_SHX3
+ default "4" if CPU_SUBTYPE_SHX3
default "2"
help
This allows you to specify the maximum number of CPUs which this
depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
help
Enabling this option will allow the kernel to implement some
- atomic operations using a software implemention of load-locked/
+ atomic operations using a software implementation of load-locked/
store-conditional (LLSC). On machines which do not have hardware
LLSC, this should be more efficient than the other alternative of
- disabling insterrupts around the atomic sequence.
+ disabling interrupts around the atomic sequence.
+
+config SPARSE_IRQ
+ bool "Support sparse irq numbering"
+ depends on EXPERIMENTAL
+ help
+ This enables support for sparse irqs. This is useful in general
+ as most CPUs have a fairly sparse array of IRQ vectors, which
+ the irq_desc then maps directly on to. Systems with a high
+ number of off-chip IRQs will want to treat this as
+ experimental until they have been independently verified.
+
+ If you don't know what to do here, say N.
endmenu
menu "Boot options"
config ZERO_PAGE_OFFSET
- hex "Zero page offset"
- default "0x00004000" if SH_SH03
- default "0x00010000" if PAGE_SIZE_64KB
+ hex
+ default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
+ SH_7751_SOLUTION_ENGINE
+ default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
default "0x00002000" if PAGE_SIZE_8KB
default "0x00001000"
help
This sets the default offset of zero page.
config BOOT_LINK_OFFSET
- hex "Link address offset for booting"
+ hex
+ default "0x00210000" if SH_SHMIN
+ default "0x00400000" if SH_CAYMAN
+ default "0x00810000" if SH_7780_SOLUTION_ENGINE
+ default "0x009e0000" if SH_TITAN
+ default "0x01800000" if SH_SDK7780
+ default "0x02000000" if SH_EDOSK7760
default "0x00800000"
help
This option allows you to set the link address offset of the zImage.
This can be useful if you are on a board which has a small amount of
memory.
+config ENTRY_OFFSET
+ hex
+ default "0x00001000" if PAGE_SIZE_4KB
+ default "0x00002000" if PAGE_SIZE_8KB
+ default "0x00004000" if PAGE_SIZE_16KB
+ default "0x00010000" if PAGE_SIZE_64KB
+ default "0x00000000"
+
config UBC_WAKEUP
bool "Wakeup UBC on startup"
depends on CPU_SH4 && !CPU_SH4A
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff