select EMBEDDED
select HAVE_CLK
select HAVE_IDE
+ select HAVE_LMB
select HAVE_OPROFILE
select HAVE_GENERIC_DMA_COHERENT
select HAVE_IOREMAP_PROT if MMU
select HAVE_ARCH_TRACEHOOK
select HAVE_DMA_API_DEBUG
+ select HAVE_DMA_ATTRS
+ select HAVE_PERF_EVENTS
+ select PERF_USE_VMALLOC
+ select HAVE_KERNEL_GZIP
+ select HAVE_KERNEL_BZIP2
+ select HAVE_KERNEL_LZMA
+ select HAVE_SYSCALL_TRACEPOINTS
select RTC_LIB
+ select GENERIC_ATOMIC64
help
The SuperH is a RISC processor targeted for use in embedded systems
and consumer electronics; it was also used in the Sega Dreamcast
select HAVE_FUNCTION_TRACER
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_DYNAMIC_FTRACE
+ select HAVE_FUNCTION_TRACE_MCOUNT_TEST
+ select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE
+ select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_ARCH_KGDB
select ARCH_HIBERNATION_POSSIBLE if MMU
def_bool y
depends on BUG && SUPERH32
+config GENERIC_CSUM
+ def_bool y
+ depends on SUPERH64
+
config GENERIC_FIND_NEXT_BIT
def_bool y
config GENERIC_IRQ_PROBE
def_bool y
+config IRQ_PER_CPU
+ def_bool y
+
config GENERIC_GPIO
def_bool n
bool
select ARCH_SUSPEND_POSSIBLE
+config SYS_SUPPORTS_HUGETLBFS
+ bool
+
config SYS_SUPPORTS_SMP
bool
config ARCH_HAS_DEFAULT_IDLE
def_bool y
+config ARCH_HAS_CPU_IDLE_WAIT
+ def_bool y
+
config IO_TRAPPED
bool
+config DMA_COHERENT
+ bool
+
+config DMA_NONCOHERENT
+ def_bool !DMA_COHERENT
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
bool
select CPU_HAS_INTEVT
select CPU_HAS_SR_RB
- select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2
select CPU_HAS_FPU if !CPU_SH4AL_DSP
select SYS_SUPPORTS_TMU
+ select SYS_SUPPORTS_HUGETLBFS if MMU
config CPU_SH4A
bool
bool
select CPU_HAS_FPU
select SYS_SUPPORTS_TMU
+ select SYS_SUPPORTS_HUGETLBFS if MMU
config CPU_SHX2
bool
config CPU_SHX3
bool
+ select DMA_COHERENT
config ARCH_SHMOBILE
bool
select ARCH_SUSPEND_POSSIBLE
+ select PM
+ select PM_RUNTIME
if SUPERH32
help
Select SH7724 if you have an SH-MobileR2R CPU.
+config CPU_SUBTYPE_SH7757
+ bool "Support SH7757 processor"
+ select CPU_SH4A
+ select CPU_SHX2
+ help
+ Select SH7757 if you have a SH4A SH7757 CPU.
+
config CPU_SUBTYPE_SH7763
bool "Support SH7763 processor"
select CPU_SH4A
select CPU_HAS_PTEAEX
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_NUMA
+ select SYS_SUPPORTS_SMP
+ select GENERIC_CLOCKEVENTS_BROADCAST if SMP
config CPU_SUBTYPE_SHX3
bool "Support SH-X3 processor"
CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG || \
- CPU_SUBTYPE_SH7786
- default "41666666" if CPU_SUBTYPE_SH7724
+ CPU_SUBTYPE_SH7786 || CPU_SUBTYPE_SH7724
default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
default "66000000" if CPU_SUBTYPE_SH4_202
default "50000000"
config SH_CLK_CPG_LEGACY
depends on SH_CLK_CPG
- def_bool y if !CPU_SUBTYPE_SH7785
+ def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE
config SH_CLK_MD
int "CPU Mode Pin Setting"
int "Maximum number of CPUs (2-32)"
range 2 32
depends on SMP
- default "4" if CPU_SHX3
+ default "4" if CPU_SUBTYPE_SHX3
default "2"
help
This allows you to specify the maximum number of CPUs which this
LLSC, this should be more efficient than the other alternative of
disabling interrupts around the atomic sequence.
+config SPARSE_IRQ
+ bool "Support sparse irq numbering"
+ depends on EXPERIMENTAL
+ help
+ This enables support for sparse irqs. This is useful in general
+ as most CPUs have a fairly sparse array of IRQ vectors, which
+ the irq_desc then maps directly on to. Systems with a high
+ number of off-chip IRQs will want to treat this as
+ experimental until they have been independently verified.
+
+ If you don't know what to do here, say N.
+
endmenu
menu "Boot options"
default "0x00010000" if PAGE_SIZE_64KB
default "0x00000000"
-config UBC_WAKEUP
- bool "Wakeup UBC on startup"
- depends on CPU_SH4 && !CPU_SH4A
+choice
+ prompt "Kernel command line"
+ optional
+ default CMDLINE_OVERWRITE
help
- Selecting this option will wakeup the User Break Controller (UBC) on
- startup. Although the UBC is left in an awake state when the processor
- comes up, some boot loaders misbehave by putting the UBC to sleep in a
- power saving state, which causes issues with things like ptrace().
+ Setting this option allows the kernel command line arguments
+ to be set.
- If unsure, say N.
+config CMDLINE_OVERWRITE
+ bool "Overwrite bootloader kernel arguments"
+ help
+ Given string will overwrite any arguments passed in by
+ a bootloader.
-config CMDLINE_BOOL
- bool "Default bootloader kernel arguments"
+config CMDLINE_EXTEND
+ bool "Extend bootloader kernel arguments"
+ help
+ Given string will be concatenated with arguments passed in
+ by a bootloader.
+
+endchoice
config CMDLINE
- string "Initial kernel command string"
- depends on CMDLINE_BOOL
+ string "Kernel command line arguments string"
+ depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
default "console=ttySC1,115200"
endmenu
Dreamcast with a serial line terminal or a remote network
connection.
-source "arch/sh/drivers/pci/Kconfig"
+config PCI
+ bool "PCI support"
+ depends on SYS_SUPPORTS_PCI
+ help
+ Find out whether you have a PCI motherboard. PCI is the name of a
+ bus system, i.e. the way the CPU talks to the other stuff inside
+ your box. If you have PCI, say Y, otherwise N.
source "drivers/pci/pcie/Kconfig"
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff