static DEFINE_MUTEX(g5_switch_mutex);
+static unsigned long transition_latency;
-#ifdef CONFIG_PPC_SMU
+#ifdef CONFIG_PMAC_SMU
-static u32 *g5_pmode_data;
+static const u32 *g5_pmode_data;
static int g5_pmode_max;
static struct smu_sdbp_fvt *g5_fvt_table; /* table of op. points */
{
struct smu_simple_cmd cmd;
- DECLARE_COMPLETION(comp);
+ DECLARE_COMPLETION_ONSTACK(comp);
smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, smu_done_complete,
&comp, 'V', 'S', 'L', 'E', 'W',
0xff, g5_fvt_cur+1, speed_mode);
{
}
-#endif /* CONFIG_PPC_SMU */
+#endif /* CONFIG_PMAC_SMU */
/*
* Platform function based voltage switching for PowerMac7,2 & 7,3
static struct pmf_function *pfunc_cpu_setfreq_high;
static struct pmf_function *pfunc_cpu_setfreq_low;
static struct pmf_function *pfunc_cpu_getfreq;
-static struct pmf_function *pfunc_slewing_done;;
+static struct pmf_function *pfunc_slewing_done;
static int g5_pfunc_switch_freq(int speed_mode)
{
static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy)
{
- if (policy->cpu != 0)
- return -ENODEV;
-
- policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
- policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
+ policy->cpuinfo.transition_latency = transition_latency;
policy->cur = g5_cpu_freqs[g5_query_freq()].frequency;
- policy->cpus = cpu_possible_map;
+ /* secondary CPUs are tied to the primary one by the
+ * cpufreq core if in the secondary policy we tell it that
+ * it actually must be one policy together with all others. */
+ cpumask_copy(policy->cpus, &cpu_online_map);
cpufreq_frequency_table_get_attr(g5_cpu_freqs, policy->cpu);
return cpufreq_frequency_table_cpuinfo(policy,
};
-#ifdef CONFIG_PPC_SMU
+#ifdef CONFIG_PMAC_SMU
static int __init g5_neo2_cpufreq_init(struct device_node *cpus)
{
unsigned int psize, ssize;
unsigned long max_freq;
char *freq_method, *volt_method;
- u32 *valp, pvr_hi;
+ const u32 *valp;
+ u32 pvr_hi;
int use_volts_vdnap = 0;
int use_volts_smu = 0;
int rc = -ENODEV;
/* Check supported platforms */
- if (machine_is_compatible("PowerMac8,1") ||
- machine_is_compatible("PowerMac8,2") ||
- machine_is_compatible("PowerMac9,1"))
+ if (of_machine_is_compatible("PowerMac8,1") ||
+ of_machine_is_compatible("PowerMac8,2") ||
+ of_machine_is_compatible("PowerMac9,1"))
use_volts_smu = 1;
- else if (machine_is_compatible("PowerMac11,2"))
+ else if (of_machine_is_compatible("PowerMac11,2"))
use_volts_vdnap = 1;
else
return -ENODEV;
/* Get first CPU node */
for (cpunode = NULL;
(cpunode = of_get_next_child(cpus, cpunode)) != NULL;) {
- u32 *reg =
- (u32 *)get_property(cpunode, "reg", NULL);
+ const u32 *reg = of_get_property(cpunode, "reg", NULL);
if (reg == NULL || (*reg) != 0)
continue;
if (!strcmp(cpunode->type, "cpu"))
}
/* Check 970FX for now */
- valp = (u32 *)get_property(cpunode, "cpu-version", NULL);
+ valp = of_get_property(cpunode, "cpu-version", NULL);
if (!valp) {
DBG("No cpu-version property !\n");
goto bail_noprops;
}
/* Look for the powertune data in the device-tree */
- g5_pmode_data = (u32 *)get_property(cpunode, "power-mode-data",&psize);
+ g5_pmode_data = of_get_property(cpunode, "power-mode-data",&psize);
if (!g5_pmode_data) {
DBG("No power-mode-data !\n");
goto bail_noprops;
g5_pmode_max = psize / sizeof(u32) - 1;
if (use_volts_smu) {
- struct smu_sdbp_header *shdr;
+ const struct smu_sdbp_header *shdr;
/* Look for the FVT table */
shdr = smu_get_sdb_partition(SMU_SDB_FVT_ID, NULL);
* half freq in this version. So far, I haven't yet seen a machine
* supporting anything else.
*/
- valp = (u32 *)get_property(cpunode, "clock-frequency", NULL);
+ valp = of_get_property(cpunode, "clock-frequency", NULL);
if (!valp)
return -ENODEV;
max_freq = (*valp)/1000;
g5_cpu_freqs[1].frequency = max_freq/2;
/* Set callbacks */
+ transition_latency = 12000;
g5_switch_freq = g5_scom_switch_freq;
g5_query_freq = g5_scom_query_freq;
freq_method = "SCOM";
return rc;
}
-#endif /* CONFIG_PPC_SMU */
+#endif /* CONFIG_PMAC_SMU */
static int __init g5_pm72_cpufreq_init(struct device_node *cpus)
{
struct device_node *cpuid = NULL, *hwclock = NULL, *cpunode = NULL;
- u8 *eeprom = NULL;
- u32 *valp;
+ const u8 *eeprom = NULL;
+ const u32 *valp;
u64 max_freq, min_freq, ih, il;
int has_volt = 1, rc = 0;
/* Lookup the cpuid eeprom node */
cpuid = of_find_node_by_path("/u3@0,f8000000/i2c@f8001000/cpuid@a0");
if (cpuid != NULL)
- eeprom = (u8 *)get_property(cpuid, "cpuid", NULL);
+ eeprom = of_get_property(cpuid, "cpuid", NULL);
if (eeprom == NULL) {
printk(KERN_ERR "cpufreq: Can't find cpuid EEPROM !\n");
rc = -ENODEV;
/* Lookup the i2c hwclock */
for (hwclock = NULL;
(hwclock = of_find_node_by_name(hwclock, "i2c-hwclock")) != NULL;){
- char *loc = get_property(hwclock, "hwctrl-location", NULL);
+ const char *loc = of_get_property(hwclock,
+ "hwctrl-location", NULL);
if (loc == NULL)
continue;
if (strcmp(loc, "CPU CLOCK"))
continue;
- if (!get_property(hwclock, "platform-get-frequency", NULL))
+ if (!of_get_property(hwclock, "platform-get-frequency", NULL))
continue;
break;
}
*/
/* Get max frequency from device-tree */
- valp = (u32 *)get_property(cpunode, "clock-frequency", NULL);
+ valp = of_get_property(cpunode, "clock-frequency", NULL);
if (!valp) {
printk(KERN_ERR "cpufreq: Can't find CPU frequency !\n");
rc = -ENODEV;
g5_cpu_freqs[1].frequency = min_freq;
/* Set callbacks */
+ transition_latency = CPUFREQ_ETERNAL;
g5_switch_volt = g5_pfunc_switch_volt;
g5_switch_freq = g5_pfunc_switch_freq;
g5_query_freq = g5_pfunc_query_freq;
return -ENODEV;
}
- if (machine_is_compatible("PowerMac7,2") ||
- machine_is_compatible("PowerMac7,3") ||
- machine_is_compatible("RackMac3,1"))
+ if (of_machine_is_compatible("PowerMac7,2") ||
+ of_machine_is_compatible("PowerMac7,3") ||
+ of_machine_is_compatible("RackMac3,1"))
rc = g5_pm72_cpufreq_init(cpus);
-#ifdef CONFIG_PPC_SMU
+#ifdef CONFIG_PMAC_SMU
else
rc = g5_neo2_cpufreq_init(cpus);
-#endif /* CONFIG_PPC_SMU */
+#endif /* CONFIG_PMAC_SMU */
of_node_put(cpus);
return rc;
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff