Merge branch 'master' of /home/davem/src/GIT/linux-2.6/

[safe/jmp/linux-2.6] / arch / powerpc / platforms / 85xx / mpc85xx_mds.c

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 25998b6..f0684c8 100644 (file)
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -86,7 +86,7 @@ static int mpc8568_fixup_125_clock(struct phy_device *phydev)
        scr = phy_read(phydev, MV88E1111_SCR);
 
        if (scr < 0)
-               return err;
+               return scr;
 
        err = phy_write(phydev, MV88E1111_SCR, scr | 0x0008);
 
@@ -237,6 +237,8 @@ static void __init mpc85xx_mds_setup_arch(void)
                } else if (machine_is(mpc8569_mds)) {
 #define BCSR7_UCC12_GETHnRST   (0x1 << 2)
 #define BCSR8_UEM_MARVELL_RST  (0x1 << 1)
+#define BCSR_UCC_RGMII         (0x1 << 6)
+#define BCSR_UCC_RTBI          (0x1 << 5)
                        /*
                         * U-Boot mangles interrupt polarity for Marvell PHYs,
                         * so reset built-in and UEM Marvell PHYs, this puts
@@ -247,6 +249,28 @@ static void __init mpc85xx_mds_setup_arch(void)
 
                        setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST);
                        clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST);
+
+                       for (np = NULL; (np = of_find_compatible_node(np,
+                                                       "network",
+                                                       "ucc_geth")) != NULL;) {
+                               const unsigned int *prop;
+                               int ucc_num;
+
+                               prop = of_get_property(np, "cell-index", NULL);
+                               if (prop == NULL)
+                                       continue;
+
+                               ucc_num = *prop - 1;
+
+                               prop = of_get_property(np, "phy-connection-type", NULL);
+                               if (prop == NULL)
+                                       continue;
+
+                               if (strcmp("rtbi", (const char *)prop) == 0)
+                                       clrsetbits_8(&bcsr_regs[7 + ucc_num],
+                                               BCSR_UCC_RGMII, BCSR_UCC_RTBI);
+                       }
+
                }
                iounmap(bcsr_regs);
        }
@@ -255,7 +279,7 @@ static void __init mpc85xx_mds_setup_arch(void)
 #ifdef CONFIG_SWIOTLB
        if (lmb_end_of_DRAM() > max) {
                ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_pci_dma_ops);
+               set_pci_dma_ops(&swiotlb_dma_ops);
                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
        }
 #endif
@@ -301,11 +325,15 @@ static struct of_device_id mpc85xx_ids[] = {
        { .compatible = "fsl,qe", },
        { .compatible = "gianfar", },
        { .compatible = "fsl,rapidio-delta", },
+       { .compatible = "fsl,mpc8548-guts", },
+       { .compatible = "gpio-leds", },
        {},
 };
 
 static int __init mpc85xx_publish_devices(void)
 {
+       if (machine_is(mpc8568_mds))
+               simple_gpiochip_init("fsl,mpc8568mds-bcsr-gpio");
        if (machine_is(mpc8569_mds))
                simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
 
@@ -337,7 +365,8 @@ static void __init mpc85xx_mds_pic_init(void)
        }
 
        mpic = mpic_alloc(np, r.start,
-                       MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+                       MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
+                       MPIC_BROKEN_FRR_NIRQS,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
        of_node_put(np);